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i386: Change stepping of Haswell to non-blacklisted value
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1 #ifndef HW_PC_H
2 #define HW_PC_H
3
4 #include "qemu-common.h"
5 #include "exec/memory.h"
6 #include "hw/boards.h"
7 #include "hw/isa/isa.h"
8 #include "hw/block/fdc.h"
9 #include "net/net.h"
10 #include "hw/i386/ioapic.h"
11
12 #include "qemu/range.h"
13 #include "qemu/bitmap.h"
14 #include "sysemu/sysemu.h"
15 #include "hw/pci/pci.h"
16 #include "hw/compat.h"
17 #include "hw/mem/pc-dimm.h"
18 #include "hw/mem/nvdimm.h"
19 #include "hw/acpi/acpi_dev_interface.h"
20
21 #define HPET_INTCAP "hpet-intcap"
22
23 #ifdef CONFIG_KVM
24 #define kvm_pit_in_kernel() \
25 (kvm_irqchip_in_kernel() && !kvm_irqchip_is_split())
26 #define kvm_pic_in_kernel() \
27 (kvm_irqchip_in_kernel() && !kvm_irqchip_is_split())
28 #define kvm_ioapic_in_kernel() \
29 (kvm_irqchip_in_kernel() && !kvm_irqchip_is_split())
30 #else
31 #define kvm_pit_in_kernel() 0
32 #define kvm_pic_in_kernel() 0
33 #define kvm_ioapic_in_kernel() 0
34 #endif
35
36 /**
37 * PCMachineState:
38 * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling
39 * @boot_cpus: number of present VCPUs
40 */
41 struct PCMachineState {
42 /*< private >*/
43 MachineState parent_obj;
44
45 /* <public> */
46
47 /* State for other subsystems/APIs: */
48 MemoryHotplugState hotplug_memory;
49 Notifier machine_done;
50
51 /* Pointers to devices and objects: */
52 HotplugHandler *acpi_dev;
53 ISADevice *rtc;
54 PCIBus *bus;
55 FWCfgState *fw_cfg;
56 qemu_irq *gsi;
57
58 /* Configuration options: */
59 uint64_t max_ram_below_4g;
60 OnOffAuto vmport;
61 OnOffAuto smm;
62
63 AcpiNVDIMMState acpi_nvdimm_state;
64
65 bool acpi_build_enabled;
66 bool smbus;
67 bool sata;
68 bool pit;
69
70 /* RAM information (sizes, addresses, configuration): */
71 ram_addr_t below_4g_mem_size, above_4g_mem_size;
72
73 /* CPU and apic information: */
74 bool apic_xrupt_override;
75 unsigned apic_id_limit;
76 uint16_t boot_cpus;
77
78 /* NUMA information: */
79 uint64_t numa_nodes;
80 uint64_t *node_mem;
81
82 /* Address space used by IOAPIC device. All IOAPIC interrupts
83 * will be translated to MSI messages in the address space. */
84 AddressSpace *ioapic_as;
85 };
86
87 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device"
88 #define PC_MACHINE_MEMHP_REGION_SIZE "hotplug-memory-region-size"
89 #define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g"
90 #define PC_MACHINE_VMPORT "vmport"
91 #define PC_MACHINE_SMM "smm"
92 #define PC_MACHINE_NVDIMM "nvdimm"
93 #define PC_MACHINE_SMBUS "smbus"
94 #define PC_MACHINE_SATA "sata"
95 #define PC_MACHINE_PIT "pit"
96
97 /**
98 * PCMachineClass:
99 *
100 * Methods:
101 *
102 * @get_hotplug_handler: pointer to parent class callback @get_hotplug_handler
103 *
104 * Compat fields:
105 *
106 * @enforce_aligned_dimm: check that DIMM's address/size is aligned by
107 * backend's alignment value if provided
108 * @acpi_data_size: Size of the chunk of memory at the top of RAM
109 * for the BIOS ACPI tables and other BIOS
110 * datastructures.
111 * @gigabyte_align: Make sure that guest addresses aligned at
112 * 1Gbyte boundaries get mapped to host
113 * addresses aligned at 1Gbyte boundaries. This
114 * way we can use 1GByte pages in the host.
115 *
116 */
117 struct PCMachineClass {
118 /*< private >*/
119 MachineClass parent_class;
120
121 /*< public >*/
122
123 /* Methods: */
124 HotplugHandler *(*get_hotplug_handler)(MachineState *machine,
125 DeviceState *dev);
126
127 /* Device configuration: */
128 bool pci_enabled;
129 bool kvmclock_enabled;
130
131 /* Compat options: */
132
133 /* ACPI compat: */
134 bool has_acpi_build;
135 bool rsdp_in_ram;
136 int legacy_acpi_table_size;
137 unsigned acpi_data_size;
138
139 /* SMBIOS compat: */
140 bool smbios_defaults;
141 bool smbios_legacy_mode;
142 bool smbios_uuid_encoded;
143
144 /* RAM / address space compat: */
145 bool gigabyte_align;
146 bool has_reserved_memory;
147 bool enforce_aligned_dimm;
148 bool broken_reserved_end;
149
150 /* TSC rate migration: */
151 bool save_tsc_khz;
152 /* generate legacy CPU hotplug AML */
153 bool legacy_cpu_hotplug;
154 };
155
156 #define TYPE_PC_MACHINE "generic-pc-machine"
157 #define PC_MACHINE(obj) \
158 OBJECT_CHECK(PCMachineState, (obj), TYPE_PC_MACHINE)
159 #define PC_MACHINE_GET_CLASS(obj) \
160 OBJECT_GET_CLASS(PCMachineClass, (obj), TYPE_PC_MACHINE)
161 #define PC_MACHINE_CLASS(klass) \
162 OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE)
163
164 /* PC-style peripherals (also used by other machines). */
165
166 #define ACPI_PM_PROP_S3_DISABLED "disable_s3"
167 #define ACPI_PM_PROP_S4_DISABLED "disable_s4"
168 #define ACPI_PM_PROP_S4_VAL "s4_val"
169 #define ACPI_PM_PROP_SCI_INT "sci_int"
170 #define ACPI_PM_PROP_ACPI_ENABLE_CMD "acpi_enable_cmd"
171 #define ACPI_PM_PROP_ACPI_DISABLE_CMD "acpi_disable_cmd"
172 #define ACPI_PM_PROP_PM_IO_BASE "pm_io_base"
173 #define ACPI_PM_PROP_GPE0_BLK "gpe0_blk"
174 #define ACPI_PM_PROP_GPE0_BLK_LEN "gpe0_blk_len"
175 #define ACPI_PM_PROP_TCO_ENABLED "enable_tco"
176
177 /* parallel.c */
178
179 void parallel_hds_isa_init(ISABus *bus, int n);
180
181 bool parallel_mm_init(MemoryRegion *address_space,
182 hwaddr base, int it_shift, qemu_irq irq,
183 Chardev *chr);
184
185 /* i8259.c */
186
187 extern DeviceState *isa_pic;
188 qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq);
189 qemu_irq *kvm_i8259_init(ISABus *bus);
190 int pic_read_irq(DeviceState *d);
191 int pic_get_output(DeviceState *d);
192
193 /* ioapic.c */
194
195 void kvm_ioapic_dump_state(Monitor *mon, const QDict *qdict);
196 void ioapic_dump_state(Monitor *mon, const QDict *qdict);
197
198 /* Global System Interrupts */
199
200 #define GSI_NUM_PINS IOAPIC_NUM_PINS
201
202 typedef struct GSIState {
203 qemu_irq i8259_irq[ISA_NUM_IRQS];
204 qemu_irq ioapic_irq[IOAPIC_NUM_PINS];
205 } GSIState;
206
207 void gsi_handler(void *opaque, int n, int level);
208
209 /* vmport.c */
210 #define TYPE_VMPORT "vmport"
211 typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address);
212
213 static inline void vmport_init(ISABus *bus)
214 {
215 isa_create_simple(bus, TYPE_VMPORT);
216 }
217
218 void vmport_register(unsigned char command, VMPortReadFunc *func, void *opaque);
219 void vmmouse_get_data(uint32_t *data);
220 void vmmouse_set_data(const uint32_t *data);
221
222 /* pckbd.c */
223 #define I8042_A20_LINE "a20"
224
225 void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
226 MemoryRegion *region, ram_addr_t size,
227 hwaddr mask);
228 void i8042_isa_mouse_fake_event(void *opaque);
229 void i8042_setup_a20_line(ISADevice *dev, qemu_irq a20_out);
230
231 /* pc.c */
232 extern int fd_bootchk;
233
234 bool pc_machine_is_smm_enabled(PCMachineState *pcms);
235 void pc_register_ferr_irq(qemu_irq irq);
236 void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
237
238 void pc_cpus_init(PCMachineState *pcms);
239 void pc_hot_add_cpu(const int64_t id, Error **errp);
240 void pc_acpi_init(const char *default_dsdt);
241
242 void pc_guest_info_init(PCMachineState *pcms);
243
244 #define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start"
245 #define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end"
246 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start"
247 #define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end"
248 #define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size"
249 #define PCI_HOST_BELOW_4G_MEM_SIZE "below-4g-mem-size"
250 #define PCI_HOST_ABOVE_4G_MEM_SIZE "above-4g-mem-size"
251 #define DEFAULT_PCI_HOLE64_SIZE (~0x0ULL)
252
253
254 void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory,
255 MemoryRegion *pci_address_space);
256
257 void xen_load_linux(PCMachineState *pcms);
258 void pc_memory_init(PCMachineState *pcms,
259 MemoryRegion *system_memory,
260 MemoryRegion *rom_memory,
261 MemoryRegion **ram_memory);
262 qemu_irq pc_allocate_cpu_irq(void);
263 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus);
264 void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
265 ISADevice **rtc_state,
266 bool create_fdctrl,
267 bool no_vmport,
268 bool has_pit,
269 uint32_t hpet_irqs);
270 void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd);
271 void pc_cmos_init(PCMachineState *pcms,
272 BusState *ide0, BusState *ide1,
273 ISADevice *s);
274 void pc_nic_init(ISABus *isa_bus, PCIBus *pci_bus);
275 void pc_pci_device_init(PCIBus *pci_bus);
276
277 typedef void (*cpu_set_smm_t)(int smm, void *arg);
278
279 void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name);
280
281 ISADevice *pc_find_fdc0(void);
282 int cmos_get_fd_drive_type(FloppyDriveType fd0);
283
284 #define FW_CFG_IO_BASE 0x510
285
286 #define PORT92_A20_LINE "a20"
287
288 /* acpi_piix.c */
289
290 I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
291 qemu_irq sci_irq, qemu_irq smi_irq,
292 int smm_enabled, DeviceState **piix4_pm);
293
294 /* hpet.c */
295 extern int no_hpet;
296
297 /* piix_pci.c */
298 struct PCII440FXState;
299 typedef struct PCII440FXState PCII440FXState;
300
301 #define TYPE_I440FX_PCI_HOST_BRIDGE "i440FX-pcihost"
302 #define TYPE_I440FX_PCI_DEVICE "i440FX"
303
304 #define TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE "igd-passthrough-i440FX"
305
306 PCIBus *i440fx_init(const char *host_type, const char *pci_type,
307 PCII440FXState **pi440fx_state, int *piix_devfn,
308 ISABus **isa_bus, qemu_irq *pic,
309 MemoryRegion *address_space_mem,
310 MemoryRegion *address_space_io,
311 ram_addr_t ram_size,
312 ram_addr_t below_4g_mem_size,
313 ram_addr_t above_4g_mem_size,
314 MemoryRegion *pci_memory,
315 MemoryRegion *ram_memory);
316
317 PCIBus *find_i440fx(void);
318 /* piix4.c */
319 extern PCIDevice *piix4_dev;
320 int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn);
321
322 /* vga.c */
323 enum vga_retrace_method {
324 VGA_RETRACE_DUMB,
325 VGA_RETRACE_PRECISE
326 };
327
328 extern enum vga_retrace_method vga_retrace_method;
329
330 int isa_vga_mm_init(hwaddr vram_base,
331 hwaddr ctrl_base, int it_shift,
332 MemoryRegion *address_space);
333
334 /* ne2000.c */
335 static inline bool isa_ne2000_init(ISABus *bus, int base, int irq, NICInfo *nd)
336 {
337 DeviceState *dev;
338 ISADevice *isadev;
339
340 qemu_check_nic_model(nd, "ne2k_isa");
341
342 isadev = isa_try_create(bus, "ne2k_isa");
343 if (!isadev) {
344 return false;
345 }
346 dev = DEVICE(isadev);
347 qdev_prop_set_uint32(dev, "iobase", base);
348 qdev_prop_set_uint32(dev, "irq", irq);
349 qdev_set_nic_properties(dev, nd);
350 qdev_init_nofail(dev);
351 return true;
352 }
353
354 /* pc_sysfw.c */
355 void pc_system_firmware_init(MemoryRegion *rom_memory,
356 bool isapc_ram_fw);
357
358 /* pvpanic.c */
359 uint16_t pvpanic_port(void);
360
361 /* acpi-build.c */
362 void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid,
363 const CPUArchIdList *apic_ids, GArray *entry);
364
365 /* e820 types */
366 #define E820_RAM 1
367 #define E820_RESERVED 2
368 #define E820_ACPI 3
369 #define E820_NVS 4
370 #define E820_UNUSABLE 5
371
372 int e820_add_entry(uint64_t, uint64_t, uint32_t);
373 int e820_get_num_entries(void);
374 bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *);
375
376 #define PC_COMPAT_2_8 \
377 HW_COMPAT_2_8 \
378 {\
379 .driver = "kvmclock",\
380 .property = "x-mach-use-reliable-get-clock",\
381 .value = "off",\
382 },\
383 {\
384 .driver = "ICH9-LPC",\
385 .property = "x-smi-broadcast",\
386 .value = "off",\
387 },\
388 {\
389 .driver = TYPE_X86_CPU,\
390 .property = "vmware-cpuid-freq",\
391 .value = "off",\
392 },\
393 {\
394 .driver = "Haswell-" TYPE_X86_CPU,\
395 .property = "stepping",\
396 .value = "1",\
397 },
398
399 #define PC_COMPAT_2_7 \
400 HW_COMPAT_2_7 \
401 {\
402 .driver = TYPE_X86_CPU,\
403 .property = "l3-cache",\
404 .value = "off",\
405 },\
406 {\
407 .driver = TYPE_X86_CPU,\
408 .property = "full-cpuid-auto-level",\
409 .value = "off",\
410 },\
411 {\
412 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\
413 .property = "family",\
414 .value = "15",\
415 },\
416 {\
417 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\
418 .property = "model",\
419 .value = "6",\
420 },\
421 {\
422 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\
423 .property = "stepping",\
424 .value = "1",\
425 },\
426 {\
427 .driver = "isa-pcspk",\
428 .property = "migrate",\
429 .value = "off",\
430 },
431
432 #define PC_COMPAT_2_6 \
433 HW_COMPAT_2_6 \
434 {\
435 .driver = "fw_cfg_io",\
436 .property = "dma_enabled",\
437 .value = "off",\
438 },{\
439 .driver = TYPE_X86_CPU,\
440 .property = "cpuid-0xb",\
441 .value = "off",\
442 },{\
443 .driver = "vmxnet3",\
444 .property = "romfile",\
445 .value = "",\
446 },\
447 {\
448 .driver = TYPE_X86_CPU,\
449 .property = "fill-mtrr-mask",\
450 .value = "off",\
451 },\
452 {\
453 .driver = "apic-common",\
454 .property = "legacy-instance-id",\
455 .value = "on",\
456 },
457
458 #define PC_COMPAT_2_5 \
459 HW_COMPAT_2_5
460
461 /* Helper for setting model-id for CPU models that changed model-id
462 * depending on QEMU versions up to QEMU 2.4.
463 */
464 #define PC_CPU_MODEL_IDS(v) \
465 {\
466 .driver = "qemu32-" TYPE_X86_CPU,\
467 .property = "model-id",\
468 .value = "QEMU Virtual CPU version " v,\
469 },\
470 {\
471 .driver = "qemu64-" TYPE_X86_CPU,\
472 .property = "model-id",\
473 .value = "QEMU Virtual CPU version " v,\
474 },\
475 {\
476 .driver = "athlon-" TYPE_X86_CPU,\
477 .property = "model-id",\
478 .value = "QEMU Virtual CPU version " v,\
479 },
480
481 #define PC_COMPAT_2_4 \
482 HW_COMPAT_2_4 \
483 PC_CPU_MODEL_IDS("2.4.0") \
484 {\
485 .driver = "Haswell-" TYPE_X86_CPU,\
486 .property = "abm",\
487 .value = "off",\
488 },\
489 {\
490 .driver = "Haswell-noTSX-" TYPE_X86_CPU,\
491 .property = "abm",\
492 .value = "off",\
493 },\
494 {\
495 .driver = "Broadwell-" TYPE_X86_CPU,\
496 .property = "abm",\
497 .value = "off",\
498 },\
499 {\
500 .driver = "Broadwell-noTSX-" TYPE_X86_CPU,\
501 .property = "abm",\
502 .value = "off",\
503 },\
504 {\
505 .driver = "host" "-" TYPE_X86_CPU,\
506 .property = "host-cache-info",\
507 .value = "on",\
508 },\
509 {\
510 .driver = TYPE_X86_CPU,\
511 .property = "check",\
512 .value = "off",\
513 },\
514 {\
515 .driver = "qemu64" "-" TYPE_X86_CPU,\
516 .property = "sse4a",\
517 .value = "on",\
518 },\
519 {\
520 .driver = "qemu64" "-" TYPE_X86_CPU,\
521 .property = "abm",\
522 .value = "on",\
523 },\
524 {\
525 .driver = "qemu64" "-" TYPE_X86_CPU,\
526 .property = "popcnt",\
527 .value = "on",\
528 },\
529 {\
530 .driver = "qemu32" "-" TYPE_X86_CPU,\
531 .property = "popcnt",\
532 .value = "on",\
533 },{\
534 .driver = "Opteron_G2" "-" TYPE_X86_CPU,\
535 .property = "rdtscp",\
536 .value = "on",\
537 },{\
538 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\
539 .property = "rdtscp",\
540 .value = "on",\
541 },{\
542 .driver = "Opteron_G4" "-" TYPE_X86_CPU,\
543 .property = "rdtscp",\
544 .value = "on",\
545 },{\
546 .driver = "Opteron_G5" "-" TYPE_X86_CPU,\
547 .property = "rdtscp",\
548 .value = "on",\
549 },
550
551
552 #define PC_COMPAT_2_3 \
553 HW_COMPAT_2_3 \
554 PC_CPU_MODEL_IDS("2.3.0") \
555 {\
556 .driver = TYPE_X86_CPU,\
557 .property = "arat",\
558 .value = "off",\
559 },{\
560 .driver = "qemu64" "-" TYPE_X86_CPU,\
561 .property = "level",\
562 .value = stringify(4),\
563 },{\
564 .driver = "kvm64" "-" TYPE_X86_CPU,\
565 .property = "level",\
566 .value = stringify(5),\
567 },{\
568 .driver = "pentium3" "-" TYPE_X86_CPU,\
569 .property = "level",\
570 .value = stringify(2),\
571 },{\
572 .driver = "n270" "-" TYPE_X86_CPU,\
573 .property = "level",\
574 .value = stringify(5),\
575 },{\
576 .driver = "Conroe" "-" TYPE_X86_CPU,\
577 .property = "level",\
578 .value = stringify(4),\
579 },{\
580 .driver = "Penryn" "-" TYPE_X86_CPU,\
581 .property = "level",\
582 .value = stringify(4),\
583 },{\
584 .driver = "Nehalem" "-" TYPE_X86_CPU,\
585 .property = "level",\
586 .value = stringify(4),\
587 },{\
588 .driver = "n270" "-" TYPE_X86_CPU,\
589 .property = "xlevel",\
590 .value = stringify(0x8000000a),\
591 },{\
592 .driver = "Penryn" "-" TYPE_X86_CPU,\
593 .property = "xlevel",\
594 .value = stringify(0x8000000a),\
595 },{\
596 .driver = "Conroe" "-" TYPE_X86_CPU,\
597 .property = "xlevel",\
598 .value = stringify(0x8000000a),\
599 },{\
600 .driver = "Nehalem" "-" TYPE_X86_CPU,\
601 .property = "xlevel",\
602 .value = stringify(0x8000000a),\
603 },{\
604 .driver = "Westmere" "-" TYPE_X86_CPU,\
605 .property = "xlevel",\
606 .value = stringify(0x8000000a),\
607 },{\
608 .driver = "SandyBridge" "-" TYPE_X86_CPU,\
609 .property = "xlevel",\
610 .value = stringify(0x8000000a),\
611 },{\
612 .driver = "IvyBridge" "-" TYPE_X86_CPU,\
613 .property = "xlevel",\
614 .value = stringify(0x8000000a),\
615 },{\
616 .driver = "Haswell" "-" TYPE_X86_CPU,\
617 .property = "xlevel",\
618 .value = stringify(0x8000000a),\
619 },{\
620 .driver = "Haswell-noTSX" "-" TYPE_X86_CPU,\
621 .property = "xlevel",\
622 .value = stringify(0x8000000a),\
623 },{\
624 .driver = "Broadwell" "-" TYPE_X86_CPU,\
625 .property = "xlevel",\
626 .value = stringify(0x8000000a),\
627 },{\
628 .driver = "Broadwell-noTSX" "-" TYPE_X86_CPU,\
629 .property = "xlevel",\
630 .value = stringify(0x8000000a),\
631 },{\
632 .driver = TYPE_X86_CPU,\
633 .property = "kvm-no-smi-migration",\
634 .value = "on",\
635 },
636
637 #define PC_COMPAT_2_2 \
638 HW_COMPAT_2_2 \
639 PC_CPU_MODEL_IDS("2.3.0") \
640 {\
641 .driver = "kvm64" "-" TYPE_X86_CPU,\
642 .property = "vme",\
643 .value = "off",\
644 },\
645 {\
646 .driver = "kvm32" "-" TYPE_X86_CPU,\
647 .property = "vme",\
648 .value = "off",\
649 },\
650 {\
651 .driver = "Conroe" "-" TYPE_X86_CPU,\
652 .property = "vme",\
653 .value = "off",\
654 },\
655 {\
656 .driver = "Penryn" "-" TYPE_X86_CPU,\
657 .property = "vme",\
658 .value = "off",\
659 },\
660 {\
661 .driver = "Nehalem" "-" TYPE_X86_CPU,\
662 .property = "vme",\
663 .value = "off",\
664 },\
665 {\
666 .driver = "Westmere" "-" TYPE_X86_CPU,\
667 .property = "vme",\
668 .value = "off",\
669 },\
670 {\
671 .driver = "SandyBridge" "-" TYPE_X86_CPU,\
672 .property = "vme",\
673 .value = "off",\
674 },\
675 {\
676 .driver = "Haswell" "-" TYPE_X86_CPU,\
677 .property = "vme",\
678 .value = "off",\
679 },\
680 {\
681 .driver = "Broadwell" "-" TYPE_X86_CPU,\
682 .property = "vme",\
683 .value = "off",\
684 },\
685 {\
686 .driver = "Opteron_G1" "-" TYPE_X86_CPU,\
687 .property = "vme",\
688 .value = "off",\
689 },\
690 {\
691 .driver = "Opteron_G2" "-" TYPE_X86_CPU,\
692 .property = "vme",\
693 .value = "off",\
694 },\
695 {\
696 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\
697 .property = "vme",\
698 .value = "off",\
699 },\
700 {\
701 .driver = "Opteron_G4" "-" TYPE_X86_CPU,\
702 .property = "vme",\
703 .value = "off",\
704 },\
705 {\
706 .driver = "Opteron_G5" "-" TYPE_X86_CPU,\
707 .property = "vme",\
708 .value = "off",\
709 },\
710 {\
711 .driver = "Haswell" "-" TYPE_X86_CPU,\
712 .property = "f16c",\
713 .value = "off",\
714 },\
715 {\
716 .driver = "Haswell" "-" TYPE_X86_CPU,\
717 .property = "rdrand",\
718 .value = "off",\
719 },\
720 {\
721 .driver = "Broadwell" "-" TYPE_X86_CPU,\
722 .property = "f16c",\
723 .value = "off",\
724 },\
725 {\
726 .driver = "Broadwell" "-" TYPE_X86_CPU,\
727 .property = "rdrand",\
728 .value = "off",\
729 },
730
731 #define PC_COMPAT_2_1 \
732 HW_COMPAT_2_1 \
733 PC_CPU_MODEL_IDS("2.1.0") \
734 {\
735 .driver = "coreduo" "-" TYPE_X86_CPU,\
736 .property = "vmx",\
737 .value = "on",\
738 },\
739 {\
740 .driver = "core2duo" "-" TYPE_X86_CPU,\
741 .property = "vmx",\
742 .value = "on",\
743 },
744
745 #define PC_COMPAT_2_0 \
746 PC_CPU_MODEL_IDS("2.0.0") \
747 {\
748 .driver = "virtio-scsi-pci",\
749 .property = "any_layout",\
750 .value = "off",\
751 },{\
752 .driver = "PIIX4_PM",\
753 .property = "memory-hotplug-support",\
754 .value = "off",\
755 },\
756 {\
757 .driver = "apic",\
758 .property = "version",\
759 .value = stringify(0x11),\
760 },\
761 {\
762 .driver = "nec-usb-xhci",\
763 .property = "superspeed-ports-first",\
764 .value = "off",\
765 },\
766 {\
767 .driver = "nec-usb-xhci",\
768 .property = "force-pcie-endcap",\
769 .value = "on",\
770 },\
771 {\
772 .driver = "pci-serial",\
773 .property = "prog_if",\
774 .value = stringify(0),\
775 },\
776 {\
777 .driver = "pci-serial-2x",\
778 .property = "prog_if",\
779 .value = stringify(0),\
780 },\
781 {\
782 .driver = "pci-serial-4x",\
783 .property = "prog_if",\
784 .value = stringify(0),\
785 },\
786 {\
787 .driver = "virtio-net-pci",\
788 .property = "guest_announce",\
789 .value = "off",\
790 },\
791 {\
792 .driver = "ICH9-LPC",\
793 .property = "memory-hotplug-support",\
794 .value = "off",\
795 },{\
796 .driver = "xio3130-downstream",\
797 .property = COMPAT_PROP_PCP,\
798 .value = "off",\
799 },{\
800 .driver = "ioh3420",\
801 .property = COMPAT_PROP_PCP,\
802 .value = "off",\
803 },
804
805 #define PC_COMPAT_1_7 \
806 PC_CPU_MODEL_IDS("1.7.0") \
807 {\
808 .driver = TYPE_USB_DEVICE,\
809 .property = "msos-desc",\
810 .value = "no",\
811 },\
812 {\
813 .driver = "PIIX4_PM",\
814 .property = "acpi-pci-hotplug-with-bridge-support",\
815 .value = "off",\
816 },\
817 {\
818 .driver = "hpet",\
819 .property = HPET_INTCAP,\
820 .value = stringify(4),\
821 },
822
823 #define PC_COMPAT_1_6 \
824 PC_CPU_MODEL_IDS("1.6.0") \
825 {\
826 .driver = "e1000",\
827 .property = "mitigation",\
828 .value = "off",\
829 },{\
830 .driver = "qemu64-" TYPE_X86_CPU,\
831 .property = "model",\
832 .value = stringify(2),\
833 },{\
834 .driver = "qemu32-" TYPE_X86_CPU,\
835 .property = "model",\
836 .value = stringify(3),\
837 },{\
838 .driver = "i440FX-pcihost",\
839 .property = "short_root_bus",\
840 .value = stringify(1),\
841 },{\
842 .driver = "q35-pcihost",\
843 .property = "short_root_bus",\
844 .value = stringify(1),\
845 },
846
847 #define PC_COMPAT_1_5 \
848 PC_CPU_MODEL_IDS("1.5.0") \
849 {\
850 .driver = "Conroe-" TYPE_X86_CPU,\
851 .property = "model",\
852 .value = stringify(2),\
853 },{\
854 .driver = "Conroe-" TYPE_X86_CPU,\
855 .property = "level",\
856 .value = stringify(2),\
857 },{\
858 .driver = "Penryn-" TYPE_X86_CPU,\
859 .property = "model",\
860 .value = stringify(2),\
861 },{\
862 .driver = "Penryn-" TYPE_X86_CPU,\
863 .property = "level",\
864 .value = stringify(2),\
865 },{\
866 .driver = "Nehalem-" TYPE_X86_CPU,\
867 .property = "model",\
868 .value = stringify(2),\
869 },{\
870 .driver = "Nehalem-" TYPE_X86_CPU,\
871 .property = "level",\
872 .value = stringify(2),\
873 },{\
874 .driver = "virtio-net-pci",\
875 .property = "any_layout",\
876 .value = "off",\
877 },{\
878 .driver = TYPE_X86_CPU,\
879 .property = "pmu",\
880 .value = "on",\
881 },{\
882 .driver = "i440FX-pcihost",\
883 .property = "short_root_bus",\
884 .value = stringify(0),\
885 },{\
886 .driver = "q35-pcihost",\
887 .property = "short_root_bus",\
888 .value = stringify(0),\
889 },
890
891 #define PC_COMPAT_1_4 \
892 PC_CPU_MODEL_IDS("1.4.0") \
893 {\
894 .driver = "scsi-hd",\
895 .property = "discard_granularity",\
896 .value = stringify(0),\
897 },{\
898 .driver = "scsi-cd",\
899 .property = "discard_granularity",\
900 .value = stringify(0),\
901 },{\
902 .driver = "scsi-disk",\
903 .property = "discard_granularity",\
904 .value = stringify(0),\
905 },{\
906 .driver = "ide-hd",\
907 .property = "discard_granularity",\
908 .value = stringify(0),\
909 },{\
910 .driver = "ide-cd",\
911 .property = "discard_granularity",\
912 .value = stringify(0),\
913 },{\
914 .driver = "ide-drive",\
915 .property = "discard_granularity",\
916 .value = stringify(0),\
917 },{\
918 .driver = "virtio-blk-pci",\
919 .property = "discard_granularity",\
920 .value = stringify(0),\
921 },{\
922 .driver = "virtio-serial-pci",\
923 .property = "vectors",\
924 /* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */\
925 .value = stringify(0xFFFFFFFF),\
926 },{ \
927 .driver = "virtio-net-pci", \
928 .property = "ctrl_guest_offloads", \
929 .value = "off", \
930 },{\
931 .driver = "e1000",\
932 .property = "romfile",\
933 .value = "pxe-e1000.rom",\
934 },{\
935 .driver = "ne2k_pci",\
936 .property = "romfile",\
937 .value = "pxe-ne2k_pci.rom",\
938 },{\
939 .driver = "pcnet",\
940 .property = "romfile",\
941 .value = "pxe-pcnet.rom",\
942 },{\
943 .driver = "rtl8139",\
944 .property = "romfile",\
945 .value = "pxe-rtl8139.rom",\
946 },{\
947 .driver = "virtio-net-pci",\
948 .property = "romfile",\
949 .value = "pxe-virtio.rom",\
950 },{\
951 .driver = "486-" TYPE_X86_CPU,\
952 .property = "model",\
953 .value = stringify(0),\
954 },\
955 {\
956 .driver = "n270" "-" TYPE_X86_CPU,\
957 .property = "movbe",\
958 .value = "off",\
959 },\
960 {\
961 .driver = "Westmere" "-" TYPE_X86_CPU,\
962 .property = "pclmulqdq",\
963 .value = "off",\
964 },
965
966 #define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \
967 static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \
968 { \
969 MachineClass *mc = MACHINE_CLASS(oc); \
970 optsfn(mc); \
971 mc->init = initfn; \
972 } \
973 static const TypeInfo pc_machine_type_##suffix = { \
974 .name = namestr TYPE_MACHINE_SUFFIX, \
975 .parent = TYPE_PC_MACHINE, \
976 .class_init = pc_machine_##suffix##_class_init, \
977 }; \
978 static void pc_machine_init_##suffix(void) \
979 { \
980 type_register(&pc_machine_type_##suffix); \
981 } \
982 type_init(pc_machine_init_##suffix)
983
984 extern void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id);
985 #endif