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compat: replace PC_COMPAT_2_9 & HW_COMPAT_2_9 macros
[mirror_qemu.git] / include / hw / i386 / pc.h
1 #ifndef HW_PC_H
2 #define HW_PC_H
3
4 #include "qemu-common.h"
5 #include "exec/memory.h"
6 #include "hw/boards.h"
7 #include "hw/isa/isa.h"
8 #include "hw/block/fdc.h"
9 #include "net/net.h"
10 #include "hw/i386/ioapic.h"
11
12 #include "qemu/range.h"
13 #include "qemu/bitmap.h"
14 #include "sysemu/sysemu.h"
15 #include "hw/pci/pci.h"
16 #include "hw/compat.h"
17 #include "hw/mem/pc-dimm.h"
18 #include "hw/mem/nvdimm.h"
19 #include "hw/acpi/acpi_dev_interface.h"
20
21 #define HPET_INTCAP "hpet-intcap"
22
23 /**
24 * PCMachineState:
25 * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling
26 * @boot_cpus: number of present VCPUs
27 */
28 struct PCMachineState {
29 /*< private >*/
30 MachineState parent_obj;
31
32 /* <public> */
33
34 /* State for other subsystems/APIs: */
35 Notifier machine_done;
36
37 /* Pointers to devices and objects: */
38 HotplugHandler *acpi_dev;
39 ISADevice *rtc;
40 PCIBus *bus;
41 FWCfgState *fw_cfg;
42 qemu_irq *gsi;
43
44 /* Configuration options: */
45 uint64_t max_ram_below_4g;
46 OnOffAuto vmport;
47 OnOffAuto smm;
48
49 AcpiNVDIMMState acpi_nvdimm_state;
50
51 bool acpi_build_enabled;
52 bool smbus_enabled;
53 bool sata_enabled;
54 bool pit_enabled;
55
56 /* RAM information (sizes, addresses, configuration): */
57 ram_addr_t below_4g_mem_size, above_4g_mem_size;
58
59 /* CPU and apic information: */
60 bool apic_xrupt_override;
61 unsigned apic_id_limit;
62 uint16_t boot_cpus;
63
64 /* NUMA information: */
65 uint64_t numa_nodes;
66 uint64_t *node_mem;
67
68 /* Address space used by IOAPIC device. All IOAPIC interrupts
69 * will be translated to MSI messages in the address space. */
70 AddressSpace *ioapic_as;
71 };
72
73 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device"
74 #define PC_MACHINE_DEVMEM_REGION_SIZE "device-memory-region-size"
75 #define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g"
76 #define PC_MACHINE_VMPORT "vmport"
77 #define PC_MACHINE_SMM "smm"
78 #define PC_MACHINE_NVDIMM "nvdimm"
79 #define PC_MACHINE_NVDIMM_PERSIST "nvdimm-persistence"
80 #define PC_MACHINE_SMBUS "smbus"
81 #define PC_MACHINE_SATA "sata"
82 #define PC_MACHINE_PIT "pit"
83
84 /**
85 * PCMachineClass:
86 *
87 * Compat fields:
88 *
89 * @enforce_aligned_dimm: check that DIMM's address/size is aligned by
90 * backend's alignment value if provided
91 * @acpi_data_size: Size of the chunk of memory at the top of RAM
92 * for the BIOS ACPI tables and other BIOS
93 * datastructures.
94 * @gigabyte_align: Make sure that guest addresses aligned at
95 * 1Gbyte boundaries get mapped to host
96 * addresses aligned at 1Gbyte boundaries. This
97 * way we can use 1GByte pages in the host.
98 *
99 */
100 struct PCMachineClass {
101 /*< private >*/
102 MachineClass parent_class;
103
104 /*< public >*/
105
106 /* Device configuration: */
107 bool pci_enabled;
108 bool kvmclock_enabled;
109 const char *default_nic_model;
110
111 /* Compat options: */
112
113 /* ACPI compat: */
114 bool has_acpi_build;
115 bool rsdp_in_ram;
116 int legacy_acpi_table_size;
117 unsigned acpi_data_size;
118
119 /* SMBIOS compat: */
120 bool smbios_defaults;
121 bool smbios_legacy_mode;
122 bool smbios_uuid_encoded;
123
124 /* RAM / address space compat: */
125 bool gigabyte_align;
126 bool has_reserved_memory;
127 bool enforce_aligned_dimm;
128 bool broken_reserved_end;
129
130 /* TSC rate migration: */
131 bool save_tsc_khz;
132 /* generate legacy CPU hotplug AML */
133 bool legacy_cpu_hotplug;
134
135 /* use DMA capable linuxboot option rom */
136 bool linuxboot_dma_enabled;
137 };
138
139 #define TYPE_PC_MACHINE "generic-pc-machine"
140 #define PC_MACHINE(obj) \
141 OBJECT_CHECK(PCMachineState, (obj), TYPE_PC_MACHINE)
142 #define PC_MACHINE_GET_CLASS(obj) \
143 OBJECT_GET_CLASS(PCMachineClass, (obj), TYPE_PC_MACHINE)
144 #define PC_MACHINE_CLASS(klass) \
145 OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE)
146
147 /* i8259.c */
148
149 extern DeviceState *isa_pic;
150 qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq);
151 qemu_irq *kvm_i8259_init(ISABus *bus);
152 int pic_read_irq(DeviceState *d);
153 int pic_get_output(DeviceState *d);
154
155 /* ioapic.c */
156
157 /* Global System Interrupts */
158
159 #define GSI_NUM_PINS IOAPIC_NUM_PINS
160
161 typedef struct GSIState {
162 qemu_irq i8259_irq[ISA_NUM_IRQS];
163 qemu_irq ioapic_irq[IOAPIC_NUM_PINS];
164 } GSIState;
165
166 void gsi_handler(void *opaque, int n, int level);
167
168 /* vmport.c */
169 #define TYPE_VMPORT "vmport"
170 typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address);
171
172 static inline void vmport_init(ISABus *bus)
173 {
174 isa_create_simple(bus, TYPE_VMPORT);
175 }
176
177 void vmport_register(unsigned char command, VMPortReadFunc *func, void *opaque);
178 void vmmouse_get_data(uint32_t *data);
179 void vmmouse_set_data(const uint32_t *data);
180
181 /* pc.c */
182 extern int fd_bootchk;
183
184 bool pc_machine_is_smm_enabled(PCMachineState *pcms);
185 void pc_register_ferr_irq(qemu_irq irq);
186 void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
187
188 void pc_cpus_init(PCMachineState *pcms);
189 void pc_hot_add_cpu(const int64_t id, Error **errp);
190 void pc_acpi_init(const char *default_dsdt);
191
192 void pc_guest_info_init(PCMachineState *pcms);
193
194 #define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start"
195 #define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end"
196 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start"
197 #define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end"
198 #define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size"
199 #define PCI_HOST_BELOW_4G_MEM_SIZE "below-4g-mem-size"
200 #define PCI_HOST_ABOVE_4G_MEM_SIZE "above-4g-mem-size"
201
202
203 void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory,
204 MemoryRegion *pci_address_space);
205
206 void xen_load_linux(PCMachineState *pcms);
207 void pc_memory_init(PCMachineState *pcms,
208 MemoryRegion *system_memory,
209 MemoryRegion *rom_memory,
210 MemoryRegion **ram_memory);
211 uint64_t pc_pci_hole64_start(void);
212 qemu_irq pc_allocate_cpu_irq(void);
213 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus);
214 void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
215 ISADevice **rtc_state,
216 bool create_fdctrl,
217 bool no_vmport,
218 bool has_pit,
219 uint32_t hpet_irqs);
220 void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd);
221 void pc_cmos_init(PCMachineState *pcms,
222 BusState *ide0, BusState *ide1,
223 ISADevice *s);
224 void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus, PCIBus *pci_bus);
225 void pc_pci_device_init(PCIBus *pci_bus);
226
227 typedef void (*cpu_set_smm_t)(int smm, void *arg);
228
229 void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name);
230
231 ISADevice *pc_find_fdc0(void);
232 int cmos_get_fd_drive_type(FloppyDriveType fd0);
233
234 #define FW_CFG_IO_BASE 0x510
235
236 #define PORT92_A20_LINE "a20"
237
238 /* acpi_piix.c */
239
240 I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
241 qemu_irq sci_irq, qemu_irq smi_irq,
242 int smm_enabled, DeviceState **piix4_pm);
243
244 /* hpet.c */
245 extern int no_hpet;
246
247 /* piix_pci.c */
248 struct PCII440FXState;
249 typedef struct PCII440FXState PCII440FXState;
250
251 #define TYPE_I440FX_PCI_HOST_BRIDGE "i440FX-pcihost"
252 #define TYPE_I440FX_PCI_DEVICE "i440FX"
253
254 #define TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE "igd-passthrough-i440FX"
255
256 /*
257 * Reset Control Register: PCI-accessible ISA-Compatible Register at address
258 * 0xcf9, provided by the PCI/ISA bridge (PIIX3 PCI function 0, 8086:7000).
259 */
260 #define RCR_IOPORT 0xcf9
261
262 PCIBus *i440fx_init(const char *host_type, const char *pci_type,
263 PCII440FXState **pi440fx_state, int *piix_devfn,
264 ISABus **isa_bus, qemu_irq *pic,
265 MemoryRegion *address_space_mem,
266 MemoryRegion *address_space_io,
267 ram_addr_t ram_size,
268 ram_addr_t below_4g_mem_size,
269 ram_addr_t above_4g_mem_size,
270 MemoryRegion *pci_memory,
271 MemoryRegion *ram_memory);
272
273 PCIBus *find_i440fx(void);
274 /* piix4.c */
275 extern PCIDevice *piix4_dev;
276 int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn);
277
278 /* pc_sysfw.c */
279 void pc_system_firmware_init(MemoryRegion *rom_memory,
280 bool isapc_ram_fw);
281
282 /* acpi-build.c */
283 void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid,
284 const CPUArchIdList *apic_ids, GArray *entry);
285
286 /* e820 types */
287 #define E820_RAM 1
288 #define E820_RESERVED 2
289 #define E820_ACPI 3
290 #define E820_NVS 4
291 #define E820_UNUSABLE 5
292
293 int e820_add_entry(uint64_t, uint64_t, uint32_t);
294 int e820_get_num_entries(void);
295 bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *);
296
297 extern GlobalProperty pc_compat_3_1[];
298 extern const size_t pc_compat_3_1_len;
299
300 extern GlobalProperty pc_compat_3_0[];
301 extern const size_t pc_compat_3_0_len;
302
303 extern GlobalProperty pc_compat_2_12[];
304 extern const size_t pc_compat_2_12_len;
305
306 extern GlobalProperty pc_compat_2_11[];
307 extern const size_t pc_compat_2_11_len;
308
309 extern GlobalProperty pc_compat_2_10[];
310 extern const size_t pc_compat_2_10_len;
311
312 extern GlobalProperty pc_compat_2_9[];
313 extern const size_t pc_compat_2_9_len;
314
315 #define PC_COMPAT_2_8 \
316 HW_COMPAT_2_8 \
317 {\
318 .driver = TYPE_X86_CPU,\
319 .property = "tcg-cpuid",\
320 .value = "off",\
321 },\
322 {\
323 .driver = "kvmclock",\
324 .property = "x-mach-use-reliable-get-clock",\
325 .value = "off",\
326 },\
327 {\
328 .driver = "ICH9-LPC",\
329 .property = "x-smi-broadcast",\
330 .value = "off",\
331 },\
332 {\
333 .driver = TYPE_X86_CPU,\
334 .property = "vmware-cpuid-freq",\
335 .value = "off",\
336 },\
337 {\
338 .driver = "Haswell-" TYPE_X86_CPU,\
339 .property = "stepping",\
340 .value = "1",\
341 },
342
343 #define PC_COMPAT_2_7 \
344 HW_COMPAT_2_7 \
345 {\
346 .driver = TYPE_X86_CPU,\
347 .property = "l3-cache",\
348 .value = "off",\
349 },\
350 {\
351 .driver = TYPE_X86_CPU,\
352 .property = "full-cpuid-auto-level",\
353 .value = "off",\
354 },\
355 {\
356 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\
357 .property = "family",\
358 .value = "15",\
359 },\
360 {\
361 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\
362 .property = "model",\
363 .value = "6",\
364 },\
365 {\
366 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\
367 .property = "stepping",\
368 .value = "1",\
369 },\
370 {\
371 .driver = "isa-pcspk",\
372 .property = "migrate",\
373 .value = "off",\
374 },
375
376 #define PC_COMPAT_2_6 \
377 HW_COMPAT_2_6 \
378 {\
379 .driver = TYPE_X86_CPU,\
380 .property = "cpuid-0xb",\
381 .value = "off",\
382 },{\
383 .driver = "vmxnet3",\
384 .property = "romfile",\
385 .value = "",\
386 },\
387 {\
388 .driver = TYPE_X86_CPU,\
389 .property = "fill-mtrr-mask",\
390 .value = "off",\
391 },\
392 {\
393 .driver = "apic-common",\
394 .property = "legacy-instance-id",\
395 .value = "on",\
396 },
397
398 #define PC_COMPAT_2_5 \
399 HW_COMPAT_2_5
400
401 /* Helper for setting model-id for CPU models that changed model-id
402 * depending on QEMU versions up to QEMU 2.4.
403 */
404 #define PC_CPU_MODEL_IDS(v) \
405 {\
406 .driver = "qemu32-" TYPE_X86_CPU,\
407 .property = "model-id",\
408 .value = "QEMU Virtual CPU version " v,\
409 },\
410 {\
411 .driver = "qemu64-" TYPE_X86_CPU,\
412 .property = "model-id",\
413 .value = "QEMU Virtual CPU version " v,\
414 },\
415 {\
416 .driver = "athlon-" TYPE_X86_CPU,\
417 .property = "model-id",\
418 .value = "QEMU Virtual CPU version " v,\
419 },
420
421 #define PC_COMPAT_2_4 \
422 HW_COMPAT_2_4 \
423 PC_CPU_MODEL_IDS("2.4.0") \
424 {\
425 .driver = "Haswell-" TYPE_X86_CPU,\
426 .property = "abm",\
427 .value = "off",\
428 },\
429 {\
430 .driver = "Haswell-noTSX-" TYPE_X86_CPU,\
431 .property = "abm",\
432 .value = "off",\
433 },\
434 {\
435 .driver = "Broadwell-" TYPE_X86_CPU,\
436 .property = "abm",\
437 .value = "off",\
438 },\
439 {\
440 .driver = "Broadwell-noTSX-" TYPE_X86_CPU,\
441 .property = "abm",\
442 .value = "off",\
443 },\
444 {\
445 .driver = "host" "-" TYPE_X86_CPU,\
446 .property = "host-cache-info",\
447 .value = "on",\
448 },\
449 {\
450 .driver = TYPE_X86_CPU,\
451 .property = "check",\
452 .value = "off",\
453 },\
454 {\
455 .driver = "qemu64" "-" TYPE_X86_CPU,\
456 .property = "sse4a",\
457 .value = "on",\
458 },\
459 {\
460 .driver = "qemu64" "-" TYPE_X86_CPU,\
461 .property = "abm",\
462 .value = "on",\
463 },\
464 {\
465 .driver = "qemu64" "-" TYPE_X86_CPU,\
466 .property = "popcnt",\
467 .value = "on",\
468 },\
469 {\
470 .driver = "qemu32" "-" TYPE_X86_CPU,\
471 .property = "popcnt",\
472 .value = "on",\
473 },{\
474 .driver = "Opteron_G2" "-" TYPE_X86_CPU,\
475 .property = "rdtscp",\
476 .value = "on",\
477 },{\
478 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\
479 .property = "rdtscp",\
480 .value = "on",\
481 },{\
482 .driver = "Opteron_G4" "-" TYPE_X86_CPU,\
483 .property = "rdtscp",\
484 .value = "on",\
485 },{\
486 .driver = "Opteron_G5" "-" TYPE_X86_CPU,\
487 .property = "rdtscp",\
488 .value = "on",\
489 },
490
491
492 #define PC_COMPAT_2_3 \
493 HW_COMPAT_2_3 \
494 PC_CPU_MODEL_IDS("2.3.0") \
495 {\
496 .driver = TYPE_X86_CPU,\
497 .property = "arat",\
498 .value = "off",\
499 },{\
500 .driver = "qemu64" "-" TYPE_X86_CPU,\
501 .property = "min-level",\
502 .value = stringify(4),\
503 },{\
504 .driver = "kvm64" "-" TYPE_X86_CPU,\
505 .property = "min-level",\
506 .value = stringify(5),\
507 },{\
508 .driver = "pentium3" "-" TYPE_X86_CPU,\
509 .property = "min-level",\
510 .value = stringify(2),\
511 },{\
512 .driver = "n270" "-" TYPE_X86_CPU,\
513 .property = "min-level",\
514 .value = stringify(5),\
515 },{\
516 .driver = "Conroe" "-" TYPE_X86_CPU,\
517 .property = "min-level",\
518 .value = stringify(4),\
519 },{\
520 .driver = "Penryn" "-" TYPE_X86_CPU,\
521 .property = "min-level",\
522 .value = stringify(4),\
523 },{\
524 .driver = "Nehalem" "-" TYPE_X86_CPU,\
525 .property = "min-level",\
526 .value = stringify(4),\
527 },{\
528 .driver = "n270" "-" TYPE_X86_CPU,\
529 .property = "min-xlevel",\
530 .value = stringify(0x8000000a),\
531 },{\
532 .driver = "Penryn" "-" TYPE_X86_CPU,\
533 .property = "min-xlevel",\
534 .value = stringify(0x8000000a),\
535 },{\
536 .driver = "Conroe" "-" TYPE_X86_CPU,\
537 .property = "min-xlevel",\
538 .value = stringify(0x8000000a),\
539 },{\
540 .driver = "Nehalem" "-" TYPE_X86_CPU,\
541 .property = "min-xlevel",\
542 .value = stringify(0x8000000a),\
543 },{\
544 .driver = "Westmere" "-" TYPE_X86_CPU,\
545 .property = "min-xlevel",\
546 .value = stringify(0x8000000a),\
547 },{\
548 .driver = "SandyBridge" "-" TYPE_X86_CPU,\
549 .property = "min-xlevel",\
550 .value = stringify(0x8000000a),\
551 },{\
552 .driver = "IvyBridge" "-" TYPE_X86_CPU,\
553 .property = "min-xlevel",\
554 .value = stringify(0x8000000a),\
555 },{\
556 .driver = "Haswell" "-" TYPE_X86_CPU,\
557 .property = "min-xlevel",\
558 .value = stringify(0x8000000a),\
559 },{\
560 .driver = "Haswell-noTSX" "-" TYPE_X86_CPU,\
561 .property = "min-xlevel",\
562 .value = stringify(0x8000000a),\
563 },{\
564 .driver = "Broadwell" "-" TYPE_X86_CPU,\
565 .property = "min-xlevel",\
566 .value = stringify(0x8000000a),\
567 },{\
568 .driver = "Broadwell-noTSX" "-" TYPE_X86_CPU,\
569 .property = "min-xlevel",\
570 .value = stringify(0x8000000a),\
571 },{\
572 .driver = TYPE_X86_CPU,\
573 .property = "kvm-no-smi-migration",\
574 .value = "on",\
575 },
576
577 #define PC_COMPAT_2_2 \
578 HW_COMPAT_2_2 \
579 PC_CPU_MODEL_IDS("2.2.0") \
580 {\
581 .driver = "kvm64" "-" TYPE_X86_CPU,\
582 .property = "vme",\
583 .value = "off",\
584 },\
585 {\
586 .driver = "kvm32" "-" TYPE_X86_CPU,\
587 .property = "vme",\
588 .value = "off",\
589 },\
590 {\
591 .driver = "Conroe" "-" TYPE_X86_CPU,\
592 .property = "vme",\
593 .value = "off",\
594 },\
595 {\
596 .driver = "Penryn" "-" TYPE_X86_CPU,\
597 .property = "vme",\
598 .value = "off",\
599 },\
600 {\
601 .driver = "Nehalem" "-" TYPE_X86_CPU,\
602 .property = "vme",\
603 .value = "off",\
604 },\
605 {\
606 .driver = "Westmere" "-" TYPE_X86_CPU,\
607 .property = "vme",\
608 .value = "off",\
609 },\
610 {\
611 .driver = "SandyBridge" "-" TYPE_X86_CPU,\
612 .property = "vme",\
613 .value = "off",\
614 },\
615 {\
616 .driver = "Haswell" "-" TYPE_X86_CPU,\
617 .property = "vme",\
618 .value = "off",\
619 },\
620 {\
621 .driver = "Broadwell" "-" TYPE_X86_CPU,\
622 .property = "vme",\
623 .value = "off",\
624 },\
625 {\
626 .driver = "Opteron_G1" "-" TYPE_X86_CPU,\
627 .property = "vme",\
628 .value = "off",\
629 },\
630 {\
631 .driver = "Opteron_G2" "-" TYPE_X86_CPU,\
632 .property = "vme",\
633 .value = "off",\
634 },\
635 {\
636 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\
637 .property = "vme",\
638 .value = "off",\
639 },\
640 {\
641 .driver = "Opteron_G4" "-" TYPE_X86_CPU,\
642 .property = "vme",\
643 .value = "off",\
644 },\
645 {\
646 .driver = "Opteron_G5" "-" TYPE_X86_CPU,\
647 .property = "vme",\
648 .value = "off",\
649 },\
650 {\
651 .driver = "Haswell" "-" TYPE_X86_CPU,\
652 .property = "f16c",\
653 .value = "off",\
654 },\
655 {\
656 .driver = "Haswell" "-" TYPE_X86_CPU,\
657 .property = "rdrand",\
658 .value = "off",\
659 },\
660 {\
661 .driver = "Broadwell" "-" TYPE_X86_CPU,\
662 .property = "f16c",\
663 .value = "off",\
664 },\
665 {\
666 .driver = "Broadwell" "-" TYPE_X86_CPU,\
667 .property = "rdrand",\
668 .value = "off",\
669 },
670
671 #define PC_COMPAT_2_1 \
672 HW_COMPAT_2_1 \
673 PC_CPU_MODEL_IDS("2.1.0") \
674 {\
675 .driver = "coreduo" "-" TYPE_X86_CPU,\
676 .property = "vmx",\
677 .value = "on",\
678 },\
679 {\
680 .driver = "core2duo" "-" TYPE_X86_CPU,\
681 .property = "vmx",\
682 .value = "on",\
683 },
684
685 #define PC_COMPAT_2_0 \
686 PC_CPU_MODEL_IDS("2.0.0") \
687 {\
688 .driver = "virtio-scsi-pci",\
689 .property = "any_layout",\
690 .value = "off",\
691 },{\
692 .driver = "PIIX4_PM",\
693 .property = "memory-hotplug-support",\
694 .value = "off",\
695 },\
696 {\
697 .driver = "apic",\
698 .property = "version",\
699 .value = stringify(0x11),\
700 },\
701 {\
702 .driver = "nec-usb-xhci",\
703 .property = "superspeed-ports-first",\
704 .value = "off",\
705 },\
706 {\
707 .driver = "nec-usb-xhci",\
708 .property = "force-pcie-endcap",\
709 .value = "on",\
710 },\
711 {\
712 .driver = "pci-serial",\
713 .property = "prog_if",\
714 .value = stringify(0),\
715 },\
716 {\
717 .driver = "pci-serial-2x",\
718 .property = "prog_if",\
719 .value = stringify(0),\
720 },\
721 {\
722 .driver = "pci-serial-4x",\
723 .property = "prog_if",\
724 .value = stringify(0),\
725 },\
726 {\
727 .driver = "virtio-net-pci",\
728 .property = "guest_announce",\
729 .value = "off",\
730 },\
731 {\
732 .driver = "ICH9-LPC",\
733 .property = "memory-hotplug-support",\
734 .value = "off",\
735 },{\
736 .driver = "xio3130-downstream",\
737 .property = COMPAT_PROP_PCP,\
738 .value = "off",\
739 },{\
740 .driver = "ioh3420",\
741 .property = COMPAT_PROP_PCP,\
742 .value = "off",\
743 },
744
745 #define PC_COMPAT_1_7 \
746 PC_CPU_MODEL_IDS("1.7.0") \
747 {\
748 .driver = TYPE_USB_DEVICE,\
749 .property = "msos-desc",\
750 .value = "no",\
751 },\
752 {\
753 .driver = "PIIX4_PM",\
754 .property = "acpi-pci-hotplug-with-bridge-support",\
755 .value = "off",\
756 },\
757 {\
758 .driver = "hpet",\
759 .property = HPET_INTCAP,\
760 .value = stringify(4),\
761 },
762
763 #define PC_COMPAT_1_6 \
764 PC_CPU_MODEL_IDS("1.6.0") \
765 {\
766 .driver = "e1000",\
767 .property = "mitigation",\
768 .value = "off",\
769 },{\
770 .driver = "qemu64-" TYPE_X86_CPU,\
771 .property = "model",\
772 .value = stringify(2),\
773 },{\
774 .driver = "qemu32-" TYPE_X86_CPU,\
775 .property = "model",\
776 .value = stringify(3),\
777 },{\
778 .driver = "i440FX-pcihost",\
779 .property = "short_root_bus",\
780 .value = stringify(1),\
781 },{\
782 .driver = "q35-pcihost",\
783 .property = "short_root_bus",\
784 .value = stringify(1),\
785 },
786
787 #define PC_COMPAT_1_5 \
788 PC_CPU_MODEL_IDS("1.5.0") \
789 {\
790 .driver = "Conroe-" TYPE_X86_CPU,\
791 .property = "model",\
792 .value = stringify(2),\
793 },{\
794 .driver = "Conroe-" TYPE_X86_CPU,\
795 .property = "min-level",\
796 .value = stringify(2),\
797 },{\
798 .driver = "Penryn-" TYPE_X86_CPU,\
799 .property = "model",\
800 .value = stringify(2),\
801 },{\
802 .driver = "Penryn-" TYPE_X86_CPU,\
803 .property = "min-level",\
804 .value = stringify(2),\
805 },{\
806 .driver = "Nehalem-" TYPE_X86_CPU,\
807 .property = "model",\
808 .value = stringify(2),\
809 },{\
810 .driver = "Nehalem-" TYPE_X86_CPU,\
811 .property = "min-level",\
812 .value = stringify(2),\
813 },{\
814 .driver = "virtio-net-pci",\
815 .property = "any_layout",\
816 .value = "off",\
817 },{\
818 .driver = TYPE_X86_CPU,\
819 .property = "pmu",\
820 .value = "on",\
821 },{\
822 .driver = "i440FX-pcihost",\
823 .property = "short_root_bus",\
824 .value = stringify(0),\
825 },{\
826 .driver = "q35-pcihost",\
827 .property = "short_root_bus",\
828 .value = stringify(0),\
829 },
830
831 #define PC_COMPAT_1_4 \
832 PC_CPU_MODEL_IDS("1.4.0") \
833 {\
834 .driver = "scsi-hd",\
835 .property = "discard_granularity",\
836 .value = stringify(0),\
837 },{\
838 .driver = "scsi-cd",\
839 .property = "discard_granularity",\
840 .value = stringify(0),\
841 },{\
842 .driver = "scsi-disk",\
843 .property = "discard_granularity",\
844 .value = stringify(0),\
845 },{\
846 .driver = "ide-hd",\
847 .property = "discard_granularity",\
848 .value = stringify(0),\
849 },{\
850 .driver = "ide-cd",\
851 .property = "discard_granularity",\
852 .value = stringify(0),\
853 },{\
854 .driver = "ide-drive",\
855 .property = "discard_granularity",\
856 .value = stringify(0),\
857 },{\
858 .driver = "virtio-blk-pci",\
859 .property = "discard_granularity",\
860 .value = stringify(0),\
861 },{\
862 .driver = "virtio-serial-pci",\
863 .property = "vectors",\
864 /* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */\
865 .value = stringify(0xFFFFFFFF),\
866 },{ \
867 .driver = "virtio-net-pci", \
868 .property = "ctrl_guest_offloads", \
869 .value = "off", \
870 },{\
871 .driver = "e1000",\
872 .property = "romfile",\
873 .value = "pxe-e1000.rom",\
874 },{\
875 .driver = "ne2k_pci",\
876 .property = "romfile",\
877 .value = "pxe-ne2k_pci.rom",\
878 },{\
879 .driver = "pcnet",\
880 .property = "romfile",\
881 .value = "pxe-pcnet.rom",\
882 },{\
883 .driver = "rtl8139",\
884 .property = "romfile",\
885 .value = "pxe-rtl8139.rom",\
886 },{\
887 .driver = "virtio-net-pci",\
888 .property = "romfile",\
889 .value = "pxe-virtio.rom",\
890 },{\
891 .driver = "486-" TYPE_X86_CPU,\
892 .property = "model",\
893 .value = stringify(0),\
894 },\
895 {\
896 .driver = "n270" "-" TYPE_X86_CPU,\
897 .property = "movbe",\
898 .value = "off",\
899 },\
900 {\
901 .driver = "Westmere" "-" TYPE_X86_CPU,\
902 .property = "pclmulqdq",\
903 .value = "off",\
904 },
905
906 #define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \
907 static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \
908 { \
909 MachineClass *mc = MACHINE_CLASS(oc); \
910 optsfn(mc); \
911 mc->init = initfn; \
912 } \
913 static const TypeInfo pc_machine_type_##suffix = { \
914 .name = namestr TYPE_MACHINE_SUFFIX, \
915 .parent = TYPE_PC_MACHINE, \
916 .class_init = pc_machine_##suffix##_class_init, \
917 }; \
918 static void pc_machine_init_##suffix(void) \
919 { \
920 type_register(&pc_machine_type_##suffix); \
921 } \
922 type_init(pc_machine_init_##suffix)
923
924 extern void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id);
925 #endif