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compat: replace PC_COMPAT_2_7 & HW_COMPAT_2_7 macros
[mirror_qemu.git] / include / hw / i386 / pc.h
1 #ifndef HW_PC_H
2 #define HW_PC_H
3
4 #include "qemu-common.h"
5 #include "exec/memory.h"
6 #include "hw/boards.h"
7 #include "hw/isa/isa.h"
8 #include "hw/block/fdc.h"
9 #include "net/net.h"
10 #include "hw/i386/ioapic.h"
11
12 #include "qemu/range.h"
13 #include "qemu/bitmap.h"
14 #include "sysemu/sysemu.h"
15 #include "hw/pci/pci.h"
16 #include "hw/compat.h"
17 #include "hw/mem/pc-dimm.h"
18 #include "hw/mem/nvdimm.h"
19 #include "hw/acpi/acpi_dev_interface.h"
20
21 #define HPET_INTCAP "hpet-intcap"
22
23 /**
24 * PCMachineState:
25 * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling
26 * @boot_cpus: number of present VCPUs
27 */
28 struct PCMachineState {
29 /*< private >*/
30 MachineState parent_obj;
31
32 /* <public> */
33
34 /* State for other subsystems/APIs: */
35 Notifier machine_done;
36
37 /* Pointers to devices and objects: */
38 HotplugHandler *acpi_dev;
39 ISADevice *rtc;
40 PCIBus *bus;
41 FWCfgState *fw_cfg;
42 qemu_irq *gsi;
43
44 /* Configuration options: */
45 uint64_t max_ram_below_4g;
46 OnOffAuto vmport;
47 OnOffAuto smm;
48
49 AcpiNVDIMMState acpi_nvdimm_state;
50
51 bool acpi_build_enabled;
52 bool smbus_enabled;
53 bool sata_enabled;
54 bool pit_enabled;
55
56 /* RAM information (sizes, addresses, configuration): */
57 ram_addr_t below_4g_mem_size, above_4g_mem_size;
58
59 /* CPU and apic information: */
60 bool apic_xrupt_override;
61 unsigned apic_id_limit;
62 uint16_t boot_cpus;
63
64 /* NUMA information: */
65 uint64_t numa_nodes;
66 uint64_t *node_mem;
67
68 /* Address space used by IOAPIC device. All IOAPIC interrupts
69 * will be translated to MSI messages in the address space. */
70 AddressSpace *ioapic_as;
71 };
72
73 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device"
74 #define PC_MACHINE_DEVMEM_REGION_SIZE "device-memory-region-size"
75 #define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g"
76 #define PC_MACHINE_VMPORT "vmport"
77 #define PC_MACHINE_SMM "smm"
78 #define PC_MACHINE_NVDIMM "nvdimm"
79 #define PC_MACHINE_NVDIMM_PERSIST "nvdimm-persistence"
80 #define PC_MACHINE_SMBUS "smbus"
81 #define PC_MACHINE_SATA "sata"
82 #define PC_MACHINE_PIT "pit"
83
84 /**
85 * PCMachineClass:
86 *
87 * Compat fields:
88 *
89 * @enforce_aligned_dimm: check that DIMM's address/size is aligned by
90 * backend's alignment value if provided
91 * @acpi_data_size: Size of the chunk of memory at the top of RAM
92 * for the BIOS ACPI tables and other BIOS
93 * datastructures.
94 * @gigabyte_align: Make sure that guest addresses aligned at
95 * 1Gbyte boundaries get mapped to host
96 * addresses aligned at 1Gbyte boundaries. This
97 * way we can use 1GByte pages in the host.
98 *
99 */
100 struct PCMachineClass {
101 /*< private >*/
102 MachineClass parent_class;
103
104 /*< public >*/
105
106 /* Device configuration: */
107 bool pci_enabled;
108 bool kvmclock_enabled;
109 const char *default_nic_model;
110
111 /* Compat options: */
112
113 /* ACPI compat: */
114 bool has_acpi_build;
115 bool rsdp_in_ram;
116 int legacy_acpi_table_size;
117 unsigned acpi_data_size;
118
119 /* SMBIOS compat: */
120 bool smbios_defaults;
121 bool smbios_legacy_mode;
122 bool smbios_uuid_encoded;
123
124 /* RAM / address space compat: */
125 bool gigabyte_align;
126 bool has_reserved_memory;
127 bool enforce_aligned_dimm;
128 bool broken_reserved_end;
129
130 /* TSC rate migration: */
131 bool save_tsc_khz;
132 /* generate legacy CPU hotplug AML */
133 bool legacy_cpu_hotplug;
134
135 /* use DMA capable linuxboot option rom */
136 bool linuxboot_dma_enabled;
137 };
138
139 #define TYPE_PC_MACHINE "generic-pc-machine"
140 #define PC_MACHINE(obj) \
141 OBJECT_CHECK(PCMachineState, (obj), TYPE_PC_MACHINE)
142 #define PC_MACHINE_GET_CLASS(obj) \
143 OBJECT_GET_CLASS(PCMachineClass, (obj), TYPE_PC_MACHINE)
144 #define PC_MACHINE_CLASS(klass) \
145 OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE)
146
147 /* i8259.c */
148
149 extern DeviceState *isa_pic;
150 qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq);
151 qemu_irq *kvm_i8259_init(ISABus *bus);
152 int pic_read_irq(DeviceState *d);
153 int pic_get_output(DeviceState *d);
154
155 /* ioapic.c */
156
157 /* Global System Interrupts */
158
159 #define GSI_NUM_PINS IOAPIC_NUM_PINS
160
161 typedef struct GSIState {
162 qemu_irq i8259_irq[ISA_NUM_IRQS];
163 qemu_irq ioapic_irq[IOAPIC_NUM_PINS];
164 } GSIState;
165
166 void gsi_handler(void *opaque, int n, int level);
167
168 /* vmport.c */
169 #define TYPE_VMPORT "vmport"
170 typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address);
171
172 static inline void vmport_init(ISABus *bus)
173 {
174 isa_create_simple(bus, TYPE_VMPORT);
175 }
176
177 void vmport_register(unsigned char command, VMPortReadFunc *func, void *opaque);
178 void vmmouse_get_data(uint32_t *data);
179 void vmmouse_set_data(const uint32_t *data);
180
181 /* pc.c */
182 extern int fd_bootchk;
183
184 bool pc_machine_is_smm_enabled(PCMachineState *pcms);
185 void pc_register_ferr_irq(qemu_irq irq);
186 void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
187
188 void pc_cpus_init(PCMachineState *pcms);
189 void pc_hot_add_cpu(const int64_t id, Error **errp);
190 void pc_acpi_init(const char *default_dsdt);
191
192 void pc_guest_info_init(PCMachineState *pcms);
193
194 #define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start"
195 #define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end"
196 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start"
197 #define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end"
198 #define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size"
199 #define PCI_HOST_BELOW_4G_MEM_SIZE "below-4g-mem-size"
200 #define PCI_HOST_ABOVE_4G_MEM_SIZE "above-4g-mem-size"
201
202
203 void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory,
204 MemoryRegion *pci_address_space);
205
206 void xen_load_linux(PCMachineState *pcms);
207 void pc_memory_init(PCMachineState *pcms,
208 MemoryRegion *system_memory,
209 MemoryRegion *rom_memory,
210 MemoryRegion **ram_memory);
211 uint64_t pc_pci_hole64_start(void);
212 qemu_irq pc_allocate_cpu_irq(void);
213 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus);
214 void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
215 ISADevice **rtc_state,
216 bool create_fdctrl,
217 bool no_vmport,
218 bool has_pit,
219 uint32_t hpet_irqs);
220 void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd);
221 void pc_cmos_init(PCMachineState *pcms,
222 BusState *ide0, BusState *ide1,
223 ISADevice *s);
224 void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus, PCIBus *pci_bus);
225 void pc_pci_device_init(PCIBus *pci_bus);
226
227 typedef void (*cpu_set_smm_t)(int smm, void *arg);
228
229 void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name);
230
231 ISADevice *pc_find_fdc0(void);
232 int cmos_get_fd_drive_type(FloppyDriveType fd0);
233
234 #define FW_CFG_IO_BASE 0x510
235
236 #define PORT92_A20_LINE "a20"
237
238 /* acpi_piix.c */
239
240 I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
241 qemu_irq sci_irq, qemu_irq smi_irq,
242 int smm_enabled, DeviceState **piix4_pm);
243
244 /* hpet.c */
245 extern int no_hpet;
246
247 /* piix_pci.c */
248 struct PCII440FXState;
249 typedef struct PCII440FXState PCII440FXState;
250
251 #define TYPE_I440FX_PCI_HOST_BRIDGE "i440FX-pcihost"
252 #define TYPE_I440FX_PCI_DEVICE "i440FX"
253
254 #define TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE "igd-passthrough-i440FX"
255
256 /*
257 * Reset Control Register: PCI-accessible ISA-Compatible Register at address
258 * 0xcf9, provided by the PCI/ISA bridge (PIIX3 PCI function 0, 8086:7000).
259 */
260 #define RCR_IOPORT 0xcf9
261
262 PCIBus *i440fx_init(const char *host_type, const char *pci_type,
263 PCII440FXState **pi440fx_state, int *piix_devfn,
264 ISABus **isa_bus, qemu_irq *pic,
265 MemoryRegion *address_space_mem,
266 MemoryRegion *address_space_io,
267 ram_addr_t ram_size,
268 ram_addr_t below_4g_mem_size,
269 ram_addr_t above_4g_mem_size,
270 MemoryRegion *pci_memory,
271 MemoryRegion *ram_memory);
272
273 PCIBus *find_i440fx(void);
274 /* piix4.c */
275 extern PCIDevice *piix4_dev;
276 int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn);
277
278 /* pc_sysfw.c */
279 void pc_system_firmware_init(MemoryRegion *rom_memory,
280 bool isapc_ram_fw);
281
282 /* acpi-build.c */
283 void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid,
284 const CPUArchIdList *apic_ids, GArray *entry);
285
286 /* e820 types */
287 #define E820_RAM 1
288 #define E820_RESERVED 2
289 #define E820_ACPI 3
290 #define E820_NVS 4
291 #define E820_UNUSABLE 5
292
293 int e820_add_entry(uint64_t, uint64_t, uint32_t);
294 int e820_get_num_entries(void);
295 bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *);
296
297 extern GlobalProperty pc_compat_3_1[];
298 extern const size_t pc_compat_3_1_len;
299
300 extern GlobalProperty pc_compat_3_0[];
301 extern const size_t pc_compat_3_0_len;
302
303 extern GlobalProperty pc_compat_2_12[];
304 extern const size_t pc_compat_2_12_len;
305
306 extern GlobalProperty pc_compat_2_11[];
307 extern const size_t pc_compat_2_11_len;
308
309 extern GlobalProperty pc_compat_2_10[];
310 extern const size_t pc_compat_2_10_len;
311
312 extern GlobalProperty pc_compat_2_9[];
313 extern const size_t pc_compat_2_9_len;
314
315 extern GlobalProperty pc_compat_2_8[];
316 extern const size_t pc_compat_2_8_len;
317
318 extern GlobalProperty pc_compat_2_7[];
319 extern const size_t pc_compat_2_7_len;
320
321 #define PC_COMPAT_2_6 \
322 HW_COMPAT_2_6 \
323 {\
324 .driver = TYPE_X86_CPU,\
325 .property = "cpuid-0xb",\
326 .value = "off",\
327 },{\
328 .driver = "vmxnet3",\
329 .property = "romfile",\
330 .value = "",\
331 },\
332 {\
333 .driver = TYPE_X86_CPU,\
334 .property = "fill-mtrr-mask",\
335 .value = "off",\
336 },\
337 {\
338 .driver = "apic-common",\
339 .property = "legacy-instance-id",\
340 .value = "on",\
341 },
342
343 #define PC_COMPAT_2_5 \
344 HW_COMPAT_2_5
345
346 /* Helper for setting model-id for CPU models that changed model-id
347 * depending on QEMU versions up to QEMU 2.4.
348 */
349 #define PC_CPU_MODEL_IDS(v) \
350 {\
351 .driver = "qemu32-" TYPE_X86_CPU,\
352 .property = "model-id",\
353 .value = "QEMU Virtual CPU version " v,\
354 },\
355 {\
356 .driver = "qemu64-" TYPE_X86_CPU,\
357 .property = "model-id",\
358 .value = "QEMU Virtual CPU version " v,\
359 },\
360 {\
361 .driver = "athlon-" TYPE_X86_CPU,\
362 .property = "model-id",\
363 .value = "QEMU Virtual CPU version " v,\
364 },
365
366 #define PC_COMPAT_2_4 \
367 HW_COMPAT_2_4 \
368 PC_CPU_MODEL_IDS("2.4.0") \
369 {\
370 .driver = "Haswell-" TYPE_X86_CPU,\
371 .property = "abm",\
372 .value = "off",\
373 },\
374 {\
375 .driver = "Haswell-noTSX-" TYPE_X86_CPU,\
376 .property = "abm",\
377 .value = "off",\
378 },\
379 {\
380 .driver = "Broadwell-" TYPE_X86_CPU,\
381 .property = "abm",\
382 .value = "off",\
383 },\
384 {\
385 .driver = "Broadwell-noTSX-" TYPE_X86_CPU,\
386 .property = "abm",\
387 .value = "off",\
388 },\
389 {\
390 .driver = "host" "-" TYPE_X86_CPU,\
391 .property = "host-cache-info",\
392 .value = "on",\
393 },\
394 {\
395 .driver = TYPE_X86_CPU,\
396 .property = "check",\
397 .value = "off",\
398 },\
399 {\
400 .driver = "qemu64" "-" TYPE_X86_CPU,\
401 .property = "sse4a",\
402 .value = "on",\
403 },\
404 {\
405 .driver = "qemu64" "-" TYPE_X86_CPU,\
406 .property = "abm",\
407 .value = "on",\
408 },\
409 {\
410 .driver = "qemu64" "-" TYPE_X86_CPU,\
411 .property = "popcnt",\
412 .value = "on",\
413 },\
414 {\
415 .driver = "qemu32" "-" TYPE_X86_CPU,\
416 .property = "popcnt",\
417 .value = "on",\
418 },{\
419 .driver = "Opteron_G2" "-" TYPE_X86_CPU,\
420 .property = "rdtscp",\
421 .value = "on",\
422 },{\
423 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\
424 .property = "rdtscp",\
425 .value = "on",\
426 },{\
427 .driver = "Opteron_G4" "-" TYPE_X86_CPU,\
428 .property = "rdtscp",\
429 .value = "on",\
430 },{\
431 .driver = "Opteron_G5" "-" TYPE_X86_CPU,\
432 .property = "rdtscp",\
433 .value = "on",\
434 },
435
436
437 #define PC_COMPAT_2_3 \
438 HW_COMPAT_2_3 \
439 PC_CPU_MODEL_IDS("2.3.0") \
440 {\
441 .driver = TYPE_X86_CPU,\
442 .property = "arat",\
443 .value = "off",\
444 },{\
445 .driver = "qemu64" "-" TYPE_X86_CPU,\
446 .property = "min-level",\
447 .value = stringify(4),\
448 },{\
449 .driver = "kvm64" "-" TYPE_X86_CPU,\
450 .property = "min-level",\
451 .value = stringify(5),\
452 },{\
453 .driver = "pentium3" "-" TYPE_X86_CPU,\
454 .property = "min-level",\
455 .value = stringify(2),\
456 },{\
457 .driver = "n270" "-" TYPE_X86_CPU,\
458 .property = "min-level",\
459 .value = stringify(5),\
460 },{\
461 .driver = "Conroe" "-" TYPE_X86_CPU,\
462 .property = "min-level",\
463 .value = stringify(4),\
464 },{\
465 .driver = "Penryn" "-" TYPE_X86_CPU,\
466 .property = "min-level",\
467 .value = stringify(4),\
468 },{\
469 .driver = "Nehalem" "-" TYPE_X86_CPU,\
470 .property = "min-level",\
471 .value = stringify(4),\
472 },{\
473 .driver = "n270" "-" TYPE_X86_CPU,\
474 .property = "min-xlevel",\
475 .value = stringify(0x8000000a),\
476 },{\
477 .driver = "Penryn" "-" TYPE_X86_CPU,\
478 .property = "min-xlevel",\
479 .value = stringify(0x8000000a),\
480 },{\
481 .driver = "Conroe" "-" TYPE_X86_CPU,\
482 .property = "min-xlevel",\
483 .value = stringify(0x8000000a),\
484 },{\
485 .driver = "Nehalem" "-" TYPE_X86_CPU,\
486 .property = "min-xlevel",\
487 .value = stringify(0x8000000a),\
488 },{\
489 .driver = "Westmere" "-" TYPE_X86_CPU,\
490 .property = "min-xlevel",\
491 .value = stringify(0x8000000a),\
492 },{\
493 .driver = "SandyBridge" "-" TYPE_X86_CPU,\
494 .property = "min-xlevel",\
495 .value = stringify(0x8000000a),\
496 },{\
497 .driver = "IvyBridge" "-" TYPE_X86_CPU,\
498 .property = "min-xlevel",\
499 .value = stringify(0x8000000a),\
500 },{\
501 .driver = "Haswell" "-" TYPE_X86_CPU,\
502 .property = "min-xlevel",\
503 .value = stringify(0x8000000a),\
504 },{\
505 .driver = "Haswell-noTSX" "-" TYPE_X86_CPU,\
506 .property = "min-xlevel",\
507 .value = stringify(0x8000000a),\
508 },{\
509 .driver = "Broadwell" "-" TYPE_X86_CPU,\
510 .property = "min-xlevel",\
511 .value = stringify(0x8000000a),\
512 },{\
513 .driver = "Broadwell-noTSX" "-" TYPE_X86_CPU,\
514 .property = "min-xlevel",\
515 .value = stringify(0x8000000a),\
516 },{\
517 .driver = TYPE_X86_CPU,\
518 .property = "kvm-no-smi-migration",\
519 .value = "on",\
520 },
521
522 #define PC_COMPAT_2_2 \
523 HW_COMPAT_2_2 \
524 PC_CPU_MODEL_IDS("2.2.0") \
525 {\
526 .driver = "kvm64" "-" TYPE_X86_CPU,\
527 .property = "vme",\
528 .value = "off",\
529 },\
530 {\
531 .driver = "kvm32" "-" TYPE_X86_CPU,\
532 .property = "vme",\
533 .value = "off",\
534 },\
535 {\
536 .driver = "Conroe" "-" TYPE_X86_CPU,\
537 .property = "vme",\
538 .value = "off",\
539 },\
540 {\
541 .driver = "Penryn" "-" TYPE_X86_CPU,\
542 .property = "vme",\
543 .value = "off",\
544 },\
545 {\
546 .driver = "Nehalem" "-" TYPE_X86_CPU,\
547 .property = "vme",\
548 .value = "off",\
549 },\
550 {\
551 .driver = "Westmere" "-" TYPE_X86_CPU,\
552 .property = "vme",\
553 .value = "off",\
554 },\
555 {\
556 .driver = "SandyBridge" "-" TYPE_X86_CPU,\
557 .property = "vme",\
558 .value = "off",\
559 },\
560 {\
561 .driver = "Haswell" "-" TYPE_X86_CPU,\
562 .property = "vme",\
563 .value = "off",\
564 },\
565 {\
566 .driver = "Broadwell" "-" TYPE_X86_CPU,\
567 .property = "vme",\
568 .value = "off",\
569 },\
570 {\
571 .driver = "Opteron_G1" "-" TYPE_X86_CPU,\
572 .property = "vme",\
573 .value = "off",\
574 },\
575 {\
576 .driver = "Opteron_G2" "-" TYPE_X86_CPU,\
577 .property = "vme",\
578 .value = "off",\
579 },\
580 {\
581 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\
582 .property = "vme",\
583 .value = "off",\
584 },\
585 {\
586 .driver = "Opteron_G4" "-" TYPE_X86_CPU,\
587 .property = "vme",\
588 .value = "off",\
589 },\
590 {\
591 .driver = "Opteron_G5" "-" TYPE_X86_CPU,\
592 .property = "vme",\
593 .value = "off",\
594 },\
595 {\
596 .driver = "Haswell" "-" TYPE_X86_CPU,\
597 .property = "f16c",\
598 .value = "off",\
599 },\
600 {\
601 .driver = "Haswell" "-" TYPE_X86_CPU,\
602 .property = "rdrand",\
603 .value = "off",\
604 },\
605 {\
606 .driver = "Broadwell" "-" TYPE_X86_CPU,\
607 .property = "f16c",\
608 .value = "off",\
609 },\
610 {\
611 .driver = "Broadwell" "-" TYPE_X86_CPU,\
612 .property = "rdrand",\
613 .value = "off",\
614 },
615
616 #define PC_COMPAT_2_1 \
617 HW_COMPAT_2_1 \
618 PC_CPU_MODEL_IDS("2.1.0") \
619 {\
620 .driver = "coreduo" "-" TYPE_X86_CPU,\
621 .property = "vmx",\
622 .value = "on",\
623 },\
624 {\
625 .driver = "core2duo" "-" TYPE_X86_CPU,\
626 .property = "vmx",\
627 .value = "on",\
628 },
629
630 #define PC_COMPAT_2_0 \
631 PC_CPU_MODEL_IDS("2.0.0") \
632 {\
633 .driver = "virtio-scsi-pci",\
634 .property = "any_layout",\
635 .value = "off",\
636 },{\
637 .driver = "PIIX4_PM",\
638 .property = "memory-hotplug-support",\
639 .value = "off",\
640 },\
641 {\
642 .driver = "apic",\
643 .property = "version",\
644 .value = stringify(0x11),\
645 },\
646 {\
647 .driver = "nec-usb-xhci",\
648 .property = "superspeed-ports-first",\
649 .value = "off",\
650 },\
651 {\
652 .driver = "nec-usb-xhci",\
653 .property = "force-pcie-endcap",\
654 .value = "on",\
655 },\
656 {\
657 .driver = "pci-serial",\
658 .property = "prog_if",\
659 .value = stringify(0),\
660 },\
661 {\
662 .driver = "pci-serial-2x",\
663 .property = "prog_if",\
664 .value = stringify(0),\
665 },\
666 {\
667 .driver = "pci-serial-4x",\
668 .property = "prog_if",\
669 .value = stringify(0),\
670 },\
671 {\
672 .driver = "virtio-net-pci",\
673 .property = "guest_announce",\
674 .value = "off",\
675 },\
676 {\
677 .driver = "ICH9-LPC",\
678 .property = "memory-hotplug-support",\
679 .value = "off",\
680 },{\
681 .driver = "xio3130-downstream",\
682 .property = COMPAT_PROP_PCP,\
683 .value = "off",\
684 },{\
685 .driver = "ioh3420",\
686 .property = COMPAT_PROP_PCP,\
687 .value = "off",\
688 },
689
690 #define PC_COMPAT_1_7 \
691 PC_CPU_MODEL_IDS("1.7.0") \
692 {\
693 .driver = TYPE_USB_DEVICE,\
694 .property = "msos-desc",\
695 .value = "no",\
696 },\
697 {\
698 .driver = "PIIX4_PM",\
699 .property = "acpi-pci-hotplug-with-bridge-support",\
700 .value = "off",\
701 },\
702 {\
703 .driver = "hpet",\
704 .property = HPET_INTCAP,\
705 .value = stringify(4),\
706 },
707
708 #define PC_COMPAT_1_6 \
709 PC_CPU_MODEL_IDS("1.6.0") \
710 {\
711 .driver = "e1000",\
712 .property = "mitigation",\
713 .value = "off",\
714 },{\
715 .driver = "qemu64-" TYPE_X86_CPU,\
716 .property = "model",\
717 .value = stringify(2),\
718 },{\
719 .driver = "qemu32-" TYPE_X86_CPU,\
720 .property = "model",\
721 .value = stringify(3),\
722 },{\
723 .driver = "i440FX-pcihost",\
724 .property = "short_root_bus",\
725 .value = stringify(1),\
726 },{\
727 .driver = "q35-pcihost",\
728 .property = "short_root_bus",\
729 .value = stringify(1),\
730 },
731
732 #define PC_COMPAT_1_5 \
733 PC_CPU_MODEL_IDS("1.5.0") \
734 {\
735 .driver = "Conroe-" TYPE_X86_CPU,\
736 .property = "model",\
737 .value = stringify(2),\
738 },{\
739 .driver = "Conroe-" TYPE_X86_CPU,\
740 .property = "min-level",\
741 .value = stringify(2),\
742 },{\
743 .driver = "Penryn-" TYPE_X86_CPU,\
744 .property = "model",\
745 .value = stringify(2),\
746 },{\
747 .driver = "Penryn-" TYPE_X86_CPU,\
748 .property = "min-level",\
749 .value = stringify(2),\
750 },{\
751 .driver = "Nehalem-" TYPE_X86_CPU,\
752 .property = "model",\
753 .value = stringify(2),\
754 },{\
755 .driver = "Nehalem-" TYPE_X86_CPU,\
756 .property = "min-level",\
757 .value = stringify(2),\
758 },{\
759 .driver = "virtio-net-pci",\
760 .property = "any_layout",\
761 .value = "off",\
762 },{\
763 .driver = TYPE_X86_CPU,\
764 .property = "pmu",\
765 .value = "on",\
766 },{\
767 .driver = "i440FX-pcihost",\
768 .property = "short_root_bus",\
769 .value = stringify(0),\
770 },{\
771 .driver = "q35-pcihost",\
772 .property = "short_root_bus",\
773 .value = stringify(0),\
774 },
775
776 #define PC_COMPAT_1_4 \
777 PC_CPU_MODEL_IDS("1.4.0") \
778 {\
779 .driver = "scsi-hd",\
780 .property = "discard_granularity",\
781 .value = stringify(0),\
782 },{\
783 .driver = "scsi-cd",\
784 .property = "discard_granularity",\
785 .value = stringify(0),\
786 },{\
787 .driver = "scsi-disk",\
788 .property = "discard_granularity",\
789 .value = stringify(0),\
790 },{\
791 .driver = "ide-hd",\
792 .property = "discard_granularity",\
793 .value = stringify(0),\
794 },{\
795 .driver = "ide-cd",\
796 .property = "discard_granularity",\
797 .value = stringify(0),\
798 },{\
799 .driver = "ide-drive",\
800 .property = "discard_granularity",\
801 .value = stringify(0),\
802 },{\
803 .driver = "virtio-blk-pci",\
804 .property = "discard_granularity",\
805 .value = stringify(0),\
806 },{\
807 .driver = "virtio-serial-pci",\
808 .property = "vectors",\
809 /* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */\
810 .value = stringify(0xFFFFFFFF),\
811 },{ \
812 .driver = "virtio-net-pci", \
813 .property = "ctrl_guest_offloads", \
814 .value = "off", \
815 },{\
816 .driver = "e1000",\
817 .property = "romfile",\
818 .value = "pxe-e1000.rom",\
819 },{\
820 .driver = "ne2k_pci",\
821 .property = "romfile",\
822 .value = "pxe-ne2k_pci.rom",\
823 },{\
824 .driver = "pcnet",\
825 .property = "romfile",\
826 .value = "pxe-pcnet.rom",\
827 },{\
828 .driver = "rtl8139",\
829 .property = "romfile",\
830 .value = "pxe-rtl8139.rom",\
831 },{\
832 .driver = "virtio-net-pci",\
833 .property = "romfile",\
834 .value = "pxe-virtio.rom",\
835 },{\
836 .driver = "486-" TYPE_X86_CPU,\
837 .property = "model",\
838 .value = stringify(0),\
839 },\
840 {\
841 .driver = "n270" "-" TYPE_X86_CPU,\
842 .property = "movbe",\
843 .value = "off",\
844 },\
845 {\
846 .driver = "Westmere" "-" TYPE_X86_CPU,\
847 .property = "pclmulqdq",\
848 .value = "off",\
849 },
850
851 #define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \
852 static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \
853 { \
854 MachineClass *mc = MACHINE_CLASS(oc); \
855 optsfn(mc); \
856 mc->init = initfn; \
857 } \
858 static const TypeInfo pc_machine_type_##suffix = { \
859 .name = namestr TYPE_MACHINE_SUFFIX, \
860 .parent = TYPE_PC_MACHINE, \
861 .class_init = pc_machine_##suffix##_class_init, \
862 }; \
863 static void pc_machine_init_##suffix(void) \
864 { \
865 type_register(&pc_machine_type_##suffix); \
866 } \
867 type_init(pc_machine_init_##suffix)
868
869 extern void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id);
870 #endif