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1 #ifndef HW_PC_H
2 #define HW_PC_H
3
4 #include "qemu-common.h"
5 #include "qemu/typedefs.h"
6 #include "exec/memory.h"
7 #include "hw/boards.h"
8 #include "hw/isa/isa.h"
9 #include "hw/block/fdc.h"
10 #include "net/net.h"
11 #include "hw/i386/ioapic.h"
12
13 #include "qemu/range.h"
14 #include "qemu/bitmap.h"
15 #include "sysemu/sysemu.h"
16 #include "hw/pci/pci.h"
17 #include "hw/boards.h"
18 #include "hw/compat.h"
19 #include "hw/mem/pc-dimm.h"
20
21 #define HPET_INTCAP "hpet-intcap"
22
23 #ifdef CONFIG_KVM
24 #define kvm_pit_in_kernel() \
25 (kvm_irqchip_in_kernel() && !kvm_irqchip_is_split())
26 #define kvm_pic_in_kernel() \
27 (kvm_irqchip_in_kernel() && !kvm_irqchip_is_split())
28 #define kvm_ioapic_in_kernel() \
29 (kvm_irqchip_in_kernel() && !kvm_irqchip_is_split())
30 #else
31 #define kvm_pit_in_kernel() 0
32 #define kvm_pic_in_kernel() 0
33 #define kvm_ioapic_in_kernel() 0
34 #endif
35
36 /**
37 * PCMachineState:
38 * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling
39 */
40 struct PCMachineState {
41 /*< private >*/
42 MachineState parent_obj;
43
44 /* <public> */
45
46 /* State for other subsystems/APIs: */
47 MemoryHotplugState hotplug_memory;
48
49 /* Pointers to devices and objects: */
50 HotplugHandler *acpi_dev;
51 ISADevice *rtc;
52 PCIBus *bus;
53
54 /* Configuration options: */
55 uint64_t max_ram_below_4g;
56 OnOffAuto vmport;
57 OnOffAuto smm;
58 bool nvdimm;
59
60 /* RAM information (sizes, addresses, configuration): */
61 ram_addr_t below_4g_mem_size, above_4g_mem_size;
62 };
63
64 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device"
65 #define PC_MACHINE_MEMHP_REGION_SIZE "hotplug-memory-region-size"
66 #define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g"
67 #define PC_MACHINE_VMPORT "vmport"
68 #define PC_MACHINE_SMM "smm"
69 #define PC_MACHINE_NVDIMM "nvdimm"
70
71 /**
72 * PCMachineClass:
73 *
74 * Methods:
75 *
76 * @get_hotplug_handler: pointer to parent class callback @get_hotplug_handler
77 *
78 * Compat fields:
79 *
80 * @enforce_aligned_dimm: check that DIMM's address/size is aligned by
81 * backend's alignment value if provided
82 * @acpi_data_size: Size of the chunk of memory at the top of RAM
83 * for the BIOS ACPI tables and other BIOS
84 * datastructures.
85 * @gigabyte_align: Make sure that guest addresses aligned at
86 * 1Gbyte boundaries get mapped to host
87 * addresses aligned at 1Gbyte boundaries. This
88 * way we can use 1GByte pages in the host.
89 *
90 */
91 struct PCMachineClass {
92 /*< private >*/
93 MachineClass parent_class;
94
95 /*< public >*/
96
97 /* Methods: */
98 HotplugHandler *(*get_hotplug_handler)(MachineState *machine,
99 DeviceState *dev);
100
101 /* Device configuration: */
102 bool pci_enabled;
103 bool kvmclock_enabled;
104
105 /* Compat options: */
106
107 /* ACPI compat: */
108 bool has_acpi_build;
109 bool rsdp_in_ram;
110 int legacy_acpi_table_size;
111 unsigned acpi_data_size;
112
113 /* SMBIOS compat: */
114 bool smbios_defaults;
115 bool smbios_legacy_mode;
116 bool smbios_uuid_encoded;
117
118 /* RAM / address space compat: */
119 bool gigabyte_align;
120 bool has_reserved_memory;
121 bool enforce_aligned_dimm;
122 bool broken_reserved_end;
123 };
124
125 #define TYPE_PC_MACHINE "generic-pc-machine"
126 #define PC_MACHINE(obj) \
127 OBJECT_CHECK(PCMachineState, (obj), TYPE_PC_MACHINE)
128 #define PC_MACHINE_GET_CLASS(obj) \
129 OBJECT_GET_CLASS(PCMachineClass, (obj), TYPE_PC_MACHINE)
130 #define PC_MACHINE_CLASS(klass) \
131 OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE)
132
133 /* PC-style peripherals (also used by other machines). */
134
135 typedef struct PcPciInfo {
136 Range w32;
137 Range w64;
138 } PcPciInfo;
139
140 #define ACPI_PM_PROP_S3_DISABLED "disable_s3"
141 #define ACPI_PM_PROP_S4_DISABLED "disable_s4"
142 #define ACPI_PM_PROP_S4_VAL "s4_val"
143 #define ACPI_PM_PROP_SCI_INT "sci_int"
144 #define ACPI_PM_PROP_ACPI_ENABLE_CMD "acpi_enable_cmd"
145 #define ACPI_PM_PROP_ACPI_DISABLE_CMD "acpi_disable_cmd"
146 #define ACPI_PM_PROP_PM_IO_BASE "pm_io_base"
147 #define ACPI_PM_PROP_GPE0_BLK "gpe0_blk"
148 #define ACPI_PM_PROP_GPE0_BLK_LEN "gpe0_blk_len"
149 #define ACPI_PM_PROP_TCO_ENABLED "enable_tco"
150
151 struct PcGuestInfo {
152 bool isapc_ram_fw;
153 hwaddr ram_size, ram_size_below_4g;
154 unsigned apic_id_limit;
155 bool apic_xrupt_override;
156 uint64_t numa_nodes;
157 uint64_t *node_mem;
158 uint64_t *node_cpu;
159 FWCfgState *fw_cfg;
160 int legacy_acpi_table_size;
161 bool has_acpi_build;
162 bool has_reserved_memory;
163 bool rsdp_in_ram;
164 };
165
166 /* parallel.c */
167
168 void parallel_hds_isa_init(ISABus *bus, int n);
169
170 bool parallel_mm_init(MemoryRegion *address_space,
171 hwaddr base, int it_shift, qemu_irq irq,
172 CharDriverState *chr);
173
174 /* i8259.c */
175
176 extern DeviceState *isa_pic;
177 qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq);
178 qemu_irq *kvm_i8259_init(ISABus *bus);
179 int pic_read_irq(DeviceState *d);
180 int pic_get_output(DeviceState *d);
181 void hmp_info_pic(Monitor *mon, const QDict *qdict);
182 void hmp_info_irq(Monitor *mon, const QDict *qdict);
183
184 /* ioapic.c */
185
186 void kvm_ioapic_dump_state(Monitor *mon, const QDict *qdict);
187 void ioapic_dump_state(Monitor *mon, const QDict *qdict);
188
189 /* Global System Interrupts */
190
191 #define GSI_NUM_PINS IOAPIC_NUM_PINS
192
193 typedef struct GSIState {
194 qemu_irq i8259_irq[ISA_NUM_IRQS];
195 qemu_irq ioapic_irq[IOAPIC_NUM_PINS];
196 } GSIState;
197
198 void gsi_handler(void *opaque, int n, int level);
199
200 /* vmport.c */
201 typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address);
202
203 static inline void vmport_init(ISABus *bus)
204 {
205 isa_create_simple(bus, "vmport");
206 }
207
208 void vmport_register(unsigned char command, VMPortReadFunc *func, void *opaque);
209 void vmmouse_get_data(uint32_t *data);
210 void vmmouse_set_data(const uint32_t *data);
211
212 /* pckbd.c */
213
214 void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base);
215 void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
216 MemoryRegion *region, ram_addr_t size,
217 hwaddr mask);
218 void i8042_isa_mouse_fake_event(void *opaque);
219 void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out);
220
221 /* pc.c */
222 extern int fd_bootchk;
223
224 bool pc_machine_is_smm_enabled(PCMachineState *pcms);
225 void pc_register_ferr_irq(qemu_irq irq);
226 void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
227
228 void pc_cpus_init(PCMachineState *pcms);
229 void pc_hot_add_cpu(const int64_t id, Error **errp);
230 void pc_acpi_init(const char *default_dsdt);
231
232 PcGuestInfo *pc_guest_info_init(PCMachineState *pcms);
233
234 #define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start"
235 #define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end"
236 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start"
237 #define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end"
238 #define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size"
239 #define DEFAULT_PCI_HOLE64_SIZE (~0x0ULL)
240
241
242 void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory,
243 MemoryRegion *pci_address_space);
244
245 FWCfgState *xen_load_linux(PCMachineState *pcms,
246 PcGuestInfo *guest_info);
247 FWCfgState *pc_memory_init(PCMachineState *pcms,
248 MemoryRegion *system_memory,
249 MemoryRegion *rom_memory,
250 MemoryRegion **ram_memory,
251 PcGuestInfo *guest_info);
252 qemu_irq pc_allocate_cpu_irq(void);
253 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus);
254 void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
255 ISADevice **rtc_state,
256 bool create_fdctrl,
257 bool no_vmport,
258 uint32 hpet_irqs);
259 void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd);
260 void pc_cmos_init(PCMachineState *pcms,
261 BusState *ide0, BusState *ide1,
262 ISADevice *s);
263 void pc_nic_init(ISABus *isa_bus, PCIBus *pci_bus);
264 void pc_pci_device_init(PCIBus *pci_bus);
265
266 typedef void (*cpu_set_smm_t)(int smm, void *arg);
267
268 void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name);
269
270 ISADevice *pc_find_fdc0(void);
271
272 /* acpi_piix.c */
273
274 I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
275 qemu_irq sci_irq, qemu_irq smi_irq,
276 int smm_enabled, DeviceState **piix4_pm);
277 void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
278
279 /* hpet.c */
280 extern int no_hpet;
281
282 /* piix_pci.c */
283 struct PCII440FXState;
284 typedef struct PCII440FXState PCII440FXState;
285
286 #define TYPE_I440FX_PCI_HOST_BRIDGE "i440FX-pcihost"
287 #define TYPE_I440FX_PCI_DEVICE "i440FX"
288
289 #define TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE "igd-passthrough-i440FX"
290
291 PCIBus *i440fx_init(const char *host_type, const char *pci_type,
292 PCII440FXState **pi440fx_state, int *piix_devfn,
293 ISABus **isa_bus, qemu_irq *pic,
294 MemoryRegion *address_space_mem,
295 MemoryRegion *address_space_io,
296 ram_addr_t ram_size,
297 ram_addr_t below_4g_mem_size,
298 ram_addr_t above_4g_mem_size,
299 MemoryRegion *pci_memory,
300 MemoryRegion *ram_memory);
301
302 PCIBus *find_i440fx(void);
303 /* piix4.c */
304 extern PCIDevice *piix4_dev;
305 int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn);
306
307 /* vga.c */
308 enum vga_retrace_method {
309 VGA_RETRACE_DUMB,
310 VGA_RETRACE_PRECISE
311 };
312
313 extern enum vga_retrace_method vga_retrace_method;
314
315 int isa_vga_mm_init(hwaddr vram_base,
316 hwaddr ctrl_base, int it_shift,
317 MemoryRegion *address_space);
318
319 /* ne2000.c */
320 static inline bool isa_ne2000_init(ISABus *bus, int base, int irq, NICInfo *nd)
321 {
322 DeviceState *dev;
323 ISADevice *isadev;
324
325 qemu_check_nic_model(nd, "ne2k_isa");
326
327 isadev = isa_try_create(bus, "ne2k_isa");
328 if (!isadev) {
329 return false;
330 }
331 dev = DEVICE(isadev);
332 qdev_prop_set_uint32(dev, "iobase", base);
333 qdev_prop_set_uint32(dev, "irq", irq);
334 qdev_set_nic_properties(dev, nd);
335 qdev_init_nofail(dev);
336 return true;
337 }
338
339 /* pc_sysfw.c */
340 void pc_system_firmware_init(MemoryRegion *rom_memory,
341 bool isapc_ram_fw);
342
343 /* pvpanic.c */
344 uint16_t pvpanic_port(void);
345
346 /* e820 types */
347 #define E820_RAM 1
348 #define E820_RESERVED 2
349 #define E820_ACPI 3
350 #define E820_NVS 4
351 #define E820_UNUSABLE 5
352
353 int e820_add_entry(uint64_t, uint64_t, uint32_t);
354 int e820_get_num_entries(void);
355 bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *);
356
357 #define PC_COMPAT_2_5 \
358 HW_COMPAT_2_5
359
360 #define PC_COMPAT_2_4 \
361 PC_COMPAT_2_5 \
362 HW_COMPAT_2_4 \
363 {\
364 .driver = "Haswell-" TYPE_X86_CPU,\
365 .property = "abm",\
366 .value = "off",\
367 },\
368 {\
369 .driver = "Haswell-noTSX-" TYPE_X86_CPU,\
370 .property = "abm",\
371 .value = "off",\
372 },\
373 {\
374 .driver = "Broadwell-" TYPE_X86_CPU,\
375 .property = "abm",\
376 .value = "off",\
377 },\
378 {\
379 .driver = "Broadwell-noTSX-" TYPE_X86_CPU,\
380 .property = "abm",\
381 .value = "off",\
382 },\
383 {\
384 .driver = "host" "-" TYPE_X86_CPU,\
385 .property = "host-cache-info",\
386 .value = "on",\
387 },\
388 {\
389 .driver = TYPE_X86_CPU,\
390 .property = "check",\
391 .value = "off",\
392 },\
393 {\
394 .driver = "qemu64" "-" TYPE_X86_CPU,\
395 .property = "sse4a",\
396 .value = "on",\
397 },\
398 {\
399 .driver = "qemu64" "-" TYPE_X86_CPU,\
400 .property = "abm",\
401 .value = "on",\
402 },\
403 {\
404 .driver = "qemu64" "-" TYPE_X86_CPU,\
405 .property = "popcnt",\
406 .value = "on",\
407 },\
408 {\
409 .driver = "qemu32" "-" TYPE_X86_CPU,\
410 .property = "popcnt",\
411 .value = "on",\
412 },{\
413 .driver = "Opteron_G2" "-" TYPE_X86_CPU,\
414 .property = "rdtscp",\
415 .value = "on",\
416 },{\
417 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\
418 .property = "rdtscp",\
419 .value = "on",\
420 },{\
421 .driver = "Opteron_G4" "-" TYPE_X86_CPU,\
422 .property = "rdtscp",\
423 .value = "on",\
424 },{\
425 .driver = "Opteron_G5" "-" TYPE_X86_CPU,\
426 .property = "rdtscp",\
427 .value = "on",\
428 },
429
430
431 #define PC_COMPAT_2_3 \
432 PC_COMPAT_2_4 \
433 HW_COMPAT_2_3 \
434 {\
435 .driver = TYPE_X86_CPU,\
436 .property = "arat",\
437 .value = "off",\
438 },{\
439 .driver = "qemu64" "-" TYPE_X86_CPU,\
440 .property = "level",\
441 .value = stringify(4),\
442 },{\
443 .driver = "kvm64" "-" TYPE_X86_CPU,\
444 .property = "level",\
445 .value = stringify(5),\
446 },{\
447 .driver = "pentium3" "-" TYPE_X86_CPU,\
448 .property = "level",\
449 .value = stringify(2),\
450 },{\
451 .driver = "n270" "-" TYPE_X86_CPU,\
452 .property = "level",\
453 .value = stringify(5),\
454 },{\
455 .driver = "Conroe" "-" TYPE_X86_CPU,\
456 .property = "level",\
457 .value = stringify(4),\
458 },{\
459 .driver = "Penryn" "-" TYPE_X86_CPU,\
460 .property = "level",\
461 .value = stringify(4),\
462 },{\
463 .driver = "Nehalem" "-" TYPE_X86_CPU,\
464 .property = "level",\
465 .value = stringify(4),\
466 },{\
467 .driver = "n270" "-" TYPE_X86_CPU,\
468 .property = "xlevel",\
469 .value = stringify(0x8000000a),\
470 },{\
471 .driver = "Penryn" "-" TYPE_X86_CPU,\
472 .property = "xlevel",\
473 .value = stringify(0x8000000a),\
474 },{\
475 .driver = "Conroe" "-" TYPE_X86_CPU,\
476 .property = "xlevel",\
477 .value = stringify(0x8000000a),\
478 },{\
479 .driver = "Nehalem" "-" TYPE_X86_CPU,\
480 .property = "xlevel",\
481 .value = stringify(0x8000000a),\
482 },{\
483 .driver = "Westmere" "-" TYPE_X86_CPU,\
484 .property = "xlevel",\
485 .value = stringify(0x8000000a),\
486 },{\
487 .driver = "SandyBridge" "-" TYPE_X86_CPU,\
488 .property = "xlevel",\
489 .value = stringify(0x8000000a),\
490 },{\
491 .driver = "IvyBridge" "-" TYPE_X86_CPU,\
492 .property = "xlevel",\
493 .value = stringify(0x8000000a),\
494 },{\
495 .driver = "Haswell" "-" TYPE_X86_CPU,\
496 .property = "xlevel",\
497 .value = stringify(0x8000000a),\
498 },{\
499 .driver = "Haswell-noTSX" "-" TYPE_X86_CPU,\
500 .property = "xlevel",\
501 .value = stringify(0x8000000a),\
502 },{\
503 .driver = "Broadwell" "-" TYPE_X86_CPU,\
504 .property = "xlevel",\
505 .value = stringify(0x8000000a),\
506 },{\
507 .driver = "Broadwell-noTSX" "-" TYPE_X86_CPU,\
508 .property = "xlevel",\
509 .value = stringify(0x8000000a),\
510 },
511
512 #define PC_COMPAT_2_2 \
513 PC_COMPAT_2_3 \
514 HW_COMPAT_2_2 \
515 {\
516 .driver = "kvm64" "-" TYPE_X86_CPU,\
517 .property = "vme",\
518 .value = "off",\
519 },\
520 {\
521 .driver = "kvm32" "-" TYPE_X86_CPU,\
522 .property = "vme",\
523 .value = "off",\
524 },\
525 {\
526 .driver = "Conroe" "-" TYPE_X86_CPU,\
527 .property = "vme",\
528 .value = "off",\
529 },\
530 {\
531 .driver = "Penryn" "-" TYPE_X86_CPU,\
532 .property = "vme",\
533 .value = "off",\
534 },\
535 {\
536 .driver = "Nehalem" "-" TYPE_X86_CPU,\
537 .property = "vme",\
538 .value = "off",\
539 },\
540 {\
541 .driver = "Westmere" "-" TYPE_X86_CPU,\
542 .property = "vme",\
543 .value = "off",\
544 },\
545 {\
546 .driver = "SandyBridge" "-" TYPE_X86_CPU,\
547 .property = "vme",\
548 .value = "off",\
549 },\
550 {\
551 .driver = "Haswell" "-" TYPE_X86_CPU,\
552 .property = "vme",\
553 .value = "off",\
554 },\
555 {\
556 .driver = "Broadwell" "-" TYPE_X86_CPU,\
557 .property = "vme",\
558 .value = "off",\
559 },\
560 {\
561 .driver = "Opteron_G1" "-" TYPE_X86_CPU,\
562 .property = "vme",\
563 .value = "off",\
564 },\
565 {\
566 .driver = "Opteron_G2" "-" TYPE_X86_CPU,\
567 .property = "vme",\
568 .value = "off",\
569 },\
570 {\
571 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\
572 .property = "vme",\
573 .value = "off",\
574 },\
575 {\
576 .driver = "Opteron_G4" "-" TYPE_X86_CPU,\
577 .property = "vme",\
578 .value = "off",\
579 },\
580 {\
581 .driver = "Opteron_G5" "-" TYPE_X86_CPU,\
582 .property = "vme",\
583 .value = "off",\
584 },\
585 {\
586 .driver = "Haswell" "-" TYPE_X86_CPU,\
587 .property = "f16c",\
588 .value = "off",\
589 },\
590 {\
591 .driver = "Haswell" "-" TYPE_X86_CPU,\
592 .property = "rdrand",\
593 .value = "off",\
594 },\
595 {\
596 .driver = "Broadwell" "-" TYPE_X86_CPU,\
597 .property = "f16c",\
598 .value = "off",\
599 },\
600 {\
601 .driver = "Broadwell" "-" TYPE_X86_CPU,\
602 .property = "rdrand",\
603 .value = "off",\
604 },
605
606 #define PC_COMPAT_2_1 \
607 PC_COMPAT_2_2 \
608 HW_COMPAT_2_1 \
609 {\
610 .driver = "coreduo" "-" TYPE_X86_CPU,\
611 .property = "vmx",\
612 .value = "on",\
613 },\
614 {\
615 .driver = "core2duo" "-" TYPE_X86_CPU,\
616 .property = "vmx",\
617 .value = "on",\
618 },
619
620 #define PC_COMPAT_2_0 \
621 PC_COMPAT_2_1 \
622 {\
623 .driver = "virtio-scsi-pci",\
624 .property = "any_layout",\
625 .value = "off",\
626 },{\
627 .driver = "PIIX4_PM",\
628 .property = "memory-hotplug-support",\
629 .value = "off",\
630 },\
631 {\
632 .driver = "apic",\
633 .property = "version",\
634 .value = stringify(0x11),\
635 },\
636 {\
637 .driver = "nec-usb-xhci",\
638 .property = "superspeed-ports-first",\
639 .value = "off",\
640 },\
641 {\
642 .driver = "nec-usb-xhci",\
643 .property = "force-pcie-endcap",\
644 .value = "on",\
645 },\
646 {\
647 .driver = "pci-serial",\
648 .property = "prog_if",\
649 .value = stringify(0),\
650 },\
651 {\
652 .driver = "pci-serial-2x",\
653 .property = "prog_if",\
654 .value = stringify(0),\
655 },\
656 {\
657 .driver = "pci-serial-4x",\
658 .property = "prog_if",\
659 .value = stringify(0),\
660 },\
661 {\
662 .driver = "virtio-net-pci",\
663 .property = "guest_announce",\
664 .value = "off",\
665 },\
666 {\
667 .driver = "ICH9-LPC",\
668 .property = "memory-hotplug-support",\
669 .value = "off",\
670 },{\
671 .driver = "xio3130-downstream",\
672 .property = COMPAT_PROP_PCP,\
673 .value = "off",\
674 },{\
675 .driver = "ioh3420",\
676 .property = COMPAT_PROP_PCP,\
677 .value = "off",\
678 },
679
680 #define PC_COMPAT_1_7 \
681 PC_COMPAT_2_0 \
682 {\
683 .driver = TYPE_USB_DEVICE,\
684 .property = "msos-desc",\
685 .value = "no",\
686 },\
687 {\
688 .driver = "PIIX4_PM",\
689 .property = "acpi-pci-hotplug-with-bridge-support",\
690 .value = "off",\
691 },\
692 {\
693 .driver = "hpet",\
694 .property = HPET_INTCAP,\
695 .value = stringify(4),\
696 },
697
698 #define PC_COMPAT_1_6 \
699 PC_COMPAT_1_7 \
700 {\
701 .driver = "e1000",\
702 .property = "mitigation",\
703 .value = "off",\
704 },{\
705 .driver = "qemu64-" TYPE_X86_CPU,\
706 .property = "model",\
707 .value = stringify(2),\
708 },{\
709 .driver = "qemu32-" TYPE_X86_CPU,\
710 .property = "model",\
711 .value = stringify(3),\
712 },{\
713 .driver = "i440FX-pcihost",\
714 .property = "short_root_bus",\
715 .value = stringify(1),\
716 },{\
717 .driver = "q35-pcihost",\
718 .property = "short_root_bus",\
719 .value = stringify(1),\
720 },
721
722 #define PC_COMPAT_1_5 \
723 PC_COMPAT_1_6 \
724 {\
725 .driver = "Conroe-" TYPE_X86_CPU,\
726 .property = "model",\
727 .value = stringify(2),\
728 },{\
729 .driver = "Conroe-" TYPE_X86_CPU,\
730 .property = "level",\
731 .value = stringify(2),\
732 },{\
733 .driver = "Penryn-" TYPE_X86_CPU,\
734 .property = "model",\
735 .value = stringify(2),\
736 },{\
737 .driver = "Penryn-" TYPE_X86_CPU,\
738 .property = "level",\
739 .value = stringify(2),\
740 },{\
741 .driver = "Nehalem-" TYPE_X86_CPU,\
742 .property = "model",\
743 .value = stringify(2),\
744 },{\
745 .driver = "Nehalem-" TYPE_X86_CPU,\
746 .property = "level",\
747 .value = stringify(2),\
748 },{\
749 .driver = "virtio-net-pci",\
750 .property = "any_layout",\
751 .value = "off",\
752 },{\
753 .driver = TYPE_X86_CPU,\
754 .property = "pmu",\
755 .value = "on",\
756 },{\
757 .driver = "i440FX-pcihost",\
758 .property = "short_root_bus",\
759 .value = stringify(0),\
760 },{\
761 .driver = "q35-pcihost",\
762 .property = "short_root_bus",\
763 .value = stringify(0),\
764 },
765
766 #define PC_COMPAT_1_4 \
767 PC_COMPAT_1_5 \
768 {\
769 .driver = "scsi-hd",\
770 .property = "discard_granularity",\
771 .value = stringify(0),\
772 },{\
773 .driver = "scsi-cd",\
774 .property = "discard_granularity",\
775 .value = stringify(0),\
776 },{\
777 .driver = "scsi-disk",\
778 .property = "discard_granularity",\
779 .value = stringify(0),\
780 },{\
781 .driver = "ide-hd",\
782 .property = "discard_granularity",\
783 .value = stringify(0),\
784 },{\
785 .driver = "ide-cd",\
786 .property = "discard_granularity",\
787 .value = stringify(0),\
788 },{\
789 .driver = "ide-drive",\
790 .property = "discard_granularity",\
791 .value = stringify(0),\
792 },{\
793 .driver = "virtio-blk-pci",\
794 .property = "discard_granularity",\
795 .value = stringify(0),\
796 },{\
797 .driver = "virtio-serial-pci",\
798 .property = "vectors",\
799 /* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */\
800 .value = stringify(0xFFFFFFFF),\
801 },{ \
802 .driver = "virtio-net-pci", \
803 .property = "ctrl_guest_offloads", \
804 .value = "off", \
805 },{\
806 .driver = "e1000",\
807 .property = "romfile",\
808 .value = "pxe-e1000.rom",\
809 },{\
810 .driver = "ne2k_pci",\
811 .property = "romfile",\
812 .value = "pxe-ne2k_pci.rom",\
813 },{\
814 .driver = "pcnet",\
815 .property = "romfile",\
816 .value = "pxe-pcnet.rom",\
817 },{\
818 .driver = "rtl8139",\
819 .property = "romfile",\
820 .value = "pxe-rtl8139.rom",\
821 },{\
822 .driver = "virtio-net-pci",\
823 .property = "romfile",\
824 .value = "pxe-virtio.rom",\
825 },{\
826 .driver = "486-" TYPE_X86_CPU,\
827 .property = "model",\
828 .value = stringify(0),\
829 },\
830 {\
831 .driver = "n270" "-" TYPE_X86_CPU,\
832 .property = "movbe",\
833 .value = "off",\
834 },\
835 {\
836 .driver = "Westmere" "-" TYPE_X86_CPU,\
837 .property = "pclmulqdq",\
838 .value = "off",\
839 },
840
841 #define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \
842 static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \
843 { \
844 MachineClass *mc = MACHINE_CLASS(oc); \
845 optsfn(mc); \
846 mc->name = namestr; \
847 mc->init = initfn; \
848 } \
849 static const TypeInfo pc_machine_type_##suffix = { \
850 .name = namestr TYPE_MACHINE_SUFFIX, \
851 .parent = TYPE_PC_MACHINE, \
852 .class_init = pc_machine_##suffix##_class_init, \
853 }; \
854 static void pc_machine_init_##suffix(void) \
855 { \
856 type_register(&pc_machine_type_##suffix); \
857 } \
858 machine_init(pc_machine_init_##suffix)
859
860 #define SET_MACHINE_COMPAT(m, COMPAT) do { \
861 static GlobalProperty props[] = { \
862 COMPAT \
863 { /* end of list */ } \
864 }; \
865 (m)->compat_props = props; \
866 } while (0)
867
868 extern void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id);
869 #endif