4 #include "qemu/notify.h"
5 #include "qapi/qapi-types-common.h"
7 #include "hw/block/fdc.h"
8 #include "hw/block/flash.h"
9 #include "hw/i386/x86.h"
11 #include "hw/acpi/acpi_dev_interface.h"
12 #include "hw/hotplug.h"
13 #include "qom/object.h"
15 #define HPET_INTCAP "hpet-intcap"
19 * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling
20 * @boot_cpus: number of present VCPUs
21 * @smp_dies: number of dies per one package
23 struct PCMachineState
{
25 X86MachineState parent_obj
;
29 /* State for other subsystems/APIs: */
30 Notifier machine_done
;
32 /* Pointers to devices and objects: */
33 HotplugHandler
*acpi_dev
;
36 PFlashCFI01
*flash
[2];
39 /* Configuration options: */
40 uint64_t max_ram_below_4g
;
43 bool acpi_build_enabled
;
48 /* NUMA information: */
52 /* ACPI Memory hotplug IO base address */
56 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device"
57 #define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g"
58 #define PC_MACHINE_DEVMEM_REGION_SIZE "device-memory-region-size"
59 #define PC_MACHINE_VMPORT "vmport"
60 #define PC_MACHINE_SMBUS "smbus"
61 #define PC_MACHINE_SATA "sata"
62 #define PC_MACHINE_PIT "pit"
69 * @enforce_aligned_dimm: check that DIMM's address/size is aligned by
70 * backend's alignment value if provided
71 * @acpi_data_size: Size of the chunk of memory at the top of RAM
72 * for the BIOS ACPI tables and other BIOS
74 * @gigabyte_align: Make sure that guest addresses aligned at
75 * 1Gbyte boundaries get mapped to host
76 * addresses aligned at 1Gbyte boundaries. This
77 * way we can use 1GByte pages in the host.
80 struct PCMachineClass
{
82 X86MachineClass parent_class
;
86 /* Device configuration: */
88 bool kvmclock_enabled
;
89 const char *default_nic_model
;
93 /* Default CPU model version. See x86_cpu_set_default_version(). */
94 int default_cpu_version
;
99 int legacy_acpi_table_size
;
100 unsigned acpi_data_size
;
101 bool do_not_add_smb_acpi
;
104 bool smbios_defaults
;
105 bool smbios_legacy_mode
;
106 bool smbios_uuid_encoded
;
108 /* RAM / address space compat: */
110 bool has_reserved_memory
;
111 bool enforce_aligned_dimm
;
112 bool broken_reserved_end
;
114 /* generate legacy CPU hotplug AML */
115 bool legacy_cpu_hotplug
;
117 /* use DMA capable linuxboot option rom */
118 bool linuxboot_dma_enabled
;
120 /* use PVH to load kernels that support this feature */
123 typedef struct PCMachineClass PCMachineClass
;
125 #define TYPE_PC_MACHINE "generic-pc-machine"
126 #define PC_MACHINE(obj) \
127 OBJECT_CHECK(PCMachineState, (obj), TYPE_PC_MACHINE)
128 #define PC_MACHINE_GET_CLASS(obj) \
129 OBJECT_GET_CLASS(PCMachineClass, (obj), TYPE_PC_MACHINE)
130 #define PC_MACHINE_CLASS(klass) \
131 OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE)
135 GSIState
*pc_gsi_create(qemu_irq
**irqs
, bool pci_enabled
);
138 extern int fd_bootchk
;
140 void pc_acpi_smi_interrupt(void *opaque
, int irq
, int level
);
142 void pc_hot_add_cpu(MachineState
*ms
, const int64_t id
, Error
**errp
);
143 void pc_smp_parse(MachineState
*ms
, QemuOpts
*opts
);
145 void pc_guest_info_init(PCMachineState
*pcms
);
147 #define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start"
148 #define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end"
149 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start"
150 #define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end"
151 #define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size"
152 #define PCI_HOST_BELOW_4G_MEM_SIZE "below-4g-mem-size"
153 #define PCI_HOST_ABOVE_4G_MEM_SIZE "above-4g-mem-size"
156 void pc_pci_as_mapping_init(Object
*owner
, MemoryRegion
*system_memory
,
157 MemoryRegion
*pci_address_space
);
159 void xen_load_linux(PCMachineState
*pcms
);
160 void pc_memory_init(PCMachineState
*pcms
,
161 MemoryRegion
*system_memory
,
162 MemoryRegion
*rom_memory
,
163 MemoryRegion
**ram_memory
);
164 uint64_t pc_pci_hole64_start(void);
165 DeviceState
*pc_vga_init(ISABus
*isa_bus
, PCIBus
*pci_bus
);
166 void pc_basic_device_init(struct PCMachineState
*pcms
,
167 ISABus
*isa_bus
, qemu_irq
*gsi
,
168 ISADevice
**rtc_state
,
171 void pc_init_ne2k_isa(ISABus
*bus
, NICInfo
*nd
);
172 void pc_cmos_init(PCMachineState
*pcms
,
173 BusState
*ide0
, BusState
*ide1
,
175 void pc_nic_init(PCMachineClass
*pcmc
, ISABus
*isa_bus
, PCIBus
*pci_bus
);
176 void pc_pci_device_init(PCIBus
*pci_bus
);
178 typedef void (*cpu_set_smm_t
)(int smm
, void *arg
);
180 void pc_i8259_create(ISABus
*isa_bus
, qemu_irq
*i8259_irqs
);
182 ISADevice
*pc_find_fdc0(void);
185 #define PORT92_A20_LINE "a20"
187 #define TYPE_PORT92 "port92"
190 void pc_system_flash_create(PCMachineState
*pcms
);
191 void pc_system_flash_cleanup_unused(PCMachineState
*pcms
);
192 void pc_system_firmware_init(PCMachineState
*pcms
, MemoryRegion
*rom_memory
);
195 void pc_madt_cpu_entry(AcpiDeviceIf
*adev
, int uid
,
196 const CPUArchIdList
*apic_ids
, GArray
*entry
);
198 extern GlobalProperty pc_compat_5_1
[];
199 extern const size_t pc_compat_5_1_len
;
201 extern GlobalProperty pc_compat_5_0
[];
202 extern const size_t pc_compat_5_0_len
;
204 extern GlobalProperty pc_compat_4_2
[];
205 extern const size_t pc_compat_4_2_len
;
207 extern GlobalProperty pc_compat_4_1
[];
208 extern const size_t pc_compat_4_1_len
;
210 extern GlobalProperty pc_compat_4_0
[];
211 extern const size_t pc_compat_4_0_len
;
213 extern GlobalProperty pc_compat_3_1
[];
214 extern const size_t pc_compat_3_1_len
;
216 extern GlobalProperty pc_compat_3_0
[];
217 extern const size_t pc_compat_3_0_len
;
219 extern GlobalProperty pc_compat_2_12
[];
220 extern const size_t pc_compat_2_12_len
;
222 extern GlobalProperty pc_compat_2_11
[];
223 extern const size_t pc_compat_2_11_len
;
225 extern GlobalProperty pc_compat_2_10
[];
226 extern const size_t pc_compat_2_10_len
;
228 extern GlobalProperty pc_compat_2_9
[];
229 extern const size_t pc_compat_2_9_len
;
231 extern GlobalProperty pc_compat_2_8
[];
232 extern const size_t pc_compat_2_8_len
;
234 extern GlobalProperty pc_compat_2_7
[];
235 extern const size_t pc_compat_2_7_len
;
237 extern GlobalProperty pc_compat_2_6
[];
238 extern const size_t pc_compat_2_6_len
;
240 extern GlobalProperty pc_compat_2_5
[];
241 extern const size_t pc_compat_2_5_len
;
243 extern GlobalProperty pc_compat_2_4
[];
244 extern const size_t pc_compat_2_4_len
;
246 extern GlobalProperty pc_compat_2_3
[];
247 extern const size_t pc_compat_2_3_len
;
249 extern GlobalProperty pc_compat_2_2
[];
250 extern const size_t pc_compat_2_2_len
;
252 extern GlobalProperty pc_compat_2_1
[];
253 extern const size_t pc_compat_2_1_len
;
255 extern GlobalProperty pc_compat_2_0
[];
256 extern const size_t pc_compat_2_0_len
;
258 extern GlobalProperty pc_compat_1_7
[];
259 extern const size_t pc_compat_1_7_len
;
261 extern GlobalProperty pc_compat_1_6
[];
262 extern const size_t pc_compat_1_6_len
;
264 extern GlobalProperty pc_compat_1_5
[];
265 extern const size_t pc_compat_1_5_len
;
267 extern GlobalProperty pc_compat_1_4
[];
268 extern const size_t pc_compat_1_4_len
;
270 /* Helper for setting model-id for CPU models that changed model-id
271 * depending on QEMU versions up to QEMU 2.4.
273 #define PC_CPU_MODEL_IDS(v) \
274 { "qemu32-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, },\
275 { "qemu64-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, },\
276 { "athlon-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, },
278 #define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \
279 static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \
281 MachineClass *mc = MACHINE_CLASS(oc); \
285 static const TypeInfo pc_machine_type_##suffix = { \
286 .name = namestr TYPE_MACHINE_SUFFIX, \
287 .parent = TYPE_PC_MACHINE, \
288 .class_init = pc_machine_##suffix##_class_init, \
290 static void pc_machine_init_##suffix(void) \
292 type_register(&pc_machine_type_##suffix); \
294 type_init(pc_machine_init_##suffix)
296 extern void igd_passthrough_isa_bridge_create(PCIBus
*bus
, uint16_t gpu_dev_id
);