include/hw/pci/pcie_port.h

   1 /*
   2  * pcie_port.h
   3  *
   4  * Copyright (c) 2010 Isaku Yamahata <yamahata at valinux co jp>
   5  *                    VA Linux Systems Japan K.K.
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License along
  18  * with this program; if not, see <http://www.gnu.org/licenses/>.
  19  */
  20
  21 #ifndef QEMU_PCIE_PORT_H
  22 #define QEMU_PCIE_PORT_H
  23
  24 #include "hw/pci/pci_bridge.h"
  25 #include "hw/pci/pci_bus.h"
  26 #include "qom/object.h"
  27
  28 #define TYPE_PCIE_PORT "pcie-port"
  29 #define PCIE_PORT(obj) OBJECT_CHECK(PCIEPort, (obj), TYPE_PCIE_PORT)
  30
  31 struct PCIEPort {
  32     /*< private >*/
  33     PCIBridge   parent_obj;
  34     /*< public >*/
  35
  36     /* pci express switch port */
  37     uint8_t     port;
  38 };
  39
  40 void pcie_port_init_reg(PCIDevice *d);
  41
  42 #define TYPE_PCIE_SLOT "pcie-slot"
  43 #define PCIE_SLOT(obj) OBJECT_CHECK(PCIESlot, (obj), TYPE_PCIE_SLOT)
  44
  45 struct PCIESlot {
  46     /*< private >*/
  47     PCIEPort    parent_obj;
  48     /*< public >*/
  49
  50     /* pci express switch port with slot */
  51     uint8_t     chassis;
  52     uint16_t    slot;
  53
  54     PCIExpLinkSpeed speed;
  55     PCIExpLinkWidth width;
  56
  57     /* Disable ACS (really for a pcie_root_port) */
  58     bool        disable_acs;
  59
  60     /* Indicates whether hot-plug is enabled on the slot */
  61     bool        hotplug;
  62     QLIST_ENTRY(PCIESlot) next;
  63 };
  64
  65 void pcie_chassis_create(uint8_t chassis_number);
  66 PCIESlot *pcie_chassis_find_slot(uint8_t chassis, uint16_t slot);
  67 int pcie_chassis_add_slot(struct PCIESlot *slot);
  68 void pcie_chassis_del_slot(PCIESlot *s);
  69
  70 #define TYPE_PCIE_ROOT_PORT         "pcie-root-port-base"
  71 typedef struct PCIERootPortClass PCIERootPortClass;
  72 #define PCIE_ROOT_PORT_CLASS(klass) \
  73      OBJECT_CLASS_CHECK(PCIERootPortClass, (klass), TYPE_PCIE_ROOT_PORT)
  74 #define PCIE_ROOT_PORT_GET_CLASS(obj) \
  75      OBJECT_GET_CLASS(PCIERootPortClass, (obj), TYPE_PCIE_ROOT_PORT)
  76
  77 struct PCIERootPortClass {
  78     PCIDeviceClass parent_class;
  79     DeviceRealize parent_realize;
  80     DeviceReset parent_reset;
  81
  82     uint8_t (*aer_vector)(const PCIDevice *dev);
  83     int (*interrupts_init)(PCIDevice *dev, Error **errp);
  84     void (*interrupts_uninit)(PCIDevice *dev);
  85
  86     int exp_offset;
  87     int aer_offset;
  88     int ssvid_offset;
  89     int acs_offset;    /* If nonzero, optional ACS capability offset */
  90     int ssid;
  91 };
  92
  93 #endif /* QEMU_PCIE_PORT_H */