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git.proxmox.com Git - mirror_qemu.git/blob - include/hw/riscv/sifive_u.h
2 * SiFive U series machine interface
4 * Copyright (c) 2017 SiFive, Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2 or later, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along with
16 * this program. If not, see <http://www.gnu.org/licenses/>.
22 #include "hw/net/cadence_gem.h"
24 #define TYPE_RISCV_U_SOC "riscv.sifive.u.soc"
25 #define RISCV_U_SOC(obj) \
26 OBJECT_CHECK(SiFiveUSoCState, (obj), TYPE_RISCV_U_SOC)
28 typedef struct SiFiveUSoCState
{
30 SysBusDevice parent_obj
;
33 RISCVHartArrayState cpus
;
38 typedef struct SiFiveUState
{
40 SysBusDevice parent_obj
;
60 SIFIVE_U_UART0_IRQ
= 3,
61 SIFIVE_U_UART1_IRQ
= 4,
62 SIFIVE_U_GEM_IRQ
= 0x35
66 SIFIVE_U_CLOCK_FREQ
= 1000000000,
67 SIFIVE_U_GEM_CLOCK_FREQ
= 125000000
70 #define SIFIVE_U_PLIC_HART_CONFIG "MS"
71 #define SIFIVE_U_PLIC_NUM_SOURCES 127
72 #define SIFIVE_U_PLIC_NUM_PRIORITIES 7
73 #define SIFIVE_U_PLIC_PRIORITY_BASE 0x0
74 #define SIFIVE_U_PLIC_PENDING_BASE 0x1000
75 #define SIFIVE_U_PLIC_ENABLE_BASE 0x2000
76 #define SIFIVE_U_PLIC_ENABLE_STRIDE 0x80
77 #define SIFIVE_U_PLIC_CONTEXT_BASE 0x200000
78 #define SIFIVE_U_PLIC_CONTEXT_STRIDE 0x1000
80 #if defined(TARGET_RISCV32)
81 #define SIFIVE_U_CPU TYPE_RISCV_CPU_SIFIVE_U34
82 #elif defined(TARGET_RISCV64)
83 #define SIFIVE_U_CPU TYPE_RISCV_CPU_SIFIVE_U54