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git.proxmox.com Git - mirror_qemu.git/blob - include/hw/riscv/spike.h
2 * Spike machine interface
4 * Copyright (c) 2017 SiFive, Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2 or later, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along with
16 * this program. If not, see <http://www.gnu.org/licenses/>.
19 #ifndef HW_RISCV_SPIKE_H
20 #define HW_RISCV_SPIKE_H
22 #include "hw/riscv/riscv_hart.h"
23 #include "hw/sysbus.h"
25 #define SPIKE_CPUS_MAX 8
26 #define SPIKE_SOCKETS_MAX 8
28 #define TYPE_SPIKE_MACHINE MACHINE_TYPE_NAME("spike")
29 #define SPIKE_MACHINE(obj) \
30 OBJECT_CHECK(SpikeState, (obj), TYPE_SPIKE_MACHINE)
37 RISCVHartArrayState soc
[SPIKE_SOCKETS_MAX
];
48 #if defined(TARGET_RISCV32)
49 #define SPIKE_V1_10_0_CPU TYPE_RISCV_CPU_BASE32
50 #elif defined(TARGET_RISCV64)
51 #define SPIKE_V1_10_0_CPU TYPE_RISCV_CPU_BASE64