include/hw/rtc/xlnx-zynqmp-rtc.h

   1 /*
   2  * QEMU model of the Xilinx ZynqMP Real Time Clock (RTC).
   3  *
   4  * Copyright (c) 2017 Xilinx Inc.
   5  *
   6  * Written-by: Alistair Francis
   7  *
   8  * Permission is hereby granted, free of charge, to any person obtaining a copy
   9  * of this software and associated documentation files (the "Software"), to deal
  10  * in the Software without restriction, including without limitation the rights
  11  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  12  * copies of the Software, and to permit persons to whom the Software is
  13  * furnished to do so, subject to the following conditions:
  14  *
  15  * The above copyright notice and this permission notice shall be included in
  16  * all copies or substantial portions of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  21  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  22  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  23  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  24  * THE SOFTWARE.
  25  */
  26
  27 #ifndef HW_RTC_XLNX_ZYNQMP_H
  28 #define HW_RTC_XLNX_ZYNQMP_H
  29
  30 #include "hw/register.h"
  31 #include "hw/sysbus.h"
  32 #include "qom/object.h"
  33
  34 #define TYPE_XLNX_ZYNQMP_RTC "xlnx-zynmp.rtc"
  35
  36 typedef struct XlnxZynqMPRTC XlnxZynqMPRTC;
  37 DECLARE_INSTANCE_CHECKER(XlnxZynqMPRTC, XLNX_ZYNQMP_RTC,
  38                          TYPE_XLNX_ZYNQMP_RTC)
  39
  40 REG32(SET_TIME_WRITE, 0x0)
  41 REG32(SET_TIME_READ, 0x4)
  42 REG32(CALIB_WRITE, 0x8)
  43     FIELD(CALIB_WRITE, FRACTION_EN, 20, 1)
  44     FIELD(CALIB_WRITE, FRACTION_DATA, 16, 4)
  45     FIELD(CALIB_WRITE, MAX_TICK, 0, 16)
  46 REG32(CALIB_READ, 0xc)
  47     FIELD(CALIB_READ, FRACTION_EN, 20, 1)
  48     FIELD(CALIB_READ, FRACTION_DATA, 16, 4)
  49     FIELD(CALIB_READ, MAX_TICK, 0, 16)
  50 REG32(CURRENT_TIME, 0x10)
  51 REG32(CURRENT_TICK, 0x14)
  52     FIELD(CURRENT_TICK, VALUE, 0, 16)
  53 REG32(ALARM, 0x18)
  54 REG32(RTC_INT_STATUS, 0x20)
  55     FIELD(RTC_INT_STATUS, ALARM, 1, 1)
  56     FIELD(RTC_INT_STATUS, SECONDS, 0, 1)
  57 REG32(RTC_INT_MASK, 0x24)
  58     FIELD(RTC_INT_MASK, ALARM, 1, 1)
  59     FIELD(RTC_INT_MASK, SECONDS, 0, 1)
  60 REG32(RTC_INT_EN, 0x28)
  61     FIELD(RTC_INT_EN, ALARM, 1, 1)
  62     FIELD(RTC_INT_EN, SECONDS, 0, 1)
  63 REG32(RTC_INT_DIS, 0x2c)
  64     FIELD(RTC_INT_DIS, ALARM, 1, 1)
  65     FIELD(RTC_INT_DIS, SECONDS, 0, 1)
  66 REG32(ADDR_ERROR, 0x30)
  67     FIELD(ADDR_ERROR, STATUS, 0, 1)
  68 REG32(ADDR_ERROR_INT_MASK, 0x34)
  69     FIELD(ADDR_ERROR_INT_MASK, MASK, 0, 1)
  70 REG32(ADDR_ERROR_INT_EN, 0x38)
  71     FIELD(ADDR_ERROR_INT_EN, MASK, 0, 1)
  72 REG32(ADDR_ERROR_INT_DIS, 0x3c)
  73     FIELD(ADDR_ERROR_INT_DIS, MASK, 0, 1)
  74 REG32(CONTROL, 0x40)
  75     FIELD(CONTROL, BATTERY_DISABLE, 31, 1)
  76     FIELD(CONTROL, OSC_CNTRL, 24, 4)
  77     FIELD(CONTROL, SLVERR_ENABLE, 0, 1)
  78 REG32(SAFETY_CHK, 0x50)
  79
  80 #define XLNX_ZYNQMP_RTC_R_MAX (R_SAFETY_CHK + 1)
  81
  82 struct XlnxZynqMPRTC {
  83     SysBusDevice parent_obj;
  84     MemoryRegion iomem;
  85     qemu_irq irq_rtc_int;
  86     qemu_irq irq_addr_error_int;
  87
  88     uint32_t tick_offset;
  89
  90     uint32_t regs[XLNX_ZYNQMP_RTC_R_MAX];
  91     RegisterInfo regs_info[XLNX_ZYNQMP_RTC_R_MAX];
  92 };
  93
  94 #endif