include/hw/s390x/sclp.h

   1 /*
   2  * SCLP Support
   3  *
   4  * Copyright IBM, Corp. 2012
   5  *
   6  * Authors:
   7  *  Christian Borntraeger <borntraeger@de.ibm.com>
   8  *
   9  * This work is licensed under the terms of the GNU GPL, version 2 or (at your
  10  * option) any later version.  See the COPYING file in the top-level directory.
  11  *
  12  */
  13
  14 #ifndef HW_S390_SCLP_H
  15 #define HW_S390_SCLP_H
  16
  17 #include "hw/sysbus.h"
  18 #include "hw/qdev.h"
  19
  20 #define SCLP_CMD_CODE_MASK                      0xffff00ff
  21
  22 /* SCLP command codes */
  23 #define SCLP_CMDW_READ_SCP_INFO                 0x00020001
  24 #define SCLP_CMDW_READ_SCP_INFO_FORCED          0x00120001
  25 #define SCLP_READ_STORAGE_ELEMENT_INFO          0x00040001
  26 #define SCLP_ATTACH_STORAGE_ELEMENT             0x00080001
  27 #define SCLP_ASSIGN_STORAGE                     0x000D0001
  28 #define SCLP_UNASSIGN_STORAGE                   0x000C0001
  29 #define SCLP_CMD_READ_EVENT_DATA                0x00770005
  30 #define SCLP_CMD_WRITE_EVENT_DATA               0x00760005
  31 #define SCLP_CMD_WRITE_EVENT_MASK               0x00780005
  32
  33 /* SCLP Memory hotplug codes */
  34 #define SCLP_FC_ASSIGN_ATTACH_READ_STOR         0xE00000000000ULL
  35 #define SCLP_STARTING_SUBINCREMENT_ID           0x10001
  36 #define SCLP_INCREMENT_UNIT                     0x10000
  37 #define MAX_AVAIL_SLOTS                         32
  38 #define MAX_STORAGE_INCREMENTS                  1020
  39
  40 /* CPU hotplug SCLP codes */
  41 #define SCLP_HAS_CPU_INFO                       0x0C00000000000000ULL
  42 #define SCLP_CMDW_READ_CPU_INFO                 0x00010001
  43 #define SCLP_CMDW_CONFIGURE_CPU                 0x00110001
  44 #define SCLP_CMDW_DECONFIGURE_CPU               0x00100001
  45
  46 /* SCLP PCI codes */
  47 #define SCLP_HAS_PCI_RECONFIG                   0x0000000040000000ULL
  48 #define SCLP_CMDW_CONFIGURE_PCI                 0x001a0001
  49 #define SCLP_CMDW_DECONFIGURE_PCI               0x001b0001
  50 #define SCLP_RECONFIG_PCI_ATPYE                 2
  51
  52 /* SCLP response codes */
  53 #define SCLP_RC_NORMAL_READ_COMPLETION          0x0010
  54 #define SCLP_RC_NORMAL_COMPLETION               0x0020
  55 #define SCLP_RC_SCCB_BOUNDARY_VIOLATION         0x0100
  56 #define SCLP_RC_NO_ACTION_REQUIRED              0x0120
  57 #define SCLP_RC_INVALID_SCLP_COMMAND            0x01f0
  58 #define SCLP_RC_CONTAINED_EQUIPMENT_CHECK       0x0340
  59 #define SCLP_RC_INSUFFICIENT_SCCB_LENGTH        0x0300
  60 #define SCLP_RC_STANDBY_READ_COMPLETION         0x0410
  61 #define SCLP_RC_ADAPTER_IN_RESERVED_STATE       0x05f0
  62 #define SCLP_RC_ADAPTER_ID_NOT_RECOGNIZED       0x09f0
  63 #define SCLP_RC_INVALID_FUNCTION                0x40f0
  64 #define SCLP_RC_NO_EVENT_BUFFERS_STORED         0x60f0
  65 #define SCLP_RC_INVALID_SELECTION_MASK          0x70f0
  66 #define SCLP_RC_INCONSISTENT_LENGTHS            0x72f0
  67 #define SCLP_RC_EVENT_BUFFER_SYNTAX_ERROR       0x73f0
  68 #define SCLP_RC_INVALID_MASK_LENGTH             0x74f0
  69
  70
  71 /* Service Call Control Block (SCCB) and its elements */
  72
  73 #define SCCB_SIZE 4096
  74
  75 #define SCLP_VARIABLE_LENGTH_RESPONSE           0x80
  76 #define SCLP_EVENT_BUFFER_ACCEPTED              0x80
  77
  78 #define SCLP_FC_NORMAL_WRITE                    0
  79
  80 /*
  81  * Normally packed structures are not the right thing to do, since all code
  82  * must take care of endianness. We cannot use ldl_phys and friends for two
  83  * reasons, though:
  84  * - some of the embedded structures below the SCCB can appear multiple times
  85  *   at different locations, so there is no fixed offset
  86  * - we work on a private copy of the SCCB, since there are several length
  87  *   fields, that would cause a security nightmare if we allow the guest to
  88  *   alter the structure while we parse it. We cannot use ldl_p and friends
  89  *   either without doing pointer arithmetics
  90  * So we have to double check that all users of sclp data structures use the
  91  * right endianness wrappers.
  92  */
  93 typedef struct SCCBHeader {
  94     uint16_t length;
  95     uint8_t function_code;
  96     uint8_t control_mask[3];
  97     uint16_t response_code;
  98 } QEMU_PACKED SCCBHeader;
  99
 100 #define SCCB_DATA_LEN (SCCB_SIZE - sizeof(SCCBHeader))
 101
 102 /* CPU information */
 103 typedef struct CPUEntry {
 104     uint8_t address;
 105     uint8_t reserved0[13];
 106     uint8_t type;
 107     uint8_t reserved1;
 108 } QEMU_PACKED CPUEntry;
 109
 110 typedef struct ReadInfo {
 111     SCCBHeader h;
 112     uint16_t rnmax;
 113     uint8_t rnsize;
 114     uint8_t  _reserved1[16 - 11];       /* 11-15 */
 115     uint16_t entries_cpu;               /* 16-17 */
 116     uint16_t offset_cpu;                /* 18-19 */
 117     uint8_t  _reserved2[24 - 20];       /* 20-23 */
 118     uint8_t  loadparm[8];               /* 24-31 */
 119     uint8_t  _reserved3[48 - 32];       /* 32-47 */
 120     uint64_t facilities;                /* 48-55 */
 121     uint8_t  _reserved0[100 - 56];
 122     uint32_t rnsize2;
 123     uint64_t rnmax2;
 124     uint8_t  _reserved4[120-112];       /* 112-119 */
 125     uint16_t highest_cpu;
 126     uint8_t  _reserved5[128 - 122];     /* 122-127 */
 127     struct CPUEntry entries[0];
 128 } QEMU_PACKED ReadInfo;
 129
 130 typedef struct ReadCpuInfo {
 131     SCCBHeader h;
 132     uint16_t nr_configured;         /* 8-9 */
 133     uint16_t offset_configured;     /* 10-11 */
 134     uint16_t nr_standby;            /* 12-13 */
 135     uint16_t offset_standby;        /* 14-15 */
 136     uint8_t reserved0[24-16];       /* 16-23 */
 137     struct CPUEntry entries[0];
 138 } QEMU_PACKED ReadCpuInfo;
 139
 140 typedef struct ReadStorageElementInfo {
 141     SCCBHeader h;
 142     uint16_t max_id;
 143     uint16_t assigned;
 144     uint16_t standby;
 145     uint8_t _reserved0[16 - 14]; /* 14-15 */
 146     uint32_t entries[0];
 147 } QEMU_PACKED ReadStorageElementInfo;
 148
 149 typedef struct AttachStorageElement {
 150     SCCBHeader h;
 151     uint8_t _reserved0[10 - 8];  /* 8-9 */
 152     uint16_t assigned;
 153     uint8_t _reserved1[16 - 12]; /* 12-15 */
 154     uint32_t entries[0];
 155 } QEMU_PACKED AttachStorageElement;
 156
 157 typedef struct AssignStorage {
 158     SCCBHeader h;
 159     uint16_t rn;
 160 } QEMU_PACKED AssignStorage;
 161
 162 typedef struct SCCB {
 163     SCCBHeader h;
 164     char data[SCCB_DATA_LEN];
 165  } QEMU_PACKED SCCB;
 166
 167 #define TYPE_SCLP "sclp"
 168 #define SCLP(obj) OBJECT_CHECK(SCLPDevice, (obj), TYPE_SCLP)
 169 #define SCLP_CLASS(oc) OBJECT_CLASS_CHECK(SCLPDeviceClass, (oc), TYPE_SCLP)
 170 #define SCLP_GET_CLASS(obj) OBJECT_GET_CLASS(SCLPDeviceClass, (obj), TYPE_SCLP)
 171
 172 typedef struct SCLPEventFacility SCLPEventFacility;
 173
 174 typedef struct SCLPDevice {
 175     /* private */
 176     DeviceState parent_obj;
 177     SCLPEventFacility *event_facility;
 178     int increment_size;
 179
 180     /* public */
 181 } SCLPDevice;
 182
 183 typedef struct SCLPDeviceClass {
 184     /* private */
 185     DeviceClass parent_class;
 186     void (*read_SCP_info)(SCLPDevice *sclp, SCCB *sccb);
 187     void (*read_storage_element0_info)(SCLPDevice *sclp, SCCB *sccb);
 188     void (*read_storage_element1_info)(SCLPDevice *sclp, SCCB *sccb);
 189     void (*attach_storage_element)(SCLPDevice *sclp, SCCB *sccb,
 190                                    uint16_t element);
 191     void (*assign_storage)(SCLPDevice *sclp, SCCB *sccb);
 192     void (*unassign_storage)(SCLPDevice *sclp, SCCB *sccb);
 193     void (*read_cpu_info)(SCLPDevice *sclp, SCCB *sccb);
 194
 195     /* public */
 196     void (*execute)(SCLPDevice *sclp, SCCB *sccb, uint32_t code);
 197     void (*service_interrupt)(SCLPDevice *sclp, uint32_t sccb);
 198 } SCLPDeviceClass;
 199
 200 typedef struct sclpMemoryHotplugDev sclpMemoryHotplugDev;
 201
 202 #define TYPE_SCLP_MEMORY_HOTPLUG_DEV "sclp-memory-hotplug-dev"
 203 #define SCLP_MEMORY_HOTPLUG_DEV(obj) \
 204   OBJECT_CHECK(sclpMemoryHotplugDev, (obj), TYPE_SCLP_MEMORY_HOTPLUG_DEV)
 205
 206 struct sclpMemoryHotplugDev {
 207     SysBusDevice parent;
 208     ram_addr_t standby_mem_size;
 209     ram_addr_t padded_ram_size;
 210     ram_addr_t pad_size;
 211     ram_addr_t standby_subregion_size;
 212     ram_addr_t rzm;
 213     int increment_size;
 214     char *standby_state_map;
 215 };
 216
 217 static inline int sccb_data_len(SCCB *sccb)
 218 {
 219     return be16_to_cpu(sccb->h.length) - sizeof(sccb->h);
 220 }
 221
 222
 223 void s390_sclp_init(void);
 224 sclpMemoryHotplugDev *init_sclp_memory_hotplug_dev(void);
 225 sclpMemoryHotplugDev *get_sclp_memory_hotplug_dev(void);
 226 void sclp_service_interrupt(uint32_t sccb);
 227 void raise_irq_cpu_hotplug(void);
 228
 229 #endif