include/hw/timer/renesas_tmr.h

   1 /*
   2  * Renesas 8bit timer Object
   3  *
   4  * Copyright (c) 2018 Yoshinori Sato
   5  *
   6  * SPDX-License-Identifier: GPL-2.0-or-later
   7  */
   8
   9 #ifndef HW_TIMER_RENESAS_TMR_H
  10 #define HW_TIMER_RENESAS_TMR_H
  11
  12 #include "qemu/timer.h"
  13 #include "hw/sysbus.h"
  14 #include "qom/object.h"
  15
  16 #define TYPE_RENESAS_TMR "renesas-tmr"
  17 typedef struct RTMRState RTMRState;
  18 #define RTMR(obj) OBJECT_CHECK(RTMRState, (obj), TYPE_RENESAS_TMR)
  19
  20 enum timer_event {
  21     cmia = 0,
  22     cmib = 1,
  23     ovi = 2,
  24     none = 3,
  25     TMR_NR_EVENTS = 4
  26 };
  27
  28 enum {
  29     TMR_CH = 2,
  30     TMR_NR_IRQ = 3 * TMR_CH
  31 };
  32
  33 struct RTMRState {
  34     /*< private >*/
  35     SysBusDevice parent_obj;
  36     /*< public >*/
  37
  38     uint64_t input_freq;
  39     MemoryRegion memory;
  40
  41     int64_t tick;
  42     uint8_t tcnt[TMR_CH];
  43     uint8_t tcora[TMR_CH];
  44     uint8_t tcorb[TMR_CH];
  45     uint8_t tcr[TMR_CH];
  46     uint8_t tccr[TMR_CH];
  47     uint8_t tcor[TMR_CH];
  48     uint8_t tcsr[TMR_CH];
  49     int64_t div_round[TMR_CH];
  50     uint8_t next[TMR_CH];
  51     qemu_irq cmia[TMR_CH];
  52     qemu_irq cmib[TMR_CH];
  53     qemu_irq ovi[TMR_CH];
  54     QEMUTimer timer[TMR_CH];
  55 };
  56
  57 #endif