include/hw/virtio/virtio-gpu.h

   1 /*
   2  * Virtio GPU Device
   3  *
   4  * Copyright Red Hat, Inc. 2013-2014
   5  *
   6  * Authors:
   7  *     Dave Airlie <airlied@redhat.com>
   8  *     Gerd Hoffmann <kraxel@redhat.com>
   9  *
  10  * This work is licensed under the terms of the GNU GPL, version 2.
  11  * See the COPYING file in the top-level directory.
  12  */
  13
  14 #ifndef HW_VIRTIO_GPU_H
  15 #define HW_VIRTIO_GPU_H
  16
  17 #include "qemu/queue.h"
  18 #include "ui/qemu-pixman.h"
  19 #include "ui/console.h"
  20 #include "hw/virtio/virtio.h"
  21 #include "qemu/log.h"
  22 #include "sysemu/vhost-user-backend.h"
  23
  24 #include "standard-headers/linux/virtio_gpu.h"
  25 #include "qom/object.h"
  26
  27 #define TYPE_VIRTIO_GPU_BASE "virtio-gpu-base"
  28 typedef struct VirtIOGPUBase VirtIOGPUBase;
  29 typedef struct VirtIOGPUBaseClass VirtIOGPUBaseClass;
  30 DECLARE_OBJ_CHECKERS(VirtIOGPUBase, VirtIOGPUBaseClass,
  31                      VIRTIO_GPU_BASE, TYPE_VIRTIO_GPU_BASE)
  32
  33 #define TYPE_VIRTIO_GPU "virtio-gpu-device"
  34 typedef struct VirtIOGPU VirtIOGPU;
  35 DECLARE_INSTANCE_CHECKER(VirtIOGPU, VIRTIO_GPU,
  36                          TYPE_VIRTIO_GPU)
  37
  38 #define TYPE_VHOST_USER_GPU "vhost-user-gpu"
  39 typedef struct VhostUserGPU VhostUserGPU;
  40 DECLARE_INSTANCE_CHECKER(VhostUserGPU, VHOST_USER_GPU,
  41                          TYPE_VHOST_USER_GPU)
  42
  43 #define VIRTIO_ID_GPU 16
  44
  45 struct virtio_gpu_simple_resource {
  46     uint32_t resource_id;
  47     uint32_t width;
  48     uint32_t height;
  49     uint32_t format;
  50     uint64_t *addrs;
  51     struct iovec *iov;
  52     unsigned int iov_cnt;
  53     uint32_t scanout_bitmask;
  54     pixman_image_t *image;
  55     uint64_t hostmem;
  56     QTAILQ_ENTRY(virtio_gpu_simple_resource) next;
  57 };
  58
  59 struct virtio_gpu_scanout {
  60     QemuConsole *con;
  61     DisplaySurface *ds;
  62     uint32_t width, height;
  63     int x, y;
  64     int invalidate;
  65     uint32_t resource_id;
  66     struct virtio_gpu_update_cursor cursor;
  67     QEMUCursor *current_cursor;
  68 };
  69
  70 struct virtio_gpu_requested_state {
  71     uint32_t width, height;
  72     int x, y;
  73 };
  74
  75 enum virtio_gpu_base_conf_flags {
  76     VIRTIO_GPU_FLAG_VIRGL_ENABLED = 1,
  77     VIRTIO_GPU_FLAG_STATS_ENABLED,
  78     VIRTIO_GPU_FLAG_EDID_ENABLED,
  79 };
  80
  81 #define virtio_gpu_virgl_enabled(_cfg) \
  82     (_cfg.flags & (1 << VIRTIO_GPU_FLAG_VIRGL_ENABLED))
  83 #define virtio_gpu_stats_enabled(_cfg) \
  84     (_cfg.flags & (1 << VIRTIO_GPU_FLAG_STATS_ENABLED))
  85 #define virtio_gpu_edid_enabled(_cfg) \
  86     (_cfg.flags & (1 << VIRTIO_GPU_FLAG_EDID_ENABLED))
  87
  88 struct virtio_gpu_base_conf {
  89     uint32_t max_outputs;
  90     uint32_t flags;
  91     uint32_t xres;
  92     uint32_t yres;
  93 };
  94
  95 struct virtio_gpu_ctrl_command {
  96     VirtQueueElement elem;
  97     VirtQueue *vq;
  98     struct virtio_gpu_ctrl_hdr cmd_hdr;
  99     uint32_t error;
 100     bool finished;
 101     QTAILQ_ENTRY(virtio_gpu_ctrl_command) next;
 102 };
 103
 104 struct VirtIOGPUBase {
 105     VirtIODevice parent_obj;
 106
 107     Error *migration_blocker;
 108
 109     struct virtio_gpu_base_conf conf;
 110     struct virtio_gpu_config virtio_config;
 111
 112     bool use_virgl_renderer;
 113     int renderer_blocked;
 114     int enable;
 115
 116     struct virtio_gpu_scanout scanout[VIRTIO_GPU_MAX_SCANOUTS];
 117
 118     int enabled_output_bitmask;
 119     struct virtio_gpu_requested_state req_state[VIRTIO_GPU_MAX_SCANOUTS];
 120 };
 121
 122 struct VirtIOGPUBaseClass {
 123     VirtioDeviceClass parent;
 124
 125     void (*gl_unblock)(VirtIOGPUBase *g);
 126 };
 127
 128 #define VIRTIO_GPU_BASE_PROPERTIES(_state, _conf)                       \
 129     DEFINE_PROP_UINT32("max_outputs", _state, _conf.max_outputs, 1),    \
 130     DEFINE_PROP_BIT("edid", _state, _conf.flags, \
 131                     VIRTIO_GPU_FLAG_EDID_ENABLED, true), \
 132     DEFINE_PROP_UINT32("xres", _state, _conf.xres, 1024), \
 133     DEFINE_PROP_UINT32("yres", _state, _conf.yres, 768)
 134
 135 struct VirtIOGPU {
 136     VirtIOGPUBase parent_obj;
 137
 138     uint64_t conf_max_hostmem;
 139
 140     VirtQueue *ctrl_vq;
 141     VirtQueue *cursor_vq;
 142
 143     QEMUBH *ctrl_bh;
 144     QEMUBH *cursor_bh;
 145
 146     QTAILQ_HEAD(, virtio_gpu_simple_resource) reslist;
 147     QTAILQ_HEAD(, virtio_gpu_ctrl_command) cmdq;
 148     QTAILQ_HEAD(, virtio_gpu_ctrl_command) fenceq;
 149
 150     uint64_t hostmem;
 151
 152     bool renderer_inited;
 153     bool renderer_reset;
 154     QEMUTimer *fence_poll;
 155     QEMUTimer *print_stats;
 156
 157     uint32_t inflight;
 158     struct {
 159         uint32_t max_inflight;
 160         uint32_t requests;
 161         uint32_t req_3d;
 162         uint32_t bytes_3d;
 163     } stats;
 164 };
 165
 166 struct VhostUserGPU {
 167     VirtIOGPUBase parent_obj;
 168
 169     VhostUserBackend *vhost;
 170     int vhost_gpu_fd; /* closed by the chardev */
 171     CharBackend vhost_chr;
 172     QemuDmaBuf dmabuf[VIRTIO_GPU_MAX_SCANOUTS];
 173     bool backend_blocked;
 174 };
 175
 176 extern const GraphicHwOps virtio_gpu_ops;
 177
 178 #define VIRTIO_GPU_FILL_CMD(out) do {                                   \
 179         size_t s;                                                       \
 180         s = iov_to_buf(cmd->elem.out_sg, cmd->elem.out_num, 0,          \
 181                        &out, sizeof(out));                              \
 182         if (s != sizeof(out)) {                                         \
 183             qemu_log_mask(LOG_GUEST_ERROR,                              \
 184                           "%s: command size incorrect %zu vs %zu\n",    \
 185                           __func__, s, sizeof(out));                    \
 186             return;                                                     \
 187         }                                                               \
 188     } while (0)
 189
 190 /* virtio-gpu-base.c */
 191 bool virtio_gpu_base_device_realize(DeviceState *qdev,
 192                                     VirtIOHandleOutput ctrl_cb,
 193                                     VirtIOHandleOutput cursor_cb,
 194                                     Error **errp);
 195 void virtio_gpu_base_reset(VirtIOGPUBase *g);
 196 void virtio_gpu_base_fill_display_info(VirtIOGPUBase *g,
 197                         struct virtio_gpu_resp_display_info *dpy_info);
 198
 199 /* virtio-gpu.c */
 200 void virtio_gpu_ctrl_response(VirtIOGPU *g,
 201                               struct virtio_gpu_ctrl_command *cmd,
 202                               struct virtio_gpu_ctrl_hdr *resp,
 203                               size_t resp_len);
 204 void virtio_gpu_ctrl_response_nodata(VirtIOGPU *g,
 205                                      struct virtio_gpu_ctrl_command *cmd,
 206                                      enum virtio_gpu_ctrl_type type);
 207 void virtio_gpu_get_display_info(VirtIOGPU *g,
 208                                  struct virtio_gpu_ctrl_command *cmd);
 209 void virtio_gpu_get_edid(VirtIOGPU *g,
 210                          struct virtio_gpu_ctrl_command *cmd);
 211 int virtio_gpu_create_mapping_iov(VirtIOGPU *g,
 212                                   struct virtio_gpu_resource_attach_backing *ab,
 213                                   struct virtio_gpu_ctrl_command *cmd,
 214                                   uint64_t **addr, struct iovec **iov);
 215 void virtio_gpu_cleanup_mapping_iov(VirtIOGPU *g,
 216                                     struct iovec *iov, uint32_t count);
 217 void virtio_gpu_process_cmdq(VirtIOGPU *g);
 218
 219 /* virtio-gpu-3d.c */
 220 void virtio_gpu_virgl_process_cmd(VirtIOGPU *g,
 221                                   struct virtio_gpu_ctrl_command *cmd);
 222 void virtio_gpu_virgl_fence_poll(VirtIOGPU *g);
 223 void virtio_gpu_virgl_reset(VirtIOGPU *g);
 224 int virtio_gpu_virgl_init(VirtIOGPU *g);
 225 int virtio_gpu_virgl_get_num_capsets(VirtIOGPU *g);
 226
 227 #endif