4 * Copyright Red Hat, Inc. 2013-2014
7 * Dave Airlie <airlied@redhat.com>
8 * Gerd Hoffmann <kraxel@redhat.com>
10 * This work is licensed under the terms of the GNU GPL, version 2.
11 * See the COPYING file in the top-level directory.
14 #ifndef HW_VIRTIO_GPU_H
15 #define HW_VIRTIO_GPU_H
17 #include "qemu/queue.h"
18 #include "ui/qemu-pixman.h"
19 #include "ui/console.h"
20 #include "hw/virtio/virtio.h"
22 #include "sysemu/vhost-user-backend.h"
24 #include "standard-headers/linux/virtio_gpu.h"
25 #include "qom/object.h"
27 #define TYPE_VIRTIO_GPU_BASE "virtio-gpu-base"
28 OBJECT_DECLARE_TYPE(VirtIOGPUBase
, VirtIOGPUBaseClass
,
29 virtio_gpu_base
, VIRTIO_GPU_BASE
)
31 #define TYPE_VIRTIO_GPU "virtio-gpu-device"
32 typedef struct VirtIOGPU VirtIOGPU
;
33 DECLARE_INSTANCE_CHECKER(VirtIOGPU
, VIRTIO_GPU
,
36 #define TYPE_VHOST_USER_GPU "vhost-user-gpu"
37 typedef struct VhostUserGPU VhostUserGPU
;
38 DECLARE_INSTANCE_CHECKER(VhostUserGPU
, VHOST_USER_GPU
,
41 #define VIRTIO_ID_GPU 16
43 struct virtio_gpu_simple_resource
{
51 uint32_t scanout_bitmask
;
52 pixman_image_t
*image
;
54 QTAILQ_ENTRY(virtio_gpu_simple_resource
) next
;
57 struct virtio_gpu_scanout
{
60 uint32_t width
, height
;
64 struct virtio_gpu_update_cursor cursor
;
65 QEMUCursor
*current_cursor
;
68 struct virtio_gpu_requested_state
{
69 uint32_t width
, height
;
73 enum virtio_gpu_base_conf_flags
{
74 VIRTIO_GPU_FLAG_VIRGL_ENABLED
= 1,
75 VIRTIO_GPU_FLAG_STATS_ENABLED
,
76 VIRTIO_GPU_FLAG_EDID_ENABLED
,
79 #define virtio_gpu_virgl_enabled(_cfg) \
80 (_cfg.flags & (1 << VIRTIO_GPU_FLAG_VIRGL_ENABLED))
81 #define virtio_gpu_stats_enabled(_cfg) \
82 (_cfg.flags & (1 << VIRTIO_GPU_FLAG_STATS_ENABLED))
83 #define virtio_gpu_edid_enabled(_cfg) \
84 (_cfg.flags & (1 << VIRTIO_GPU_FLAG_EDID_ENABLED))
86 struct virtio_gpu_base_conf
{
93 struct virtio_gpu_ctrl_command
{
94 VirtQueueElement elem
;
96 struct virtio_gpu_ctrl_hdr cmd_hdr
;
99 QTAILQ_ENTRY(virtio_gpu_ctrl_command
) next
;
102 struct VirtIOGPUBase
{
103 VirtIODevice parent_obj
;
105 Error
*migration_blocker
;
107 struct virtio_gpu_base_conf conf
;
108 struct virtio_gpu_config virtio_config
;
110 bool use_virgl_renderer
;
111 int renderer_blocked
;
114 struct virtio_gpu_scanout scanout
[VIRTIO_GPU_MAX_SCANOUTS
];
116 int enabled_output_bitmask
;
117 struct virtio_gpu_requested_state req_state
[VIRTIO_GPU_MAX_SCANOUTS
];
120 struct VirtIOGPUBaseClass
{
121 VirtioDeviceClass parent
;
123 void (*gl_unblock
)(VirtIOGPUBase
*g
);
126 #define VIRTIO_GPU_BASE_PROPERTIES(_state, _conf) \
127 DEFINE_PROP_UINT32("max_outputs", _state, _conf.max_outputs, 1), \
128 DEFINE_PROP_BIT("edid", _state, _conf.flags, \
129 VIRTIO_GPU_FLAG_EDID_ENABLED, true), \
130 DEFINE_PROP_UINT32("xres", _state, _conf.xres, 1024), \
131 DEFINE_PROP_UINT32("yres", _state, _conf.yres, 768)
134 VirtIOGPUBase parent_obj
;
136 uint64_t conf_max_hostmem
;
139 VirtQueue
*cursor_vq
;
144 QTAILQ_HEAD(, virtio_gpu_simple_resource
) reslist
;
145 QTAILQ_HEAD(, virtio_gpu_ctrl_command
) cmdq
;
146 QTAILQ_HEAD(, virtio_gpu_ctrl_command
) fenceq
;
150 bool renderer_inited
;
152 QEMUTimer
*fence_poll
;
153 QEMUTimer
*print_stats
;
157 uint32_t max_inflight
;
164 struct VhostUserGPU
{
165 VirtIOGPUBase parent_obj
;
167 VhostUserBackend
*vhost
;
168 int vhost_gpu_fd
; /* closed by the chardev */
169 CharBackend vhost_chr
;
170 QemuDmaBuf dmabuf
[VIRTIO_GPU_MAX_SCANOUTS
];
171 bool backend_blocked
;
174 extern const GraphicHwOps virtio_gpu_ops
;
176 #define VIRTIO_GPU_FILL_CMD(out) do { \
178 s = iov_to_buf(cmd->elem.out_sg, cmd->elem.out_num, 0, \
179 &out, sizeof(out)); \
180 if (s != sizeof(out)) { \
181 qemu_log_mask(LOG_GUEST_ERROR, \
182 "%s: command size incorrect %zu vs %zu\n", \
183 __func__, s, sizeof(out)); \
188 /* virtio-gpu-base.c */
189 bool virtio_gpu_base_device_realize(DeviceState
*qdev
,
190 VirtIOHandleOutput ctrl_cb
,
191 VirtIOHandleOutput cursor_cb
,
193 void virtio_gpu_base_reset(VirtIOGPUBase
*g
);
194 void virtio_gpu_base_fill_display_info(VirtIOGPUBase
*g
,
195 struct virtio_gpu_resp_display_info
*dpy_info
);
198 void virtio_gpu_ctrl_response(VirtIOGPU
*g
,
199 struct virtio_gpu_ctrl_command
*cmd
,
200 struct virtio_gpu_ctrl_hdr
*resp
,
202 void virtio_gpu_ctrl_response_nodata(VirtIOGPU
*g
,
203 struct virtio_gpu_ctrl_command
*cmd
,
204 enum virtio_gpu_ctrl_type type
);
205 void virtio_gpu_get_display_info(VirtIOGPU
*g
,
206 struct virtio_gpu_ctrl_command
*cmd
);
207 void virtio_gpu_get_edid(VirtIOGPU
*g
,
208 struct virtio_gpu_ctrl_command
*cmd
);
209 int virtio_gpu_create_mapping_iov(VirtIOGPU
*g
,
210 struct virtio_gpu_resource_attach_backing
*ab
,
211 struct virtio_gpu_ctrl_command
*cmd
,
212 uint64_t **addr
, struct iovec
**iov
);
213 void virtio_gpu_cleanup_mapping_iov(VirtIOGPU
*g
,
214 struct iovec
*iov
, uint32_t count
);
215 void virtio_gpu_process_cmdq(VirtIOGPU
*g
);
217 /* virtio-gpu-3d.c */
218 void virtio_gpu_virgl_process_cmd(VirtIOGPU
*g
,
219 struct virtio_gpu_ctrl_command
*cmd
);
220 void virtio_gpu_virgl_fence_poll(VirtIOGPU
*g
);
221 void virtio_gpu_virgl_reset(VirtIOGPU
*g
);
222 int virtio_gpu_virgl_init(VirtIOGPU
*g
);
223 int virtio_gpu_virgl_get_num_capsets(VirtIOGPU
*g
);