include/hw/watchdog/wdt_aspeed.h

   1 /*
   2  * ASPEED Watchdog Controller
   3  *
   4  * Copyright (C) 2016-2017 IBM Corp.
   5  *
   6  * This code is licensed under the GPL version 2 or later. See the
   7  * COPYING file in the top-level directory.
   8  */
   9
  10 #ifndef WDT_ASPEED_H
  11 #define WDT_ASPEED_H
  12
  13 #include "hw/misc/aspeed_scu.h"
  14 #include "hw/sysbus.h"
  15 #include "qom/object.h"
  16
  17 #define TYPE_ASPEED_WDT "aspeed.wdt"
  18 typedef struct AspeedWDTClass AspeedWDTClass;
  19 typedef struct AspeedWDTState AspeedWDTState;
  20 DECLARE_OBJ_CHECKERS(AspeedWDTState, AspeedWDTClass,
  21                      ASPEED_WDT, TYPE_ASPEED_WDT)
  22 #define TYPE_ASPEED_2400_WDT TYPE_ASPEED_WDT "-ast2400"
  23 #define TYPE_ASPEED_2500_WDT TYPE_ASPEED_WDT "-ast2500"
  24 #define TYPE_ASPEED_2600_WDT TYPE_ASPEED_WDT "-ast2600"
  25
  26 #define ASPEED_WDT_REGS_MAX        (0x20 / 4)
  27
  28 struct AspeedWDTState {
  29     /*< private >*/
  30     SysBusDevice parent_obj;
  31     QEMUTimer *timer;
  32
  33     /*< public >*/
  34     MemoryRegion iomem;
  35     uint32_t regs[ASPEED_WDT_REGS_MAX];
  36
  37     AspeedSCUState *scu;
  38     uint32_t pclk_freq;
  39 };
  40
  41
  42 struct AspeedWDTClass {
  43     SysBusDeviceClass parent_class;
  44
  45     uint32_t offset;
  46     uint32_t ext_pulse_width_mask;
  47     uint32_t reset_ctrl_reg;
  48     void (*reset_pulse)(AspeedWDTState *s, uint32_t property);
  49     void (*wdt_reload)(AspeedWDTState *s);
  50 };
  51
  52 #endif /* WDT_ASPEED_H */