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1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2014 Felix Fietkau <nbd@nbd.name>
4 * Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
7 #ifndef _LINUX_BITFIELD_H
8 #define _LINUX_BITFIELD_H
10 #include <linux/build_bug.h>
11 #include <asm/byteorder.h>
14 * Bitfield access macros
16 * FIELD_{GET,PREP} macros take as first parameter shifted mask
17 * from which they extract the base mask and shift amount.
18 * Mask must be a compilation time constant.
22 * #define REG_FIELD_A GENMASK(6, 0)
23 * #define REG_FIELD_B BIT(7)
24 * #define REG_FIELD_C GENMASK(15, 8)
25 * #define REG_FIELD_D GENMASK(31, 16)
28 * a = FIELD_GET(REG_FIELD_A, reg);
29 * b = FIELD_GET(REG_FIELD_B, reg);
32 * reg = FIELD_PREP(REG_FIELD_A, 1) |
33 * FIELD_PREP(REG_FIELD_B, 0) |
34 * FIELD_PREP(REG_FIELD_C, c) |
35 * FIELD_PREP(REG_FIELD_D, 0x40);
38 * reg &= ~REG_FIELD_C;
39 * reg |= FIELD_PREP(REG_FIELD_C, c);
42 #define __bf_shf(x) (__builtin_ffsll(x) - 1)
44 #define __BF_FIELD_CHECK(_mask, _reg, _val, _pfx) \
46 BUILD_BUG_ON_MSG(!__builtin_constant_p(_mask), \
47 _pfx "mask is not constant"); \
48 BUILD_BUG_ON_MSG((_mask) == 0, _pfx "mask is zero"); \
49 BUILD_BUG_ON_MSG(__builtin_constant_p(_val) ? \
50 ~((_mask) >> __bf_shf(_mask)) & (_val) : 0, \
51 _pfx "value too large for the field"); \
52 BUILD_BUG_ON_MSG((_mask) > (typeof(_reg))~0ull, \
53 _pfx "type of reg too small for mask"); \
54 __BUILD_BUG_ON_NOT_POWER_OF_2((_mask) + \
55 (1ULL << __bf_shf(_mask))); \
59 * FIELD_FIT() - check if value fits in the field
60 * @_mask: shifted mask defining the field's length and position
61 * @_val: value to test against the field
63 * Return: true if @_val can fit inside @_mask, false if @_val is too big.
65 #define FIELD_FIT(_mask, _val) \
67 __BF_FIELD_CHECK(_mask, 0ULL, _val, "FIELD_FIT: "); \
68 !((((typeof(_mask))_val) << __bf_shf(_mask)) & ~(_mask)); \
72 * FIELD_PREP() - prepare a bitfield element
73 * @_mask: shifted mask defining the field's length and position
74 * @_val: value to put in the field
76 * FIELD_PREP() masks and shifts up the value. The result should
77 * be combined with other fields of the bitfield using logical OR.
79 #define FIELD_PREP(_mask, _val) \
81 __BF_FIELD_CHECK(_mask, 0ULL, _val, "FIELD_PREP: "); \
82 ((typeof(_mask))(_val) << __bf_shf(_mask)) & (_mask); \
86 * FIELD_GET() - extract a bitfield element
87 * @_mask: shifted mask defining the field's length and position
88 * @_reg: value of entire bitfield
90 * FIELD_GET() extracts the field specified by @_mask from the
91 * bitfield passed in as @_reg by masking and shifting it down.
93 #define FIELD_GET(_mask, _reg) \
95 __BF_FIELD_CHECK(_mask, _reg, 0U, "FIELD_GET: "); \
96 (typeof(_mask))(((_reg) & (_mask)) >> __bf_shf(_mask)); \
99 extern void __compiletime_error("value doesn't fit into mask")
100 __field_overflow(void);
101 extern void __compiletime_error("bad bitfield mask")
103 static __always_inline u64
field_multiplier(u64 field
)
105 if ((field
| (field
- 1)) & ((field
| (field
- 1)) + 1))
107 return field
& -field
;
109 static __always_inline u64
field_mask(u64 field
)
111 return field
/ field_multiplier(field
);
113 #define ____MAKE_OP(type,base,to,from) \
114 static __always_inline __##type type##_encode_bits(base v, base field) \
116 if (__builtin_constant_p(v) && (v & ~field_mask(field))) \
117 __field_overflow(); \
118 return to((v & field_mask(field)) * field_multiplier(field)); \
120 static __always_inline __##type type##_replace_bits(__##type old, \
121 base val, base field) \
123 return (old & ~to(field)) | type##_encode_bits(val, field); \
125 static __always_inline void type##p_replace_bits(__##type *p, \
126 base val, base field) \
128 *p = (*p & ~to(field)) | type##_encode_bits(val, field); \
130 static __always_inline base type##_get_bits(__##type v, base field) \
132 return (from(v) & field)/field_multiplier(field); \
134 #define __MAKE_OP(size) \
135 ____MAKE_OP(le##size,u##size,cpu_to_le##size,le##size##_to_cpu) \
136 ____MAKE_OP(be##size,u##size,cpu_to_be##size,be##size##_to_cpu) \
137 ____MAKE_OP(u##size,u##size,,)