include/linux/coresight.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  * Copyright (c) 2012, The Linux Foundation. All rights reserved.
   4  */
   5
   6 #ifndef _LINUX_CORESIGHT_H
   7 #define _LINUX_CORESIGHT_H
   8
   9 #include <linux/device.h>
  10 #include <linux/perf_event.h>
  11 #include <linux/sched.h>
  12
  13 /* Peripheral id registers (0xFD0-0xFEC) */
  14 #define CORESIGHT_PERIPHIDR4    0xfd0
  15 #define CORESIGHT_PERIPHIDR5    0xfd4
  16 #define CORESIGHT_PERIPHIDR6    0xfd8
  17 #define CORESIGHT_PERIPHIDR7    0xfdC
  18 #define CORESIGHT_PERIPHIDR0    0xfe0
  19 #define CORESIGHT_PERIPHIDR1    0xfe4
  20 #define CORESIGHT_PERIPHIDR2    0xfe8
  21 #define CORESIGHT_PERIPHIDR3    0xfeC
  22 /* Component id registers (0xFF0-0xFFC) */
  23 #define CORESIGHT_COMPIDR0      0xff0
  24 #define CORESIGHT_COMPIDR1      0xff4
  25 #define CORESIGHT_COMPIDR2      0xff8
  26 #define CORESIGHT_COMPIDR3      0xffC
  27
  28 #define ETM_ARCH_V3_3           0x23
  29 #define ETM_ARCH_V3_5           0x25
  30 #define PFT_ARCH_V1_0           0x30
  31 #define PFT_ARCH_V1_1           0x31
  32
  33 #define CORESIGHT_UNLOCK        0xc5acce55
  34
  35 extern struct bus_type coresight_bustype;
  36
  37 enum coresight_dev_type {
  38         CORESIGHT_DEV_TYPE_NONE,
  39         CORESIGHT_DEV_TYPE_SINK,
  40         CORESIGHT_DEV_TYPE_LINK,
  41         CORESIGHT_DEV_TYPE_LINKSINK,
  42         CORESIGHT_DEV_TYPE_SOURCE,
  43         CORESIGHT_DEV_TYPE_HELPER,
  44 };
  45
  46 enum coresight_dev_subtype_sink {
  47         CORESIGHT_DEV_SUBTYPE_SINK_NONE,
  48         CORESIGHT_DEV_SUBTYPE_SINK_PORT,
  49         CORESIGHT_DEV_SUBTYPE_SINK_BUFFER,
  50 };
  51
  52 enum coresight_dev_subtype_link {
  53         CORESIGHT_DEV_SUBTYPE_LINK_NONE,
  54         CORESIGHT_DEV_SUBTYPE_LINK_MERG,
  55         CORESIGHT_DEV_SUBTYPE_LINK_SPLIT,
  56         CORESIGHT_DEV_SUBTYPE_LINK_FIFO,
  57 };
  58
  59 enum coresight_dev_subtype_source {
  60         CORESIGHT_DEV_SUBTYPE_SOURCE_NONE,
  61         CORESIGHT_DEV_SUBTYPE_SOURCE_PROC,
  62         CORESIGHT_DEV_SUBTYPE_SOURCE_BUS,
  63         CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE,
  64 };
  65
  66 enum coresight_dev_subtype_helper {
  67         CORESIGHT_DEV_SUBTYPE_HELPER_NONE,
  68         CORESIGHT_DEV_SUBTYPE_HELPER_CATU,
  69 };
  70
  71 /**
  72  * union coresight_dev_subtype - further characterisation of a type
  73  * @sink_subtype:       type of sink this component is, as defined
  74  *                      by @coresight_dev_subtype_sink.
  75  * @link_subtype:       type of link this component is, as defined
  76  *                      by @coresight_dev_subtype_link.
  77  * @source_subtype:     type of source this component is, as defined
  78  *                      by @coresight_dev_subtype_source.
  79  * @helper_subtype:     type of helper this component is, as defined
  80  *                      by @coresight_dev_subtype_helper.
  81  */
  82 union coresight_dev_subtype {
  83         /* We have some devices which acts as LINK and SINK */
  84         struct {
  85                 enum coresight_dev_subtype_sink sink_subtype;
  86                 enum coresight_dev_subtype_link link_subtype;
  87         };
  88         enum coresight_dev_subtype_source source_subtype;
  89         enum coresight_dev_subtype_helper helper_subtype;
  90 };
  91
  92 /**
  93  * struct coresight_platform_data - data harvested from the DT specification
  94  * @cpu:        the CPU a source belongs to. Only applicable for ETM/PTMs.
  95  * @name:       name of the component as shown under sysfs.
  96  * @nr_inport:  number of input ports for this component.
  97  * @nr_outport: number of output ports for this component.
  98  * @conns:      Array of nr_outport connections from this component
  99  */
 100 struct coresight_platform_data {
 101         int cpu;
 102         const char *name;
 103         int nr_inport;
 104         int nr_outport;
 105         struct coresight_connection *conns;
 106 };
 107
 108 /**
 109  * struct coresight_desc - description of a component required from drivers
 110  * @type:       as defined by @coresight_dev_type.
 111  * @subtype:    as defined by @coresight_dev_subtype.
 112  * @ops:        generic operations for this component, as defined
 113                 by @coresight_ops.
 114  * @pdata:      platform data collected from DT.
 115  * @dev:        The device entity associated to this component.
 116  * @groups:     operations specific to this component. These will end up
 117                 in the component's sysfs sub-directory.
 118  */
 119 struct coresight_desc {
 120         enum coresight_dev_type type;
 121         union coresight_dev_subtype subtype;
 122         const struct coresight_ops *ops;
 123         struct coresight_platform_data *pdata;
 124         struct device *dev;
 125         const struct attribute_group **groups;
 126 };
 127
 128 /**
 129  * struct coresight_connection - representation of a single connection
 130  * @outport:    a connection's output port number.
 131  * @chid_name:  remote component's name.
 132  * @child_port: remote component's port number @output is connected to.
 133  * @child_dev:  a @coresight_device representation of the component
 134                 connected to @outport.
 135  */
 136 struct coresight_connection {
 137         int outport;
 138         const char *child_name;
 139         int child_port;
 140         struct coresight_device *child_dev;
 141 };
 142
 143 /**
 144  * struct coresight_device - representation of a device as used by the framework
 145  * @conns:      array of coresight_connections associated to this component.
 146  * @nr_inport:  number of input port associated to this component.
 147  * @nr_outport: number of output port associated to this component.
 148  * @type:       as defined by @coresight_dev_type.
 149  * @subtype:    as defined by @coresight_dev_subtype.
 150  * @ops:        generic operations for this component, as defined
 151                 by @coresight_ops.
 152  * @dev:        The device entity associated to this component.
 153  * @refcnt:     keep track of what is in use.
 154  * @orphan:     true if the component has connections that haven't been linked.
 155  * @enable:     'true' if component is currently part of an active path.
 156  * @activated:  'true' only if a _sink_ has been activated.  A sink can be
 157                 activated but not yet enabled.  Enabling for a _sink_
 158                 happens when a source has been selected for that it.
 159  */
 160 struct coresight_device {
 161         struct coresight_connection *conns;
 162         int nr_inport;
 163         int nr_outport;
 164         enum coresight_dev_type type;
 165         union coresight_dev_subtype subtype;
 166         const struct coresight_ops *ops;
 167         struct device dev;
 168         atomic_t *refcnt;
 169         bool orphan;
 170         bool enable;    /* true only if configured as part of a path */
 171         bool activated; /* true only if a sink is part of a path */
 172 };
 173
 174 #define to_coresight_device(d) container_of(d, struct coresight_device, dev)
 175
 176 #define source_ops(csdev)       csdev->ops->source_ops
 177 #define sink_ops(csdev)         csdev->ops->sink_ops
 178 #define link_ops(csdev)         csdev->ops->link_ops
 179 #define helper_ops(csdev)       csdev->ops->helper_ops
 180
 181 /**
 182  * struct coresight_ops_sink - basic operations for a sink
 183  * Operations available for sinks
 184  * @enable:             enables the sink.
 185  * @disable:            disables the sink.
 186  * @alloc_buffer:       initialises perf's ring buffer for trace collection.
 187  * @free_buffer:        release memory allocated in @get_config.
 188  * @update_buffer:      update buffer pointers after a trace session.
 189  */
 190 struct coresight_ops_sink {
 191         int (*enable)(struct coresight_device *csdev, u32 mode, void *data);
 192         void (*disable)(struct coresight_device *csdev);
 193         void *(*alloc_buffer)(struct coresight_device *csdev, int cpu,
 194                               void **pages, int nr_pages, bool overwrite);
 195         void (*free_buffer)(void *config);
 196         unsigned long (*update_buffer)(struct coresight_device *csdev,
 197                               struct perf_output_handle *handle,
 198                               void *sink_config);
 199 };
 200
 201 /**
 202  * struct coresight_ops_link - basic operations for a link
 203  * Operations available for links.
 204  * @enable:     enables flow between iport and oport.
 205  * @disable:    disables flow between iport and oport.
 206  */
 207 struct coresight_ops_link {
 208         int (*enable)(struct coresight_device *csdev, int iport, int oport);
 209         void (*disable)(struct coresight_device *csdev, int iport, int oport);
 210 };
 211
 212 /**
 213  * struct coresight_ops_source - basic operations for a source
 214  * Operations available for sources.
 215  * @cpu_id:     returns the value of the CPU number this component
 216  *              is associated to.
 217  * @trace_id:   returns the value of the component's trace ID as known
 218  *              to the HW.
 219  * @enable:     enables tracing for a source.
 220  * @disable:    disables tracing for a source.
 221  */
 222 struct coresight_ops_source {
 223         int (*cpu_id)(struct coresight_device *csdev);
 224         int (*trace_id)(struct coresight_device *csdev);
 225         int (*enable)(struct coresight_device *csdev,
 226                       struct perf_event *event,  u32 mode);
 227         void (*disable)(struct coresight_device *csdev,
 228                         struct perf_event *event);
 229 };
 230
 231 /**
 232  * struct coresight_ops_helper - Operations for a helper device.
 233  *
 234  * All operations could pass in a device specific data, which could
 235  * help the helper device to determine what to do.
 236  *
 237  * @enable      : Enable the device
 238  * @disable     : Disable the device
 239  */
 240 struct coresight_ops_helper {
 241         int (*enable)(struct coresight_device *csdev, void *data);
 242         int (*disable)(struct coresight_device *csdev, void *data);
 243 };
 244
 245 struct coresight_ops {
 246         const struct coresight_ops_sink *sink_ops;
 247         const struct coresight_ops_link *link_ops;
 248         const struct coresight_ops_source *source_ops;
 249         const struct coresight_ops_helper *helper_ops;
 250 };
 251
 252 #ifdef CONFIG_CORESIGHT
 253 extern struct coresight_device *
 254 coresight_register(struct coresight_desc *desc);
 255 extern void coresight_unregister(struct coresight_device *csdev);
 256 extern int coresight_enable(struct coresight_device *csdev);
 257 extern void coresight_disable(struct coresight_device *csdev);
 258 extern int coresight_timeout(void __iomem *addr, u32 offset,
 259                              int position, int value);
 260
 261 extern int coresight_claim_device(void __iomem *base);
 262 extern int coresight_claim_device_unlocked(void __iomem *base);
 263
 264 extern void coresight_disclaim_device(void __iomem *base);
 265 extern void coresight_disclaim_device_unlocked(void __iomem *base);
 266
 267 #else
 268 static inline struct coresight_device *
 269 coresight_register(struct coresight_desc *desc) { return NULL; }
 270 static inline void coresight_unregister(struct coresight_device *csdev) {}
 271 static inline int
 272 coresight_enable(struct coresight_device *csdev) { return -ENOSYS; }
 273 static inline void coresight_disable(struct coresight_device *csdev) {}
 274 static inline int coresight_timeout(void __iomem *addr, u32 offset,
 275                                      int position, int value) { return 1; }
 276 static inline int coresight_claim_device_unlocked(void __iomem *base)
 277 {
 278         return -EINVAL;
 279 }
 280
 281 static inline int coresight_claim_device(void __iomem *base)
 282 {
 283         return -EINVAL;
 284 }
 285
 286 static inline void coresight_disclaim_device(void __iomem *base) {}
 287 static inline void coresight_disclaim_device_unlocked(void __iomem *base) {}
 288
 289 #endif
 290
 291 #ifdef CONFIG_OF
 292 extern int of_coresight_get_cpu(const struct device_node *node);
 293 extern struct coresight_platform_data *
 294 of_get_coresight_platform_data(struct device *dev,
 295                                const struct device_node *node);
 296 #else
 297 static inline int of_coresight_get_cpu(const struct device_node *node)
 298 { return 0; }
 299 static inline struct coresight_platform_data *of_get_coresight_platform_data(
 300         struct device *dev, const struct device_node *node) { return NULL; }
 301 #endif
 302
 303 #endif