2 * Copyright (c) 2006, Intel Corporation.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * You should have received a copy of the GNU General Public License along with
14 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
15 * Place - Suite 330, Boston, MA 02111-1307 USA.
17 * Copyright (C) Ashok Raj <ashok.raj@intel.com>
18 * Copyright (C) Shaohua Li <shaohua.li@intel.com>
24 #include <linux/acpi.h>
25 #include <linux/types.h>
26 #include <linux/msi.h>
27 #include <linux/irqreturn.h>
28 #include <linux/rwsem.h>
29 #include <linux/rculist.h>
31 struct acpi_dmar_header
;
34 # define DMAR_UNITS_SUPPORTED MAX_IO_APICS
36 # define DMAR_UNITS_SUPPORTED 64
40 #define DMAR_INTR_REMAP 0x1
41 #define DMAR_X2APIC_OPT_OUT 0x2
45 struct dmar_dev_scope
{
46 struct device __rcu
*dev
;
51 #ifdef CONFIG_DMAR_TABLE
52 extern struct acpi_table_header
*dmar_tbl
;
53 struct dmar_drhd_unit
{
54 struct list_head list
; /* list of drhd units */
55 struct acpi_dmar_header
*hdr
; /* ACPI header */
56 u64 reg_base_addr
; /* register base address*/
57 struct dmar_dev_scope
*devices
;/* target device array */
58 int devices_cnt
; /* target device count */
59 u16 segment
; /* PCI domain */
60 u8 ignored
:1; /* ignore drhd */
62 struct intel_iommu
*iommu
;
65 struct dmar_pci_path
{
71 struct dmar_pci_notify_info
{
77 struct dmar_pci_path path
[];
78 } __attribute__((packed
));
80 extern struct rw_semaphore dmar_global_lock
;
81 extern struct list_head dmar_drhd_units
;
83 #define for_each_drhd_unit(drhd) \
84 list_for_each_entry_rcu(drhd, &dmar_drhd_units, list)
86 #define for_each_active_drhd_unit(drhd) \
87 list_for_each_entry_rcu(drhd, &dmar_drhd_units, list) \
88 if (drhd->ignored) {} else
90 #define for_each_active_iommu(i, drhd) \
91 list_for_each_entry_rcu(drhd, &dmar_drhd_units, list) \
92 if (i=drhd->iommu, drhd->ignored) {} else
94 #define for_each_iommu(i, drhd) \
95 list_for_each_entry_rcu(drhd, &dmar_drhd_units, list) \
96 if (i=drhd->iommu, 0) {} else
98 static inline bool dmar_rcu_check(void)
100 return rwsem_is_locked(&dmar_global_lock
) ||
101 system_state
== SYSTEM_BOOTING
;
104 #define dmar_rcu_dereference(p) rcu_dereference_check((p), dmar_rcu_check())
106 #define for_each_dev_scope(a, c, p, d) \
107 for ((p) = 0; ((d) = (p) < (c) ? dmar_rcu_dereference((a)[(p)].dev) : \
108 NULL, (p) < (c)); (p)++)
110 #define for_each_active_dev_scope(a, c, p, d) \
111 for_each_dev_scope((a), (c), (p), (d)) if (!(d)) { continue; } else
113 extern int dmar_table_init(void);
114 extern int dmar_dev_scope_init(void);
115 extern void dmar_register_bus_notifier(void);
116 extern int dmar_parse_dev_scope(void *start
, void *end
, int *cnt
,
117 struct dmar_dev_scope
**devices
, u16 segment
);
118 extern void *dmar_alloc_dev_scope(void *start
, void *end
, int *cnt
);
119 extern void dmar_free_dev_scope(struct dmar_dev_scope
**devices
, int *cnt
);
120 extern int dmar_insert_dev_scope(struct dmar_pci_notify_info
*info
,
121 void *start
, void*end
, u16 segment
,
122 struct dmar_dev_scope
*devices
,
124 extern int dmar_remove_dev_scope(struct dmar_pci_notify_info
*info
,
125 u16 segment
, struct dmar_dev_scope
*devices
,
127 /* Intel IOMMU detection */
128 extern int detect_intel_iommu(void);
129 extern int enable_drhd_fault_handling(void);
130 extern int dmar_device_add(acpi_handle handle
);
131 extern int dmar_device_remove(acpi_handle handle
);
133 static inline int dmar_res_noop(struct acpi_dmar_header
*hdr
, void *arg
)
138 #ifdef CONFIG_INTEL_IOMMU
139 extern int iommu_detected
, no_iommu
;
140 extern int intel_iommu_init(void);
141 extern int dmar_parse_one_rmrr(struct acpi_dmar_header
*header
, void *arg
);
142 extern int dmar_parse_one_atsr(struct acpi_dmar_header
*header
, void *arg
);
143 extern int dmar_check_one_atsr(struct acpi_dmar_header
*hdr
, void *arg
);
144 extern int dmar_release_one_atsr(struct acpi_dmar_header
*hdr
, void *arg
);
145 extern int dmar_iommu_hotplug(struct dmar_drhd_unit
*dmaru
, bool insert
);
146 extern int dmar_iommu_notify_scope_dev(struct dmar_pci_notify_info
*info
);
147 #else /* !CONFIG_INTEL_IOMMU: */
148 static inline int intel_iommu_init(void) { return -ENODEV
; }
150 #define dmar_parse_one_rmrr dmar_res_noop
151 #define dmar_parse_one_atsr dmar_res_noop
152 #define dmar_check_one_atsr dmar_res_noop
153 #define dmar_release_one_atsr dmar_res_noop
155 static inline int dmar_iommu_notify_scope_dev(struct dmar_pci_notify_info
*info
)
160 static inline int dmar_iommu_hotplug(struct dmar_drhd_unit
*dmaru
, bool insert
)
164 #endif /* CONFIG_INTEL_IOMMU */
166 #ifdef CONFIG_IRQ_REMAP
167 extern int dmar_ir_hotplug(struct dmar_drhd_unit
*dmaru
, bool insert
);
168 #else /* CONFIG_IRQ_REMAP */
169 static inline int dmar_ir_hotplug(struct dmar_drhd_unit
*dmaru
, bool insert
)
171 #endif /* CONFIG_IRQ_REMAP */
173 #else /* CONFIG_DMAR_TABLE */
175 static inline int dmar_device_add(void *handle
)
180 static inline int dmar_device_remove(void *handle
)
185 #endif /* CONFIG_DMAR_TABLE */
189 /* Shared between remapped and posted mode*/
191 __u64 present
: 1, /* 0 */
193 __res0
: 6, /* 2 - 6 */
194 avail
: 4, /* 8 - 11 */
195 __res1
: 3, /* 12 - 14 */
197 vector
: 8, /* 16 - 23 */
198 __res2
: 40; /* 24 - 63 */
203 __u64 r_present
: 1, /* 0 */
205 dst_mode
: 1, /* 2 */
206 redir_hint
: 1, /* 3 */
207 trigger_mode
: 1, /* 4 */
208 dlvry_mode
: 3, /* 5 - 7 */
209 r_avail
: 4, /* 8 - 11 */
210 r_res0
: 4, /* 12 - 15 */
211 r_vector
: 8, /* 16 - 23 */
212 r_res1
: 8, /* 24 - 31 */
213 dest_id
: 32; /* 32 - 63 */
218 __u64 p_present
: 1, /* 0 */
220 p_res0
: 6, /* 2 - 7 */
221 p_avail
: 4, /* 8 - 11 */
222 p_res1
: 2, /* 12 - 13 */
223 p_urgent
: 1, /* 14 */
225 p_vector
: 8, /* 16 - 23 */
226 p_res2
: 14, /* 24 - 37 */
227 pda_l
: 26; /* 38 - 63 */
233 /* Shared between remapped and posted mode*/
235 __u64 sid
: 16, /* 64 - 79 */
236 sq
: 2, /* 80 - 81 */
237 svt
: 2, /* 82 - 83 */
238 __res3
: 44; /* 84 - 127 */
243 __u64 p_sid
: 16, /* 64 - 79 */
244 p_sq
: 2, /* 80 - 81 */
245 p_svt
: 2, /* 82 - 83 */
246 p_res3
: 12, /* 84 - 95 */
247 pda_h
: 32; /* 96 - 127 */
253 static inline void dmar_copy_shared_irte(struct irte
*dst
, struct irte
*src
)
255 dst
->present
= src
->present
;
257 dst
->avail
= src
->avail
;
259 dst
->vector
= src
->vector
;
265 #define PDA_LOW_BIT 26
266 #define PDA_HIGH_BIT 32
268 /* Can't use the common MSI interrupt functions
269 * since DMAR is not a pci device
272 extern void dmar_msi_unmask(struct irq_data
*data
);
273 extern void dmar_msi_mask(struct irq_data
*data
);
274 extern void dmar_msi_read(int irq
, struct msi_msg
*msg
);
275 extern void dmar_msi_write(int irq
, struct msi_msg
*msg
);
276 extern int dmar_set_interrupt(struct intel_iommu
*iommu
);
277 extern irqreturn_t
dmar_fault(int irq
, void *dev_id
);
278 extern int dmar_alloc_hwirq(int id
, int node
, void *arg
);
279 extern void dmar_free_hwirq(int irq
);
281 #endif /* __DMAR_H__ */