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1 /*
2 * Platform information definitions for the
3 * universal Freescale Ethernet driver.
4 *
5 * Copyright (c) 2003 Intracom S.A.
6 * by Pantelis Antoniou <panto@intracom.gr>
7 *
8 * 2005 (c) MontaVista Software, Inc.
9 * Vitaly Bordug <vbordug@ru.mvista.com>
10 *
11 * This file is licensed under the terms of the GNU General Public License
12 * version 2. This program is licensed "as is" without any warranty of any
13 * kind, whether express or implied.
14 */
15
16 #ifndef FS_ENET_PD_H
17 #define FS_ENET_PD_H
18
19 #include <asm/types.h>
20
21 #define FS_ENET_NAME "fs_enet"
22
23 enum fs_id {
24 fsid_fec1,
25 fsid_fec2,
26 fsid_fcc1,
27 fsid_fcc2,
28 fsid_fcc3,
29 fsid_scc1,
30 fsid_scc2,
31 fsid_scc3,
32 fsid_scc4,
33 };
34
35 #define FS_MAX_INDEX 9
36
37 static inline int fs_get_fec_index(enum fs_id id)
38 {
39 if (id >= fsid_fec1 && id <= fsid_fec2)
40 return id - fsid_fec1;
41 return -1;
42 }
43
44 static inline int fs_get_fcc_index(enum fs_id id)
45 {
46 if (id >= fsid_fcc1 && id <= fsid_fcc3)
47 return id - fsid_fcc1;
48 return -1;
49 }
50
51 static inline int fs_get_scc_index(enum fs_id id)
52 {
53 if (id >= fsid_scc1 && id <= fsid_scc4)
54 return id - fsid_scc1;
55 return -1;
56 }
57
58 enum fs_mii_method {
59 fsmii_fixed,
60 fsmii_fec,
61 fsmii_bitbang,
62 };
63
64 enum fs_ioport {
65 fsiop_porta,
66 fsiop_portb,
67 fsiop_portc,
68 fsiop_portd,
69 fsiop_porte,
70 };
71
72 struct fs_mii_bus_info {
73 int method; /* mii method */
74 int id; /* the id of the mii_bus */
75 int disable_aneg; /* if the controller needs to negothiate speed & duplex */
76 int lpa; /* the default board-specific vallues will be applied otherwise */
77
78 union {
79 struct {
80 int duplex;
81 int speed;
82 } fixed;
83
84 struct {
85 /* nothing */
86 } fec;
87
88 struct {
89 /* nothing */
90 } scc;
91
92 struct {
93 int mdio_port; /* port & bit for MDIO */
94 int mdio_bit;
95 int mdc_port; /* port & bit for MDC */
96 int mdc_bit;
97 int delay; /* delay in us */
98 } bitbang;
99 } i;
100 };
101
102 struct fs_platform_info {
103
104 void(*init_ioports)(void);
105 /* device specific information */
106 int fs_no; /* controller index */
107
108 u32 cp_page; /* CPM page */
109 u32 cp_block; /* CPM sblock */
110
111 u32 clk_trx; /* some stuff for pins & mux configuration*/
112 u32 clk_route;
113 u32 clk_mask;
114
115 u32 mem_offset;
116 u32 dpram_offset;
117 u32 fcc_regs_c;
118
119 u32 device_flags;
120
121 int phy_addr; /* the phy address (-1 no phy) */
122 int phy_irq; /* the phy irq (if it exists) */
123
124 const struct fs_mii_bus_info *bus_info;
125
126 int rx_ring, tx_ring; /* number of buffers on rx */
127 __u8 macaddr[6]; /* mac address */
128 int rx_copybreak; /* limit we copy small frames */
129 int use_napi; /* use NAPI */
130 int napi_weight; /* NAPI weight */
131
132 int use_rmii; /* use RMII mode */
133 };
134
135 #endif