1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * include/linux/fsl_devices.h
5 * Definitions for any platform device related flags or structures for
6 * Freescale processor devices
8 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
10 * Copyright 2004,2012 Freescale Semiconductor, Inc
13 #ifndef _FSL_DEVICE_H_
14 #define _FSL_DEVICE_H_
16 #define FSL_UTMI_PHY_DLY 10 /*As per P1010RM, delay for UTMI
17 PHY CLK to become stable - 10ms*/
18 #define FSL_USB_PHY_CLK_TIMEOUT 10000 /* uSec */
20 #include <linux/types.h>
23 * Some conventions on how we handle peripherals on Freescale chips
25 * unique device: a platform_device entry in fsl_plat_devs[] plus
26 * associated device information in its platform_data structure.
28 * A chip is described by a set of unique devices.
30 * Each sub-arch has its own master list of unique devices and
31 * enumerates them by enum fsl_devices in a sub-arch specific header
33 * The platform data structure is broken into two parts. The
34 * first is device specific information that help identify any
35 * unique features of a peripheral. The second is any
36 * information that may be defined by the board or how the device
37 * is connected externally of the chip.
40 * - platform data structures: <driver>_platform_data
41 * - platform data device flags: FSL_<driver>_DEV_<FLAG>
42 * - platform data board flags: FSL_<driver>_BRD_<FLAG>
46 enum fsl_usb2_controller_ver
{
47 FSL_USB_VER_NONE
= -1,
55 enum fsl_usb2_operating_modes
{
62 enum fsl_usb2_phy_modes
{
66 FSL_USB2_PHY_UTMI_WIDE
,
68 FSL_USB2_PHY_UTMI_DUAL
,
72 struct platform_device
;
74 struct fsl_usb2_platform_data
{
75 /* board specific information */
76 enum fsl_usb2_controller_ver controller_ver
;
77 enum fsl_usb2_operating_modes operating_mode
;
78 enum fsl_usb2_phy_modes phy_mode
;
79 unsigned int port_enables
;
80 unsigned int workaround
;
82 int (*init
)(struct platform_device
*);
83 void (*exit
)(struct platform_device
*);
84 void __iomem
*regs
; /* ioremap'd register base */
86 unsigned power_budget
; /* hcd->power_budget */
87 unsigned big_endian_mmio
:1;
88 unsigned big_endian_desc
:1;
89 unsigned es
:1; /* need USBMODE:ES */
90 unsigned le_setup_buf
:1;
91 unsigned have_sysif_regs
:1;
92 unsigned invert_drvvbus
:1;
93 unsigned invert_pwr_fault
:1;
96 unsigned already_suspended
:1;
97 unsigned has_fsl_erratum_a007792
:1;
98 unsigned has_fsl_erratum_14
:1;
99 unsigned has_fsl_erratum_a005275
:1;
100 unsigned has_fsl_erratum_a005697
:1;
101 unsigned check_phy_clk_valid
:1;
103 /* register save area for suspend/resume */
111 u32 pm_configured_flag
;
116 /* Flags in fsl_usb2_mph_platform_data */
117 #define FSL_USB2_PORT0_ENABLED 0x00000001
118 #define FSL_USB2_PORT1_ENABLED 0x00000002
120 #define FLS_USB2_WORKAROUND_ENGCM09152 (1 << 0)
124 struct fsl_spi_platform_data
{
125 u32 initial_spmode
; /* initial SPMODE value */
128 #define SPI_QE_CPU_MODE (1 << 0) /* QE CPU ("PIO") mode */
129 #define SPI_CPM_MODE (1 << 1) /* CPM/QE ("DMA") mode */
130 #define SPI_CPM1 (1 << 2) /* SPI unit is in CPM1 block */
131 #define SPI_CPM2 (1 << 3) /* SPI unit is in CPM2 block */
132 #define SPI_QE (1 << 4) /* SPI unit is in QE block */
133 /* board specific information */
135 void (*cs_control
)(struct spi_device
*spi
, bool on
);
139 struct mpc8xx_pcmcia_ops
{
140 void(*hw_ctrl
)(int slot
, int enable
);
141 int(*voltage_set
)(int slot
, int vcc
, int vpp
);
144 /* Returns non-zero if the current suspend operation would
145 * lead to a deep sleep (i.e. power removed from the core,
146 * instead of just the clock).
148 #if defined(CONFIG_PPC_83xx) && defined(CONFIG_SUSPEND)
149 int fsl_deep_sleep(void);
151 static inline int fsl_deep_sleep(void) { return 0; }
154 #endif /* _FSL_DEVICE_H_ */