include/linux/gpio/driver.h

   1 #ifndef __LINUX_GPIO_DRIVER_H
   2 #define __LINUX_GPIO_DRIVER_H
   3
   4 #include <linux/device.h>
   5 #include <linux/types.h>
   6 #include <linux/irq.h>
   7 #include <linux/irqchip/chained_irq.h>
   8 #include <linux/irqdomain.h>
   9 #include <linux/lockdep.h>
  10 #include <linux/pinctrl/pinctrl.h>
  11 #include <linux/pinctrl/pinconf-generic.h>
  12
  13 struct gpio_desc;
  14 struct of_phandle_args;
  15 struct device_node;
  16 struct seq_file;
  17 struct gpio_device;
  18 struct module;
  19
  20 #ifdef CONFIG_GPIOLIB
  21
  22 #ifdef CONFIG_GPIOLIB_IRQCHIP
  23 /**
  24  * struct gpio_irq_chip - GPIO interrupt controller
  25  */
  26 struct gpio_irq_chip {
  27         /**
  28          * @chip:
  29          *
  30          * GPIO IRQ chip implementation, provided by GPIO driver.
  31          */
  32         struct irq_chip *chip;
  33
  34         /**
  35          * @domain:
  36          *
  37          * Interrupt translation domain; responsible for mapping between GPIO
  38          * hwirq number and Linux IRQ number.
  39          */
  40         struct irq_domain *domain;
  41
  42         /**
  43          * @domain_ops:
  44          *
  45          * Table of interrupt domain operations for this IRQ chip.
  46          */
  47         const struct irq_domain_ops *domain_ops;
  48
  49         /**
  50          * @parent_handler:
  51          *
  52          * The interrupt handler for the GPIO chip's parent interrupts, may be
  53          * NULL if the parent interrupts are nested rather than cascaded.
  54          */
  55         irq_flow_handler_t parent_handler;
  56
  57         /**
  58          * @parent_handler_data:
  59          *
  60          * Data associated, and passed to, the handler for the parent
  61          * interrupt.
  62          */
  63         void *parent_handler_data;
  64 };
  65
  66 static inline struct gpio_irq_chip *to_gpio_irq_chip(struct irq_chip *chip)
  67 {
  68         return container_of(chip, struct gpio_irq_chip, chip);
  69 }
  70 #endif
  71
  72 /**
  73  * struct gpio_chip - abstract a GPIO controller
  74  * @label: a functional name for the GPIO device, such as a part
  75  *      number or the name of the SoC IP-block implementing it.
  76  * @gpiodev: the internal state holder, opaque struct
  77  * @parent: optional parent device providing the GPIOs
  78  * @owner: helps prevent removal of modules exporting active GPIOs
  79  * @request: optional hook for chip-specific activation, such as
  80  *      enabling module power and clock; may sleep
  81  * @free: optional hook for chip-specific deactivation, such as
  82  *      disabling module power and clock; may sleep
  83  * @get_direction: returns direction for signal "offset", 0=out, 1=in,
  84  *      (same as GPIOF_DIR_XXX), or negative error
  85  * @direction_input: configures signal "offset" as input, or returns error
  86  * @direction_output: configures signal "offset" as output, or returns error
  87  * @get: returns value for signal "offset", 0=low, 1=high, or negative error
  88  * @get_multiple: reads values for multiple signals defined by "mask" and
  89  *      stores them in "bits", returns 0 on success or negative error
  90  * @set: assigns output value for signal "offset"
  91  * @set_multiple: assigns output values for multiple signals defined by "mask"
  92  * @set_config: optional hook for all kinds of settings. Uses the same
  93  *      packed config format as generic pinconf.
  94  * @to_irq: optional hook supporting non-static gpio_to_irq() mappings;
  95  *      implementation may not sleep
  96  * @dbg_show: optional routine to show contents in debugfs; default code
  97  *      will be used when this is omitted, but custom code can show extra
  98  *      state (such as pullup/pulldown configuration).
  99  * @base: identifies the first GPIO number handled by this chip;
 100  *      or, if negative during registration, requests dynamic ID allocation.
 101  *      DEPRECATION: providing anything non-negative and nailing the base
 102  *      offset of GPIO chips is deprecated. Please pass -1 as base to
 103  *      let gpiolib select the chip base in all possible cases. We want to
 104  *      get rid of the static GPIO number space in the long run.
 105  * @ngpio: the number of GPIOs handled by this controller; the last GPIO
 106  *      handled is (base + ngpio - 1).
 107  * @names: if set, must be an array of strings to use as alternative
 108  *      names for the GPIOs in this chip. Any entry in the array
 109  *      may be NULL if there is no alias for the GPIO, however the
 110  *      array must be @ngpio entries long.  A name can include a single printk
 111  *      format specifier for an unsigned int.  It is substituted by the actual
 112  *      number of the gpio.
 113  * @can_sleep: flag must be set iff get()/set() methods sleep, as they
 114  *      must while accessing GPIO expander chips over I2C or SPI. This
 115  *      implies that if the chip supports IRQs, these IRQs need to be threaded
 116  *      as the chip access may sleep when e.g. reading out the IRQ status
 117  *      registers.
 118  * @read_reg: reader function for generic GPIO
 119  * @write_reg: writer function for generic GPIO
 120  * @be_bits: if the generic GPIO has big endian bit order (bit 31 is representing
 121  *      line 0, bit 30 is line 1 ... bit 0 is line 31) this is set to true by the
 122  *      generic GPIO core. It is for internal housekeeping only.
 123  * @reg_dat: data (in) register for generic GPIO
 124  * @reg_set: output set register (out=high) for generic GPIO
 125  * @reg_clr: output clear register (out=low) for generic GPIO
 126  * @reg_dir: direction setting register for generic GPIO
 127  * @bgpio_bits: number of register bits used for a generic GPIO i.e.
 128  *      <register width> * 8
 129  * @bgpio_lock: used to lock chip->bgpio_data. Also, this is needed to keep
 130  *      shadowed and real data registers writes together.
 131  * @bgpio_data: shadowed data register for generic GPIO to clear/set bits
 132  *      safely.
 133  * @bgpio_dir: shadowed direction register for generic GPIO to clear/set
 134  *      direction safely.
 135  * @irq_handler: the irq handler to use (often a predefined irq core function)
 136  *      for GPIO IRQs, provided by GPIO driver
 137  * @irq_default_type: default IRQ triggering type applied during GPIO driver
 138  *      initialization, provided by GPIO driver
 139  * @irq_chained_parent: GPIO IRQ chip parent/bank linux irq number,
 140  *      provided by GPIO driver for chained interrupt (not for nested
 141  *      interrupts).
 142  * @irq_nested: True if set the interrupt handling is nested.
 143  * @irq_need_valid_mask: If set core allocates @irq_valid_mask with all
 144  *      bits set to one
 145  * @irq_valid_mask: If not %NULL holds bitmask of GPIOs which are valid to
 146  *      be included in IRQ domain of the chip
 147  * @lock_key: per GPIO IRQ chip lockdep class
 148  *
 149  * A gpio_chip can help platforms abstract various sources of GPIOs so
 150  * they can all be accessed through a common programing interface.
 151  * Example sources would be SOC controllers, FPGAs, multifunction
 152  * chips, dedicated GPIO expanders, and so on.
 153  *
 154  * Each chip controls a number of signals, identified in method calls
 155  * by "offset" values in the range 0..(@ngpio - 1).  When those signals
 156  * are referenced through calls like gpio_get_value(gpio), the offset
 157  * is calculated by subtracting @base from the gpio number.
 158  */
 159 struct gpio_chip {
 160         const char              *label;
 161         struct gpio_device      *gpiodev;
 162         struct device           *parent;
 163         struct module           *owner;
 164
 165         int                     (*request)(struct gpio_chip *chip,
 166                                                 unsigned offset);
 167         void                    (*free)(struct gpio_chip *chip,
 168                                                 unsigned offset);
 169         int                     (*get_direction)(struct gpio_chip *chip,
 170                                                 unsigned offset);
 171         int                     (*direction_input)(struct gpio_chip *chip,
 172                                                 unsigned offset);
 173         int                     (*direction_output)(struct gpio_chip *chip,
 174                                                 unsigned offset, int value);
 175         int                     (*get)(struct gpio_chip *chip,
 176                                                 unsigned offset);
 177         int                     (*get_multiple)(struct gpio_chip *chip,
 178                                                 unsigned long *mask,
 179                                                 unsigned long *bits);
 180         void                    (*set)(struct gpio_chip *chip,
 181                                                 unsigned offset, int value);
 182         void                    (*set_multiple)(struct gpio_chip *chip,
 183                                                 unsigned long *mask,
 184                                                 unsigned long *bits);
 185         int                     (*set_config)(struct gpio_chip *chip,
 186                                               unsigned offset,
 187                                               unsigned long config);
 188         int                     (*to_irq)(struct gpio_chip *chip,
 189                                                 unsigned offset);
 190
 191         void                    (*dbg_show)(struct seq_file *s,
 192                                                 struct gpio_chip *chip);
 193         int                     base;
 194         u16                     ngpio;
 195         const char              *const *names;
 196         bool                    can_sleep;
 197
 198 #if IS_ENABLED(CONFIG_GPIO_GENERIC)
 199         unsigned long (*read_reg)(void __iomem *reg);
 200         void (*write_reg)(void __iomem *reg, unsigned long data);
 201         bool be_bits;
 202         void __iomem *reg_dat;
 203         void __iomem *reg_set;
 204         void __iomem *reg_clr;
 205         void __iomem *reg_dir;
 206         int bgpio_bits;
 207         spinlock_t bgpio_lock;
 208         unsigned long bgpio_data;
 209         unsigned long bgpio_dir;
 210 #endif
 211
 212 #ifdef CONFIG_GPIOLIB_IRQCHIP
 213         /*
 214          * With CONFIG_GPIOLIB_IRQCHIP we get an irqchip inside the gpiolib
 215          * to handle IRQs for most practical cases.
 216          */
 217         irq_flow_handler_t      irq_handler;
 218         unsigned int            irq_default_type;
 219         unsigned int            irq_chained_parent;
 220         bool                    irq_nested;
 221         bool                    irq_need_valid_mask;
 222         unsigned long           *irq_valid_mask;
 223         struct lock_class_key   *lock_key;
 224
 225         /**
 226          * @irq:
 227          *
 228          * Integrates interrupt chip functionality with the GPIO chip. Can be
 229          * used to handle IRQs for most practical cases.
 230          */
 231         struct gpio_irq_chip irq;
 232 #endif
 233
 234 #if defined(CONFIG_OF_GPIO)
 235         /*
 236          * If CONFIG_OF is enabled, then all GPIO controllers described in the
 237          * device tree automatically may have an OF translation
 238          */
 239
 240         /**
 241          * @of_node:
 242          *
 243          * Pointer to a device tree node representing this GPIO controller.
 244          */
 245         struct device_node *of_node;
 246
 247         /**
 248          * @of_gpio_n_cells:
 249          *
 250          * Number of cells used to form the GPIO specifier.
 251          */
 252         unsigned int of_gpio_n_cells;
 253
 254         /**
 255          * @of_xlate:
 256          *
 257          * Callback to translate a device tree GPIO specifier into a chip-
 258          * relative GPIO number and flags.
 259          */
 260         int (*of_xlate)(struct gpio_chip *gc,
 261                         const struct of_phandle_args *gpiospec, u32 *flags);
 262 #endif
 263 };
 264
 265 extern const char *gpiochip_is_requested(struct gpio_chip *chip,
 266                         unsigned offset);
 267
 268 /* add/remove chips */
 269 extern int gpiochip_add_data(struct gpio_chip *chip, void *data);
 270 static inline int gpiochip_add(struct gpio_chip *chip)
 271 {
 272         return gpiochip_add_data(chip, NULL);
 273 }
 274 extern void gpiochip_remove(struct gpio_chip *chip);
 275 extern int devm_gpiochip_add_data(struct device *dev, struct gpio_chip *chip,
 276                                   void *data);
 277 extern void devm_gpiochip_remove(struct device *dev, struct gpio_chip *chip);
 278
 279 extern struct gpio_chip *gpiochip_find(void *data,
 280                               int (*match)(struct gpio_chip *chip, void *data));
 281
 282 /* lock/unlock as IRQ */
 283 int gpiochip_lock_as_irq(struct gpio_chip *chip, unsigned int offset);
 284 void gpiochip_unlock_as_irq(struct gpio_chip *chip, unsigned int offset);
 285 bool gpiochip_line_is_irq(struct gpio_chip *chip, unsigned int offset);
 286
 287 /* Line status inquiry for drivers */
 288 bool gpiochip_line_is_open_drain(struct gpio_chip *chip, unsigned int offset);
 289 bool gpiochip_line_is_open_source(struct gpio_chip *chip, unsigned int offset);
 290
 291 /* Sleep persistence inquiry for drivers */
 292 bool gpiochip_line_is_persistent(struct gpio_chip *chip, unsigned int offset);
 293
 294 /* get driver data */
 295 void *gpiochip_get_data(struct gpio_chip *chip);
 296
 297 struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc);
 298
 299 struct bgpio_pdata {
 300         const char *label;
 301         int base;
 302         int ngpio;
 303 };
 304
 305 #if IS_ENABLED(CONFIG_GPIO_GENERIC)
 306
 307 int bgpio_init(struct gpio_chip *gc, struct device *dev,
 308                unsigned long sz, void __iomem *dat, void __iomem *set,
 309                void __iomem *clr, void __iomem *dirout, void __iomem *dirin,
 310                unsigned long flags);
 311
 312 #define BGPIOF_BIG_ENDIAN               BIT(0)
 313 #define BGPIOF_UNREADABLE_REG_SET       BIT(1) /* reg_set is unreadable */
 314 #define BGPIOF_UNREADABLE_REG_DIR       BIT(2) /* reg_dir is unreadable */
 315 #define BGPIOF_BIG_ENDIAN_BYTE_ORDER    BIT(3)
 316 #define BGPIOF_READ_OUTPUT_REG_SET      BIT(4) /* reg_set stores output value */
 317 #define BGPIOF_NO_OUTPUT                BIT(5) /* only input */
 318
 319 #endif
 320
 321 #ifdef CONFIG_GPIOLIB_IRQCHIP
 322
 323 void gpiochip_set_chained_irqchip(struct gpio_chip *gpiochip,
 324                 struct irq_chip *irqchip,
 325                 unsigned int parent_irq,
 326                 irq_flow_handler_t parent_handler);
 327
 328 void gpiochip_set_nested_irqchip(struct gpio_chip *gpiochip,
 329                 struct irq_chip *irqchip,
 330                 unsigned int parent_irq);
 331
 332 int gpiochip_irqchip_add_key(struct gpio_chip *gpiochip,
 333                              struct irq_chip *irqchip,
 334                              unsigned int first_irq,
 335                              irq_flow_handler_t handler,
 336                              unsigned int type,
 337                              bool nested,
 338                              struct lock_class_key *lock_key);
 339
 340 #ifdef CONFIG_LOCKDEP
 341
 342 /*
 343  * Lockdep requires that each irqchip instance be created with a
 344  * unique key so as to avoid unnecessary warnings. This upfront
 345  * boilerplate static inlines provides such a key for each
 346  * unique instance.
 347  */
 348 static inline int gpiochip_irqchip_add(struct gpio_chip *gpiochip,
 349                                        struct irq_chip *irqchip,
 350                                        unsigned int first_irq,
 351                                        irq_flow_handler_t handler,
 352                                        unsigned int type)
 353 {
 354         static struct lock_class_key key;
 355
 356         return gpiochip_irqchip_add_key(gpiochip, irqchip, first_irq,
 357                                         handler, type, false, &key);
 358 }
 359
 360 static inline int gpiochip_irqchip_add_nested(struct gpio_chip *gpiochip,
 361                           struct irq_chip *irqchip,
 362                           unsigned int first_irq,
 363                           irq_flow_handler_t handler,
 364                           unsigned int type)
 365 {
 366
 367         static struct lock_class_key key;
 368
 369         return gpiochip_irqchip_add_key(gpiochip, irqchip, first_irq,
 370                                         handler, type, true, &key);
 371 }
 372 #else
 373 static inline int gpiochip_irqchip_add(struct gpio_chip *gpiochip,
 374                                        struct irq_chip *irqchip,
 375                                        unsigned int first_irq,
 376                                        irq_flow_handler_t handler,
 377                                        unsigned int type)
 378 {
 379         return gpiochip_irqchip_add_key(gpiochip, irqchip, first_irq,
 380                                         handler, type, false, NULL);
 381 }
 382
 383 static inline int gpiochip_irqchip_add_nested(struct gpio_chip *gpiochip,
 384                           struct irq_chip *irqchip,
 385                           unsigned int first_irq,
 386                           irq_flow_handler_t handler,
 387                           unsigned int type)
 388 {
 389         return gpiochip_irqchip_add_key(gpiochip, irqchip, first_irq,
 390                                         handler, type, true, NULL);
 391 }
 392 #endif /* CONFIG_LOCKDEP */
 393
 394 #endif /* CONFIG_GPIOLIB_IRQCHIP */
 395
 396 int gpiochip_generic_request(struct gpio_chip *chip, unsigned offset);
 397 void gpiochip_generic_free(struct gpio_chip *chip, unsigned offset);
 398 int gpiochip_generic_config(struct gpio_chip *chip, unsigned offset,
 399                             unsigned long config);
 400
 401 #ifdef CONFIG_PINCTRL
 402
 403 /**
 404  * struct gpio_pin_range - pin range controlled by a gpio chip
 405  * @node: list for maintaining set of pin ranges, used internally
 406  * @pctldev: pinctrl device which handles corresponding pins
 407  * @range: actual range of pins controlled by a gpio controller
 408  */
 409 struct gpio_pin_range {
 410         struct list_head node;
 411         struct pinctrl_dev *pctldev;
 412         struct pinctrl_gpio_range range;
 413 };
 414
 415 int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
 416                            unsigned int gpio_offset, unsigned int pin_offset,
 417                            unsigned int npins);
 418 int gpiochip_add_pingroup_range(struct gpio_chip *chip,
 419                         struct pinctrl_dev *pctldev,
 420                         unsigned int gpio_offset, const char *pin_group);
 421 void gpiochip_remove_pin_ranges(struct gpio_chip *chip);
 422
 423 #else
 424
 425 static inline int
 426 gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
 427                        unsigned int gpio_offset, unsigned int pin_offset,
 428                        unsigned int npins)
 429 {
 430         return 0;
 431 }
 432 static inline int
 433 gpiochip_add_pingroup_range(struct gpio_chip *chip,
 434                         struct pinctrl_dev *pctldev,
 435                         unsigned int gpio_offset, const char *pin_group)
 436 {
 437         return 0;
 438 }
 439
 440 static inline void
 441 gpiochip_remove_pin_ranges(struct gpio_chip *chip)
 442 {
 443 }
 444
 445 #endif /* CONFIG_PINCTRL */
 446
 447 struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *chip, u16 hwnum,
 448                                             const char *label);
 449 void gpiochip_free_own_desc(struct gpio_desc *desc);
 450
 451 #else /* CONFIG_GPIOLIB */
 452
 453 static inline struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc)
 454 {
 455         /* GPIO can never have been requested */
 456         WARN_ON(1);
 457         return ERR_PTR(-ENODEV);
 458 }
 459
 460 #endif /* CONFIG_GPIOLIB */
 461
 462 #endif