include/linux/gpio/driver.h

   1 #ifndef __LINUX_GPIO_DRIVER_H
   2 #define __LINUX_GPIO_DRIVER_H
   3
   4 #include <linux/types.h>
   5 #include <linux/module.h>
   6 #include <linux/irq.h>
   7 #include <linux/irqchip/chained_irq.h>
   8 #include <linux/irqdomain.h>
   9 #include <linux/pinctrl/pinctrl.h>
  10
  11 struct device;
  12 struct gpio_desc;
  13 struct of_phandle_args;
  14 struct device_node;
  15 struct seq_file;
  16
  17 #ifdef CONFIG_GPIOLIB
  18
  19 /**
  20  * struct gpio_chip - abstract a GPIO controller
  21  * @label: for diagnostics
  22  * @dev: optional device providing the GPIOs
  23  * @cdev: class device used by sysfs interface (may be NULL)
  24  * @owner: helps prevent removal of modules exporting active GPIOs
  25  * @list: links gpio_chips together for traversal
  26  * @request: optional hook for chip-specific activation, such as
  27  *      enabling module power and clock; may sleep
  28  * @free: optional hook for chip-specific deactivation, such as
  29  *      disabling module power and clock; may sleep
  30  * @get_direction: returns direction for signal "offset", 0=out, 1=in,
  31  *      (same as GPIOF_DIR_XXX), or negative error
  32  * @direction_input: configures signal "offset" as input, or returns error
  33  * @direction_output: configures signal "offset" as output, or returns error
  34  * @get: returns value for signal "offset"; for output signals this
  35  *      returns either the value actually sensed, or zero
  36  * @set: assigns output value for signal "offset"
  37  * @set_multiple: assigns output values for multiple signals defined by "mask"
  38  * @set_debounce: optional hook for setting debounce time for specified gpio in
  39  *      interrupt triggered gpio chips
  40  * @to_irq: optional hook supporting non-static gpio_to_irq() mappings;
  41  *      implementation may not sleep
  42  * @dbg_show: optional routine to show contents in debugfs; default code
  43  *      will be used when this is omitted, but custom code can show extra
  44  *      state (such as pullup/pulldown configuration).
  45  * @base: identifies the first GPIO number handled by this chip;
  46  *      or, if negative during registration, requests dynamic ID allocation.
  47  *      DEPRECATION: providing anything non-negative and nailing the base
  48  *      base offset of GPIO chips is deprecated. Please pass -1 as base to
  49  *      let gpiolib select the chip base in all possible cases. We want to
  50  *      get rid of the static GPIO number space in the long run.
  51  * @ngpio: the number of GPIOs handled by this controller; the last GPIO
  52  *      handled is (base + ngpio - 1).
  53  * @desc: array of ngpio descriptors. Private.
  54  * @names: if set, must be an array of strings to use as alternative
  55  *      names for the GPIOs in this chip. Any entry in the array
  56  *      may be NULL if there is no alias for the GPIO, however the
  57  *      array must be @ngpio entries long.  A name can include a single printk
  58  *      format specifier for an unsigned int.  It is substituted by the actual
  59  *      number of the gpio.
  60  * @can_sleep: flag must be set iff get()/set() methods sleep, as they
  61  *      must while accessing GPIO expander chips over I2C or SPI. This
  62  *      implies that if the chip supports IRQs, these IRQs need to be threaded
  63  *      as the chip access may sleep when e.g. reading out the IRQ status
  64  *      registers.
  65  * @irq_not_threaded: flag must be set if @can_sleep is set but the
  66  *      IRQs don't need to be threaded
  67  *
  68  * A gpio_chip can help platforms abstract various sources of GPIOs so
  69  * they can all be accessed through a common programing interface.
  70  * Example sources would be SOC controllers, FPGAs, multifunction
  71  * chips, dedicated GPIO expanders, and so on.
  72  *
  73  * Each chip controls a number of signals, identified in method calls
  74  * by "offset" values in the range 0..(@ngpio - 1).  When those signals
  75  * are referenced through calls like gpio_get_value(gpio), the offset
  76  * is calculated by subtracting @base from the gpio number.
  77  */
  78 struct gpio_chip {
  79         const char              *label;
  80         struct device           *dev;
  81         struct device           *cdev;
  82         struct module           *owner;
  83         struct list_head        list;
  84
  85         int                     (*request)(struct gpio_chip *chip,
  86                                                 unsigned offset);
  87         void                    (*free)(struct gpio_chip *chip,
  88                                                 unsigned offset);
  89         int                     (*get_direction)(struct gpio_chip *chip,
  90                                                 unsigned offset);
  91         int                     (*direction_input)(struct gpio_chip *chip,
  92                                                 unsigned offset);
  93         int                     (*direction_output)(struct gpio_chip *chip,
  94                                                 unsigned offset, int value);
  95         int                     (*get)(struct gpio_chip *chip,
  96                                                 unsigned offset);
  97         void                    (*set)(struct gpio_chip *chip,
  98                                                 unsigned offset, int value);
  99         void                    (*set_multiple)(struct gpio_chip *chip,
 100                                                 unsigned long *mask,
 101                                                 unsigned long *bits);
 102         int                     (*set_debounce)(struct gpio_chip *chip,
 103                                                 unsigned offset,
 104                                                 unsigned debounce);
 105
 106         int                     (*to_irq)(struct gpio_chip *chip,
 107                                                 unsigned offset);
 108
 109         void                    (*dbg_show)(struct seq_file *s,
 110                                                 struct gpio_chip *chip);
 111         int                     base;
 112         u16                     ngpio;
 113         struct gpio_desc        *desc;
 114         const char              *const *names;
 115         bool                    can_sleep;
 116         bool                    irq_not_threaded;
 117
 118 #ifdef CONFIG_GPIOLIB_IRQCHIP
 119         /*
 120          * With CONFIG_GPIOLIB_IRQCHIP we get an irqchip inside the gpiolib
 121          * to handle IRQs for most practical cases.
 122          */
 123         struct irq_chip         *irqchip;
 124         struct irq_domain       *irqdomain;
 125         unsigned int            irq_base;
 126         irq_flow_handler_t      irq_handler;
 127         unsigned int            irq_default_type;
 128         int                     irq_parent;
 129 #endif
 130
 131 #if defined(CONFIG_OF_GPIO)
 132         /*
 133          * If CONFIG_OF is enabled, then all GPIO controllers described in the
 134          * device tree automatically may have an OF translation
 135          */
 136         struct device_node *of_node;
 137         int of_gpio_n_cells;
 138         int (*of_xlate)(struct gpio_chip *gc,
 139                         const struct of_phandle_args *gpiospec, u32 *flags);
 140 #endif
 141 #ifdef CONFIG_PINCTRL
 142         /*
 143          * If CONFIG_PINCTRL is enabled, then gpio controllers can optionally
 144          * describe the actual pin range which they serve in an SoC. This
 145          * information would be used by pinctrl subsystem to configure
 146          * corresponding pins for gpio usage.
 147          */
 148         struct list_head pin_ranges;
 149 #endif
 150 };
 151
 152 extern const char *gpiochip_is_requested(struct gpio_chip *chip,
 153                         unsigned offset);
 154
 155 /* add/remove chips */
 156 extern int gpiochip_add(struct gpio_chip *chip);
 157 extern void gpiochip_remove(struct gpio_chip *chip);
 158 extern struct gpio_chip *gpiochip_find(void *data,
 159                               int (*match)(struct gpio_chip *chip, void *data));
 160
 161 /* lock/unlock as IRQ */
 162 int gpiochip_lock_as_irq(struct gpio_chip *chip, unsigned int offset);
 163 void gpiochip_unlock_as_irq(struct gpio_chip *chip, unsigned int offset);
 164
 165 struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc);
 166
 167 #ifdef CONFIG_GPIOLIB_IRQCHIP
 168
 169 void gpiochip_set_chained_irqchip(struct gpio_chip *gpiochip,
 170                 struct irq_chip *irqchip,
 171                 int parent_irq,
 172                 irq_flow_handler_t parent_handler);
 173
 174 int gpiochip_irqchip_add(struct gpio_chip *gpiochip,
 175                 struct irq_chip *irqchip,
 176                 unsigned int first_irq,
 177                 irq_flow_handler_t handler,
 178                 unsigned int type);
 179
 180 #endif /* CONFIG_GPIOLIB_IRQCHIP */
 181
 182 #ifdef CONFIG_PINCTRL
 183
 184 /**
 185  * struct gpio_pin_range - pin range controlled by a gpio chip
 186  * @head: list for maintaining set of pin ranges, used internally
 187  * @pctldev: pinctrl device which handles corresponding pins
 188  * @range: actual range of pins controlled by a gpio controller
 189  */
 190
 191 struct gpio_pin_range {
 192         struct list_head node;
 193         struct pinctrl_dev *pctldev;
 194         struct pinctrl_gpio_range range;
 195 };
 196
 197 int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
 198                            unsigned int gpio_offset, unsigned int pin_offset,
 199                            unsigned int npins);
 200 int gpiochip_add_pingroup_range(struct gpio_chip *chip,
 201                         struct pinctrl_dev *pctldev,
 202                         unsigned int gpio_offset, const char *pin_group);
 203 void gpiochip_remove_pin_ranges(struct gpio_chip *chip);
 204
 205 #else
 206
 207 static inline int
 208 gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
 209                        unsigned int gpio_offset, unsigned int pin_offset,
 210                        unsigned int npins)
 211 {
 212         return 0;
 213 }
 214 static inline int
 215 gpiochip_add_pingroup_range(struct gpio_chip *chip,
 216                         struct pinctrl_dev *pctldev,
 217                         unsigned int gpio_offset, const char *pin_group)
 218 {
 219         return 0;
 220 }
 221
 222 static inline void
 223 gpiochip_remove_pin_ranges(struct gpio_chip *chip)
 224 {
 225 }
 226
 227 #endif /* CONFIG_PINCTRL */
 228
 229 struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *chip, u16 hwnum,
 230                                             const char *label);
 231 void gpiochip_free_own_desc(struct gpio_desc *desc);
 232
 233 #else /* CONFIG_GPIOLIB */
 234
 235 static inline struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc)
 236 {
 237         /* GPIO can never have been requested */
 238         WARN_ON(1);
 239         return ERR_PTR(-ENODEV);
 240 }
 241
 242 #endif /* CONFIG_GPIOLIB */
 243
 244 #endif