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ide: add ->cable_detect method to ide_hwif_t
[mirror_ubuntu-bionic-kernel.git] / include / linux / ide.h
1 #ifndef _IDE_H
2 #define _IDE_H
3 /*
4 * linux/include/linux/ide.h
5 *
6 * Copyright (C) 1994-2002 Linus Torvalds & authors
7 */
8
9 #include <linux/init.h>
10 #include <linux/ioport.h>
11 #include <linux/hdreg.h>
12 #include <linux/blkdev.h>
13 #include <linux/proc_fs.h>
14 #include <linux/interrupt.h>
15 #include <linux/bitops.h>
16 #include <linux/bio.h>
17 #include <linux/device.h>
18 #include <linux/pci.h>
19 #include <linux/completion.h>
20 #ifdef CONFIG_BLK_DEV_IDEACPI
21 #include <acpi/acpi.h>
22 #endif
23 #include <asm/byteorder.h>
24 #include <asm/system.h>
25 #include <asm/io.h>
26 #include <asm/semaphore.h>
27 #include <asm/mutex.h>
28
29 #if defined(CRIS) || defined(FRV)
30 # define SUPPORT_VLB_SYNC 0
31 #else
32 # define SUPPORT_VLB_SYNC 1
33 #endif
34
35 /*
36 * Used to indicate "no IRQ", should be a value that cannot be an IRQ
37 * number.
38 */
39
40 #define IDE_NO_IRQ (-1)
41
42 typedef unsigned char byte; /* used everywhere */
43
44 /*
45 * Probably not wise to fiddle with these
46 */
47 #define ERROR_MAX 8 /* Max read/write errors per sector */
48 #define ERROR_RESET 3 /* Reset controller every 4th retry */
49 #define ERROR_RECAL 1 /* Recalibrate every 2nd retry */
50
51 /*
52 * Tune flags
53 */
54 #define IDE_TUNE_NOAUTO 2
55 #define IDE_TUNE_AUTO 1
56 #define IDE_TUNE_DEFAULT 0
57
58 /*
59 * state flags
60 */
61
62 #define DMA_PIO_RETRY 1 /* retrying in PIO */
63
64 #define HWIF(drive) ((ide_hwif_t *)((drive)->hwif))
65 #define HWGROUP(drive) ((ide_hwgroup_t *)(HWIF(drive)->hwgroup))
66
67 /*
68 * Definitions for accessing IDE controller registers
69 */
70 #define IDE_NR_PORTS (10)
71
72 #define IDE_DATA_OFFSET (0)
73 #define IDE_ERROR_OFFSET (1)
74 #define IDE_NSECTOR_OFFSET (2)
75 #define IDE_SECTOR_OFFSET (3)
76 #define IDE_LCYL_OFFSET (4)
77 #define IDE_HCYL_OFFSET (5)
78 #define IDE_SELECT_OFFSET (6)
79 #define IDE_STATUS_OFFSET (7)
80 #define IDE_CONTROL_OFFSET (8)
81 #define IDE_IRQ_OFFSET (9)
82
83 #define IDE_FEATURE_OFFSET IDE_ERROR_OFFSET
84 #define IDE_COMMAND_OFFSET IDE_STATUS_OFFSET
85
86 #define IDE_DATA_REG (HWIF(drive)->io_ports[IDE_DATA_OFFSET])
87 #define IDE_ERROR_REG (HWIF(drive)->io_ports[IDE_ERROR_OFFSET])
88 #define IDE_NSECTOR_REG (HWIF(drive)->io_ports[IDE_NSECTOR_OFFSET])
89 #define IDE_SECTOR_REG (HWIF(drive)->io_ports[IDE_SECTOR_OFFSET])
90 #define IDE_LCYL_REG (HWIF(drive)->io_ports[IDE_LCYL_OFFSET])
91 #define IDE_HCYL_REG (HWIF(drive)->io_ports[IDE_HCYL_OFFSET])
92 #define IDE_SELECT_REG (HWIF(drive)->io_ports[IDE_SELECT_OFFSET])
93 #define IDE_STATUS_REG (HWIF(drive)->io_ports[IDE_STATUS_OFFSET])
94 #define IDE_CONTROL_REG (HWIF(drive)->io_ports[IDE_CONTROL_OFFSET])
95 #define IDE_IRQ_REG (HWIF(drive)->io_ports[IDE_IRQ_OFFSET])
96
97 #define IDE_FEATURE_REG IDE_ERROR_REG
98 #define IDE_COMMAND_REG IDE_STATUS_REG
99 #define IDE_ALTSTATUS_REG IDE_CONTROL_REG
100 #define IDE_IREASON_REG IDE_NSECTOR_REG
101 #define IDE_BCOUNTL_REG IDE_LCYL_REG
102 #define IDE_BCOUNTH_REG IDE_HCYL_REG
103
104 #define OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good))
105 #define BAD_R_STAT (BUSY_STAT | ERR_STAT)
106 #define BAD_W_STAT (BAD_R_STAT | WRERR_STAT)
107 #define BAD_STAT (BAD_R_STAT | DRQ_STAT)
108 #define DRIVE_READY (READY_STAT | SEEK_STAT)
109
110 #define BAD_CRC (ABRT_ERR | ICRC_ERR)
111
112 #define SATA_NR_PORTS (3) /* 16 possible ?? */
113
114 #define SATA_STATUS_OFFSET (0)
115 #define SATA_STATUS_REG (HWIF(drive)->sata_scr[SATA_STATUS_OFFSET])
116 #define SATA_ERROR_OFFSET (1)
117 #define SATA_ERROR_REG (HWIF(drive)->sata_scr[SATA_ERROR_OFFSET])
118 #define SATA_CONTROL_OFFSET (2)
119 #define SATA_CONTROL_REG (HWIF(drive)->sata_scr[SATA_CONTROL_OFFSET])
120
121 #define SATA_MISC_OFFSET (0)
122 #define SATA_MISC_REG (HWIF(drive)->sata_misc[SATA_MISC_OFFSET])
123 #define SATA_PHY_OFFSET (1)
124 #define SATA_PHY_REG (HWIF(drive)->sata_misc[SATA_PHY_OFFSET])
125 #define SATA_IEN_OFFSET (2)
126 #define SATA_IEN_REG (HWIF(drive)->sata_misc[SATA_IEN_OFFSET])
127
128 /*
129 * Our Physical Region Descriptor (PRD) table should be large enough
130 * to handle the biggest I/O request we are likely to see. Since requests
131 * can have no more than 256 sectors, and since the typical blocksize is
132 * two or more sectors, we could get by with a limit of 128 entries here for
133 * the usual worst case. Most requests seem to include some contiguous blocks,
134 * further reducing the number of table entries required.
135 *
136 * The driver reverts to PIO mode for individual requests that exceed
137 * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling
138 * 100% of all crazy scenarios here is not necessary.
139 *
140 * As it turns out though, we must allocate a full 4KB page for this,
141 * so the two PRD tables (ide0 & ide1) will each get half of that,
142 * allowing each to have about 256 entries (8 bytes each) from this.
143 */
144 #define PRD_BYTES 8
145 #define PRD_ENTRIES 256
146
147 /*
148 * Some more useful definitions
149 */
150 #define PARTN_BITS 6 /* number of minor dev bits for partitions */
151 #define MAX_DRIVES 2 /* per interface; 2 assumed by lots of code */
152 #define SECTOR_SIZE 512
153 #define SECTOR_WORDS (SECTOR_SIZE / 4) /* number of 32bit words per sector */
154 #define IDE_LARGE_SEEK(b1,b2,t) (((b1) > (b2) + (t)) || ((b2) > (b1) + (t)))
155
156 /*
157 * Timeouts for various operations:
158 */
159 #define WAIT_DRQ (HZ/10) /* 100msec - spec allows up to 20ms */
160 #define WAIT_READY (5*HZ) /* 5sec - some laptops are very slow */
161 #define WAIT_PIDENTIFY (10*HZ) /* 10sec - should be less than 3ms (?), if all ATAPI CD is closed at boot */
162 #define WAIT_WORSTCASE (30*HZ) /* 30sec - worst case when spinning up */
163 #define WAIT_CMD (10*HZ) /* 10sec - maximum wait for an IRQ to happen */
164 #define WAIT_MIN_SLEEP (2*HZ/100) /* 20msec - minimum sleep time */
165
166 /*
167 * Check for an interrupt and acknowledge the interrupt status
168 */
169 struct hwif_s;
170 typedef int (ide_ack_intr_t)(struct hwif_s *);
171
172 /*
173 * hwif_chipset_t is used to keep track of the specific hardware
174 * chipset used by each IDE interface, if known.
175 */
176 enum { ide_unknown, ide_generic, ide_pci,
177 ide_cmd640, ide_dtc2278, ide_ali14xx,
178 ide_qd65xx, ide_umc8672, ide_ht6560b,
179 ide_rz1000, ide_trm290,
180 ide_cmd646, ide_cy82c693, ide_4drives,
181 ide_pmac, ide_etrax100, ide_acorn,
182 ide_au1xxx, ide_forced
183 };
184
185 typedef u8 hwif_chipset_t;
186
187 /*
188 * Structure to hold all information about the location of this port
189 */
190 typedef struct hw_regs_s {
191 unsigned long io_ports[IDE_NR_PORTS]; /* task file registers */
192 int irq; /* our irq number */
193 ide_ack_intr_t *ack_intr; /* acknowledge interrupt */
194 hwif_chipset_t chipset;
195 struct device *dev;
196 } hw_regs_t;
197
198 struct hwif_s * ide_find_port(unsigned long);
199 void ide_init_port_data(struct hwif_s *, unsigned int);
200 void ide_init_port_hw(struct hwif_s *, hw_regs_t *);
201
202 struct ide_drive_s;
203 int ide_register_hw(hw_regs_t *, void (*)(struct ide_drive_s *),
204 struct hwif_s **);
205
206 void ide_setup_ports( hw_regs_t *hw,
207 unsigned long base,
208 int *offsets,
209 unsigned long ctrl,
210 unsigned long intr,
211 ide_ack_intr_t *ack_intr,
212 #if 0
213 ide_io_ops_t *iops,
214 #endif
215 int irq);
216
217 static inline void ide_std_init_ports(hw_regs_t *hw,
218 unsigned long io_addr,
219 unsigned long ctl_addr)
220 {
221 unsigned int i;
222
223 for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++)
224 hw->io_ports[i] = io_addr++;
225
226 hw->io_ports[IDE_CONTROL_OFFSET] = ctl_addr;
227 }
228
229 #include <asm/ide.h>
230
231 #if !defined(MAX_HWIFS) || defined(CONFIG_EMBEDDED)
232 #undef MAX_HWIFS
233 #define MAX_HWIFS CONFIG_IDE_MAX_HWIFS
234 #endif
235
236 /* needed on alpha, x86/x86_64, ia64, mips, ppc32 and sh */
237 #ifndef IDE_ARCH_OBSOLETE_DEFAULTS
238 # define ide_default_io_base(index) (0)
239 # define ide_default_irq(base) (0)
240 # define ide_init_default_irq(base) (0)
241 #endif
242
243 #ifdef CONFIG_IDE_ARCH_OBSOLETE_INIT
244 static inline void ide_init_hwif_ports(hw_regs_t *hw,
245 unsigned long io_addr,
246 unsigned long ctl_addr,
247 int *irq)
248 {
249 if (!ctl_addr)
250 ide_std_init_ports(hw, io_addr, ide_default_io_ctl(io_addr));
251 else
252 ide_std_init_ports(hw, io_addr, ctl_addr);
253
254 if (irq)
255 *irq = 0;
256
257 hw->io_ports[IDE_IRQ_OFFSET] = 0;
258
259 #ifdef CONFIG_PPC32
260 if (ppc_ide_md.ide_init_hwif)
261 ppc_ide_md.ide_init_hwif(hw, io_addr, ctl_addr, irq);
262 #endif
263 }
264 #else
265 static inline void ide_init_hwif_ports(hw_regs_t *hw,
266 unsigned long io_addr,
267 unsigned long ctl_addr,
268 int *irq)
269 {
270 if (io_addr || ctl_addr)
271 printk(KERN_WARNING "%s: must not be called\n", __FUNCTION__);
272 }
273 #endif /* CONFIG_IDE_ARCH_OBSOLETE_INIT */
274
275 /* Currently only m68k, apus and m8xx need it */
276 #ifndef IDE_ARCH_ACK_INTR
277 # define ide_ack_intr(hwif) (1)
278 #endif
279
280 /* Currently only Atari needs it */
281 #ifndef IDE_ARCH_LOCK
282 # define ide_release_lock() do {} while (0)
283 # define ide_get_lock(hdlr, data) do {} while (0)
284 #endif /* IDE_ARCH_LOCK */
285
286 /*
287 * Now for the data we need to maintain per-drive: ide_drive_t
288 */
289
290 #define ide_scsi 0x21
291 #define ide_disk 0x20
292 #define ide_optical 0x7
293 #define ide_cdrom 0x5
294 #define ide_tape 0x1
295 #define ide_floppy 0x0
296
297 /*
298 * Special Driver Flags
299 *
300 * set_geometry : respecify drive geometry
301 * recalibrate : seek to cyl 0
302 * set_multmode : set multmode count
303 * set_tune : tune interface for drive
304 * serviced : service command
305 * reserved : unused
306 */
307 typedef union {
308 unsigned all : 8;
309 struct {
310 unsigned set_geometry : 1;
311 unsigned recalibrate : 1;
312 unsigned set_multmode : 1;
313 unsigned set_tune : 1;
314 unsigned serviced : 1;
315 unsigned reserved : 3;
316 } b;
317 } special_t;
318
319 /*
320 * ATA-IDE Select Register, aka Device-Head
321 *
322 * head : always zeros here
323 * unit : drive select number: 0/1
324 * bit5 : always 1
325 * lba : using LBA instead of CHS
326 * bit7 : always 1
327 */
328 typedef union {
329 unsigned all : 8;
330 struct {
331 #if defined(__LITTLE_ENDIAN_BITFIELD)
332 unsigned head : 4;
333 unsigned unit : 1;
334 unsigned bit5 : 1;
335 unsigned lba : 1;
336 unsigned bit7 : 1;
337 #elif defined(__BIG_ENDIAN_BITFIELD)
338 unsigned bit7 : 1;
339 unsigned lba : 1;
340 unsigned bit5 : 1;
341 unsigned unit : 1;
342 unsigned head : 4;
343 #else
344 #error "Please fix <asm/byteorder.h>"
345 #endif
346 } b;
347 } select_t, ata_select_t;
348
349 /*
350 * Status returned from various ide_ functions
351 */
352 typedef enum {
353 ide_stopped, /* no drive operation was started */
354 ide_started, /* a drive operation was started, handler was set */
355 } ide_startstop_t;
356
357 struct ide_driver_s;
358 struct ide_settings_s;
359
360 #ifdef CONFIG_BLK_DEV_IDEACPI
361 struct ide_acpi_drive_link;
362 struct ide_acpi_hwif_link;
363 #endif
364
365 typedef struct ide_drive_s {
366 char name[4]; /* drive name, such as "hda" */
367 char driver_req[10]; /* requests specific driver */
368
369 struct request_queue *queue; /* request queue */
370
371 struct request *rq; /* current request */
372 struct ide_drive_s *next; /* circular list of hwgroup drives */
373 void *driver_data; /* extra driver data */
374 struct hd_driveid *id; /* drive model identification info */
375 #ifdef CONFIG_IDE_PROC_FS
376 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
377 struct ide_settings_s *settings;/* /proc/ide/ drive settings */
378 #endif
379 struct hwif_s *hwif; /* actually (ide_hwif_t *) */
380
381 unsigned long sleep; /* sleep until this time */
382 unsigned long service_start; /* time we started last request */
383 unsigned long service_time; /* service time of last request */
384 unsigned long timeout; /* max time to wait for irq */
385
386 special_t special; /* special action flags */
387 select_t select; /* basic drive/head select reg value */
388
389 u8 keep_settings; /* restore settings after drive reset */
390 u8 using_dma; /* disk is using dma for read/write */
391 u8 retry_pio; /* retrying dma capable host in pio */
392 u8 state; /* retry state */
393 u8 waiting_for_dma; /* dma currently in progress */
394 u8 unmask; /* okay to unmask other irqs */
395 u8 noflush; /* don't attempt flushes */
396 u8 dsc_overlap; /* DSC overlap */
397 u8 nice1; /* give potential excess bandwidth */
398
399 unsigned present : 1; /* drive is physically present */
400 unsigned dead : 1; /* device ejected hint */
401 unsigned id_read : 1; /* 1=id read from disk 0 = synthetic */
402 unsigned noprobe : 1; /* from: hdx=noprobe */
403 unsigned removable : 1; /* 1 if need to do check_media_change */
404 unsigned attach : 1; /* needed for removable devices */
405 unsigned forced_geom : 1; /* 1 if hdx=c,h,s was given at boot */
406 unsigned no_unmask : 1; /* disallow setting unmask bit */
407 unsigned no_io_32bit : 1; /* disallow enabling 32bit I/O */
408 unsigned atapi_overlap : 1; /* ATAPI overlap (not supported) */
409 unsigned nice0 : 1; /* give obvious excess bandwidth */
410 unsigned nice2 : 1; /* give a share in our own bandwidth */
411 unsigned doorlocking : 1; /* for removable only: door lock/unlock works */
412 unsigned nodma : 1; /* disallow DMA */
413 unsigned autotune : 2; /* 0=default, 1=autotune, 2=noautotune */
414 unsigned remap_0_to_1 : 1; /* 0=noremap, 1=remap 0->1 (for EZDrive) */
415 unsigned blocked : 1; /* 1=powermanagment told us not to do anything, so sleep nicely */
416 unsigned vdma : 1; /* 1=doing PIO over DMA 0=doing normal DMA */
417 unsigned scsi : 1; /* 0=default, 1=ide-scsi emulation */
418 unsigned sleeping : 1; /* 1=sleeping & sleep field valid */
419 unsigned post_reset : 1;
420 unsigned udma33_warned : 1;
421
422 u8 addressing; /* 0=28-bit, 1=48-bit, 2=48-bit doing 28-bit */
423 u8 quirk_list; /* considered quirky, set for a specific host */
424 u8 init_speed; /* transfer rate set at boot */
425 u8 current_speed; /* current transfer rate set */
426 u8 desired_speed; /* desired transfer rate set */
427 u8 dn; /* now wide spread use */
428 u8 wcache; /* status of write cache */
429 u8 acoustic; /* acoustic management */
430 u8 media; /* disk, cdrom, tape, floppy, ... */
431 u8 ctl; /* "normal" value for IDE_CONTROL_REG */
432 u8 ready_stat; /* min status value for drive ready */
433 u8 mult_count; /* current multiple sector setting */
434 u8 mult_req; /* requested multiple sector setting */
435 u8 tune_req; /* requested drive tuning setting */
436 u8 io_32bit; /* 0=16-bit, 1=32-bit, 2/3=32bit+sync */
437 u8 bad_wstat; /* used for ignoring WRERR_STAT */
438 u8 nowerr; /* used for ignoring WRERR_STAT */
439 u8 sect0; /* offset of first sector for DM6:DDO */
440 u8 head; /* "real" number of heads */
441 u8 sect; /* "real" sectors per track */
442 u8 bios_head; /* BIOS/fdisk/LILO number of heads */
443 u8 bios_sect; /* BIOS/fdisk/LILO sectors per track */
444
445 unsigned int bios_cyl; /* BIOS/fdisk/LILO number of cyls */
446 unsigned int cyl; /* "real" number of cyls */
447 unsigned int drive_data; /* used by set_pio_mode/selectproc */
448 unsigned int failures; /* current failure count */
449 unsigned int max_failures; /* maximum allowed failure count */
450 u64 probed_capacity;/* initial reported media capacity (ide-cd only currently) */
451
452 u64 capacity64; /* total number of sectors */
453
454 int lun; /* logical unit */
455 int crc_count; /* crc counter to reduce drive speed */
456 #ifdef CONFIG_BLK_DEV_IDEACPI
457 struct ide_acpi_drive_link *acpidata;
458 #endif
459 struct list_head list;
460 struct device gendev;
461 struct completion gendev_rel_comp; /* to deal with device release() */
462 } ide_drive_t;
463
464 #define to_ide_device(dev)container_of(dev, ide_drive_t, gendev)
465
466 #define IDE_CHIPSET_PCI_MASK \
467 ((1<<ide_pci)|(1<<ide_cmd646)|(1<<ide_ali14xx))
468 #define IDE_CHIPSET_IS_PCI(c) ((IDE_CHIPSET_PCI_MASK >> (c)) & 1)
469
470 struct ide_port_info;
471
472 typedef struct hwif_s {
473 struct hwif_s *next; /* for linked-list in ide_hwgroup_t */
474 struct hwif_s *mate; /* other hwif from same PCI chip */
475 struct hwgroup_s *hwgroup; /* actually (ide_hwgroup_t *) */
476 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
477
478 char name[6]; /* name of interface, eg. "ide0" */
479
480 /* task file registers for pata and sata */
481 unsigned long io_ports[IDE_NR_PORTS];
482 unsigned long sata_scr[SATA_NR_PORTS];
483 unsigned long sata_misc[SATA_NR_PORTS];
484
485 ide_drive_t drives[MAX_DRIVES]; /* drive info */
486
487 u8 major; /* our major number */
488 u8 index; /* 0 for ide0; 1 for ide1; ... */
489 u8 channel; /* for dual-port chips: 0=primary, 1=secondary */
490 u8 straight8; /* Alan's straight 8 check */
491 u8 bus_state; /* power state of the IDE bus */
492
493 u32 host_flags;
494
495 u8 pio_mask;
496
497 u8 ultra_mask;
498 u8 mwdma_mask;
499 u8 swdma_mask;
500
501 u8 cbl; /* cable type */
502
503 hwif_chipset_t chipset; /* sub-module for tuning.. */
504
505 struct device *dev;
506
507 const struct ide_port_info *cds; /* chipset device struct */
508
509 ide_ack_intr_t *ack_intr;
510
511 void (*rw_disk)(ide_drive_t *, struct request *);
512
513 #if 0
514 ide_hwif_ops_t *hwifops;
515 #else
516 /* routine to program host for PIO mode */
517 void (*set_pio_mode)(ide_drive_t *, const u8);
518 /* routine to program host for DMA mode */
519 void (*set_dma_mode)(ide_drive_t *, const u8);
520 /* tweaks hardware to select drive */
521 void (*selectproc)(ide_drive_t *);
522 /* chipset polling based on hba specifics */
523 int (*reset_poll)(ide_drive_t *);
524 /* chipset specific changes to default for device-hba resets */
525 void (*pre_reset)(ide_drive_t *);
526 /* routine to reset controller after a disk reset */
527 void (*resetproc)(ide_drive_t *);
528 /* special host masking for drive selection */
529 void (*maskproc)(ide_drive_t *, int);
530 /* check host's drive quirk list */
531 void (*quirkproc)(ide_drive_t *);
532 /* driver soft-power interface */
533 int (*busproc)(ide_drive_t *, int);
534 #endif
535 u8 (*mdma_filter)(ide_drive_t *);
536 u8 (*udma_filter)(ide_drive_t *);
537
538 u8 (*cable_detect)(struct hwif_s *);
539
540 void (*ata_input_data)(ide_drive_t *, void *, u32);
541 void (*ata_output_data)(ide_drive_t *, void *, u32);
542
543 void (*atapi_input_bytes)(ide_drive_t *, void *, u32);
544 void (*atapi_output_bytes)(ide_drive_t *, void *, u32);
545
546 void (*dma_host_set)(ide_drive_t *, int);
547 int (*dma_setup)(ide_drive_t *);
548 void (*dma_exec_cmd)(ide_drive_t *, u8);
549 void (*dma_start)(ide_drive_t *);
550 int (*ide_dma_end)(ide_drive_t *drive);
551 int (*ide_dma_test_irq)(ide_drive_t *drive);
552 void (*ide_dma_clear_irq)(ide_drive_t *drive);
553 void (*dma_lost_irq)(ide_drive_t *drive);
554 void (*dma_timeout)(ide_drive_t *drive);
555
556 void (*OUTB)(u8 addr, unsigned long port);
557 void (*OUTBSYNC)(ide_drive_t *drive, u8 addr, unsigned long port);
558 void (*OUTW)(u16 addr, unsigned long port);
559 void (*OUTSW)(unsigned long port, void *addr, u32 count);
560 void (*OUTSL)(unsigned long port, void *addr, u32 count);
561
562 u8 (*INB)(unsigned long port);
563 u16 (*INW)(unsigned long port);
564 void (*INSW)(unsigned long port, void *addr, u32 count);
565 void (*INSL)(unsigned long port, void *addr, u32 count);
566
567 /* dma physical region descriptor table (cpu view) */
568 unsigned int *dmatable_cpu;
569 /* dma physical region descriptor table (dma view) */
570 dma_addr_t dmatable_dma;
571 /* Scatter-gather list used to build the above */
572 struct scatterlist *sg_table;
573 int sg_max_nents; /* Maximum number of entries in it */
574 int sg_nents; /* Current number of entries in it */
575 int sg_dma_direction; /* dma transfer direction */
576
577 /* data phase of the active command (currently only valid for PIO/DMA) */
578 int data_phase;
579
580 unsigned int nsect;
581 unsigned int nleft;
582 struct scatterlist *cursg;
583 unsigned int cursg_ofs;
584
585 int rqsize; /* max sectors per request */
586 int irq; /* our irq number */
587
588 unsigned long dma_base; /* base addr for dma ports */
589 unsigned long dma_command; /* dma command register */
590 unsigned long dma_vendor1; /* dma vendor 1 register */
591 unsigned long dma_status; /* dma status register */
592 unsigned long dma_vendor3; /* dma vendor 3 register */
593 unsigned long dma_prdtable; /* actual prd table address */
594
595 unsigned long config_data; /* for use by chipset-specific code */
596 unsigned long select_data; /* for use by chipset-specific code */
597
598 unsigned long extra_base; /* extra addr for dma ports */
599 unsigned extra_ports; /* number of extra dma ports */
600
601 unsigned noprobe : 1; /* don't probe for this interface */
602 unsigned present : 1; /* this interface exists */
603 unsigned hold : 1; /* this interface is always present */
604 unsigned serialized : 1; /* serialized all channel operation */
605 unsigned sharing_irq: 1; /* 1 = sharing irq with another hwif */
606 unsigned reset : 1; /* reset after probe */
607 unsigned auto_poll : 1; /* supports nop auto-poll */
608 unsigned sg_mapped : 1; /* sg_table and sg_nents are ready */
609 unsigned no_io_32bit : 1; /* 1 = can not do 32-bit IO ops */
610 unsigned mmio : 1; /* host uses MMIO */
611
612 struct device gendev;
613 struct completion gendev_rel_comp; /* To deal with device release() */
614
615 void *hwif_data; /* extra hwif data */
616
617 unsigned dma;
618
619 #ifdef CONFIG_BLK_DEV_IDEACPI
620 struct ide_acpi_hwif_link *acpidata;
621 #endif
622 } ____cacheline_internodealigned_in_smp ide_hwif_t;
623
624 /*
625 * internal ide interrupt handler type
626 */
627 typedef ide_startstop_t (ide_handler_t)(ide_drive_t *);
628 typedef int (ide_expiry_t)(ide_drive_t *);
629
630 typedef struct hwgroup_s {
631 /* irq handler, if active */
632 ide_startstop_t (*handler)(ide_drive_t *);
633
634 /* BOOL: protects all fields below */
635 volatile int busy;
636 /* BOOL: wake us up on timer expiry */
637 unsigned int sleeping : 1;
638 /* BOOL: polling active & poll_timeout field valid */
639 unsigned int polling : 1;
640 /* BOOL: in a polling reset situation. Must not trigger another reset yet */
641 unsigned int resetting : 1;
642
643 /* current drive */
644 ide_drive_t *drive;
645 /* ptr to current hwif in linked-list */
646 ide_hwif_t *hwif;
647
648 /* current request */
649 struct request *rq;
650
651 /* failsafe timer */
652 struct timer_list timer;
653 /* timeout value during long polls */
654 unsigned long poll_timeout;
655 /* queried upon timeouts */
656 int (*expiry)(ide_drive_t *);
657
658 int req_gen;
659 int req_gen_timer;
660 } ide_hwgroup_t;
661
662 typedef struct ide_driver_s ide_driver_t;
663
664 extern struct mutex ide_setting_mtx;
665
666 int set_io_32bit(ide_drive_t *, int);
667 int set_pio_mode(ide_drive_t *, int);
668 int set_using_dma(ide_drive_t *, int);
669
670 #ifdef CONFIG_IDE_PROC_FS
671 /*
672 * configurable drive settings
673 */
674
675 #define TYPE_INT 0
676 #define TYPE_BYTE 1
677 #define TYPE_SHORT 2
678
679 #define SETTING_READ (1 << 0)
680 #define SETTING_WRITE (1 << 1)
681 #define SETTING_RW (SETTING_READ | SETTING_WRITE)
682
683 typedef int (ide_procset_t)(ide_drive_t *, int);
684 typedef struct ide_settings_s {
685 char *name;
686 int rw;
687 int data_type;
688 int min;
689 int max;
690 int mul_factor;
691 int div_factor;
692 void *data;
693 ide_procset_t *set;
694 int auto_remove;
695 struct ide_settings_s *next;
696 } ide_settings_t;
697
698 int ide_add_setting(ide_drive_t *, const char *, int, int, int, int, int, int, void *, ide_procset_t *set);
699
700 /*
701 * /proc/ide interface
702 */
703 typedef struct {
704 const char *name;
705 mode_t mode;
706 read_proc_t *read_proc;
707 write_proc_t *write_proc;
708 } ide_proc_entry_t;
709
710 void proc_ide_create(void);
711 void proc_ide_destroy(void);
712 void ide_proc_register_port(ide_hwif_t *);
713 void ide_proc_unregister_port(ide_hwif_t *);
714 void ide_proc_register_driver(ide_drive_t *, ide_driver_t *);
715 void ide_proc_unregister_driver(ide_drive_t *, ide_driver_t *);
716
717 void ide_add_generic_settings(ide_drive_t *);
718
719 read_proc_t proc_ide_read_capacity;
720 read_proc_t proc_ide_read_geometry;
721
722 #ifdef CONFIG_BLK_DEV_IDEPCI
723 void ide_pci_create_host_proc(const char *, get_info_t *);
724 #endif
725
726 /*
727 * Standard exit stuff:
728 */
729 #define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) \
730 { \
731 len -= off; \
732 if (len < count) { \
733 *eof = 1; \
734 if (len <= 0) \
735 return 0; \
736 } else \
737 len = count; \
738 *start = page + off; \
739 return len; \
740 }
741 #else
742 static inline void proc_ide_create(void) { ; }
743 static inline void proc_ide_destroy(void) { ; }
744 static inline void ide_proc_register_port(ide_hwif_t *hwif) { ; }
745 static inline void ide_proc_unregister_port(ide_hwif_t *hwif) { ; }
746 static inline void ide_proc_register_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
747 static inline void ide_proc_unregister_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
748 static inline void ide_add_generic_settings(ide_drive_t *drive) { ; }
749 #define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) return 0;
750 #endif
751
752 /*
753 * Power Management step value (rq->pm->pm_step).
754 *
755 * The step value starts at 0 (ide_pm_state_start_suspend) for a
756 * suspend operation or 1000 (ide_pm_state_start_resume) for a
757 * resume operation.
758 *
759 * For each step, the core calls the subdriver start_power_step() first.
760 * This can return:
761 * - ide_stopped : In this case, the core calls us back again unless
762 * step have been set to ide_power_state_completed.
763 * - ide_started : In this case, the channel is left busy until an
764 * async event (interrupt) occurs.
765 * Typically, start_power_step() will issue a taskfile request with
766 * do_rw_taskfile().
767 *
768 * Upon reception of the interrupt, the core will call complete_power_step()
769 * with the error code if any. This routine should update the step value
770 * and return. It should not start a new request. The core will call
771 * start_power_step for the new step value, unless step have been set to
772 * ide_power_state_completed.
773 *
774 * Subdrivers are expected to define their own additional power
775 * steps from 1..999 for suspend and from 1001..1999 for resume,
776 * other values are reserved for future use.
777 */
778
779 enum {
780 ide_pm_state_completed = -1,
781 ide_pm_state_start_suspend = 0,
782 ide_pm_state_start_resume = 1000,
783 };
784
785 /*
786 * Subdrivers support.
787 *
788 * The gendriver.owner field should be set to the module owner of this driver.
789 * The gendriver.name field should be set to the name of this driver
790 */
791 struct ide_driver_s {
792 const char *version;
793 u8 media;
794 unsigned supports_dsc_overlap : 1;
795 ide_startstop_t (*do_request)(ide_drive_t *, struct request *, sector_t);
796 int (*end_request)(ide_drive_t *, int, int);
797 ide_startstop_t (*error)(ide_drive_t *, struct request *rq, u8, u8);
798 ide_startstop_t (*abort)(ide_drive_t *, struct request *rq);
799 struct device_driver gen_driver;
800 int (*probe)(ide_drive_t *);
801 void (*remove)(ide_drive_t *);
802 void (*resume)(ide_drive_t *);
803 void (*shutdown)(ide_drive_t *);
804 #ifdef CONFIG_IDE_PROC_FS
805 ide_proc_entry_t *proc;
806 #endif
807 };
808
809 #define to_ide_driver(drv) container_of(drv, ide_driver_t, gen_driver)
810
811 int generic_ide_ioctl(ide_drive_t *, struct file *, struct block_device *, unsigned, unsigned long);
812
813 /*
814 * ide_hwifs[] is the master data structure used to keep track
815 * of just about everything in ide.c. Whenever possible, routines
816 * should be using pointers to a drive (ide_drive_t *) or
817 * pointers to a hwif (ide_hwif_t *), rather than indexing this
818 * structure directly (the allocation/layout may change!).
819 *
820 */
821 #ifndef _IDE_C
822 extern ide_hwif_t ide_hwifs[]; /* master data repository */
823 #endif
824 extern int noautodma;
825
826 extern int ide_end_request (ide_drive_t *drive, int uptodate, int nrsecs);
827 int ide_end_dequeued_request(ide_drive_t *drive, struct request *rq,
828 int uptodate, int nr_sectors);
829
830 extern void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, unsigned int timeout, ide_expiry_t *expiry);
831
832 void ide_execute_command(ide_drive_t *, u8, ide_handler_t *, unsigned int,
833 ide_expiry_t *);
834
835 ide_startstop_t __ide_error(ide_drive_t *, struct request *, u8, u8);
836
837 ide_startstop_t ide_error (ide_drive_t *drive, const char *msg, byte stat);
838
839 ide_startstop_t __ide_abort(ide_drive_t *, struct request *);
840
841 extern ide_startstop_t ide_abort(ide_drive_t *, const char *);
842
843 extern void ide_fix_driveid(struct hd_driveid *);
844
845 extern void ide_fixstring(u8 *, const int, const int);
846
847 int ide_wait_stat(ide_startstop_t *, ide_drive_t *, u8, u8, unsigned long);
848
849 extern ide_startstop_t ide_do_reset (ide_drive_t *);
850
851 extern void ide_init_drive_cmd (struct request *rq);
852
853 /*
854 * "action" parameter type for ide_do_drive_cmd() below.
855 */
856 typedef enum {
857 ide_wait, /* insert rq at end of list, and wait for it */
858 ide_preempt, /* insert rq in front of current request */
859 ide_head_wait, /* insert rq in front of current request and wait for it */
860 ide_end /* insert rq at end of list, but don't wait for it */
861 } ide_action_t;
862
863 extern int ide_do_drive_cmd(ide_drive_t *, struct request *, ide_action_t);
864
865 extern void ide_end_drive_cmd(ide_drive_t *, u8, u8);
866
867 enum {
868 IDE_TFLAG_LBA48 = (1 << 0),
869 IDE_TFLAG_NO_SELECT_MASK = (1 << 1),
870 IDE_TFLAG_FLAGGED = (1 << 2),
871 IDE_TFLAG_OUT_DATA = (1 << 3),
872 IDE_TFLAG_OUT_HOB_FEATURE = (1 << 4),
873 IDE_TFLAG_OUT_HOB_NSECT = (1 << 5),
874 IDE_TFLAG_OUT_HOB_LBAL = (1 << 6),
875 IDE_TFLAG_OUT_HOB_LBAM = (1 << 7),
876 IDE_TFLAG_OUT_HOB_LBAH = (1 << 8),
877 IDE_TFLAG_OUT_HOB = IDE_TFLAG_OUT_HOB_FEATURE |
878 IDE_TFLAG_OUT_HOB_NSECT |
879 IDE_TFLAG_OUT_HOB_LBAL |
880 IDE_TFLAG_OUT_HOB_LBAM |
881 IDE_TFLAG_OUT_HOB_LBAH,
882 IDE_TFLAG_OUT_FEATURE = (1 << 9),
883 IDE_TFLAG_OUT_NSECT = (1 << 10),
884 IDE_TFLAG_OUT_LBAL = (1 << 11),
885 IDE_TFLAG_OUT_LBAM = (1 << 12),
886 IDE_TFLAG_OUT_LBAH = (1 << 13),
887 IDE_TFLAG_OUT_TF = IDE_TFLAG_OUT_FEATURE |
888 IDE_TFLAG_OUT_NSECT |
889 IDE_TFLAG_OUT_LBAL |
890 IDE_TFLAG_OUT_LBAM |
891 IDE_TFLAG_OUT_LBAH,
892 IDE_TFLAG_OUT_DEVICE = (1 << 14),
893 IDE_TFLAG_WRITE = (1 << 15),
894 IDE_TFLAG_FLAGGED_SET_IN_FLAGS = (1 << 16),
895 IDE_TFLAG_IN_DATA = (1 << 17),
896 IDE_TFLAG_CUSTOM_HANDLER = (1 << 18),
897 IDE_TFLAG_DMA_PIO_FALLBACK = (1 << 19),
898 IDE_TFLAG_IN_HOB_FEATURE = (1 << 20),
899 IDE_TFLAG_IN_HOB_NSECT = (1 << 21),
900 IDE_TFLAG_IN_HOB_LBAL = (1 << 22),
901 IDE_TFLAG_IN_HOB_LBAM = (1 << 23),
902 IDE_TFLAG_IN_HOB_LBAH = (1 << 24),
903 IDE_TFLAG_IN_HOB_LBA = IDE_TFLAG_IN_HOB_LBAL |
904 IDE_TFLAG_IN_HOB_LBAM |
905 IDE_TFLAG_IN_HOB_LBAH,
906 IDE_TFLAG_IN_HOB = IDE_TFLAG_IN_HOB_FEATURE |
907 IDE_TFLAG_IN_HOB_NSECT |
908 IDE_TFLAG_IN_HOB_LBA,
909 IDE_TFLAG_IN_NSECT = (1 << 25),
910 IDE_TFLAG_IN_LBAL = (1 << 26),
911 IDE_TFLAG_IN_LBAM = (1 << 27),
912 IDE_TFLAG_IN_LBAH = (1 << 28),
913 IDE_TFLAG_IN_LBA = IDE_TFLAG_IN_LBAL |
914 IDE_TFLAG_IN_LBAM |
915 IDE_TFLAG_IN_LBAH,
916 IDE_TFLAG_IN_TF = IDE_TFLAG_IN_NSECT |
917 IDE_TFLAG_IN_LBA,
918 IDE_TFLAG_IN_DEVICE = (1 << 29),
919 IDE_TFLAG_HOB = IDE_TFLAG_OUT_HOB |
920 IDE_TFLAG_IN_HOB,
921 IDE_TFLAG_TF = IDE_TFLAG_OUT_TF |
922 IDE_TFLAG_IN_TF,
923 IDE_TFLAG_DEVICE = IDE_TFLAG_OUT_DEVICE |
924 IDE_TFLAG_IN_DEVICE,
925 /* force 16-bit I/O operations */
926 IDE_TFLAG_IO_16BIT = (1 << 30),
927 };
928
929 struct ide_taskfile {
930 u8 hob_data; /* 0: high data byte (for TASKFILE IOCTL) */
931
932 u8 hob_feature; /* 1-5: additional data to support LBA48 */
933 u8 hob_nsect;
934 u8 hob_lbal;
935 u8 hob_lbam;
936 u8 hob_lbah;
937
938 u8 data; /* 6: low data byte (for TASKFILE IOCTL) */
939
940 union { /*  7: */
941 u8 error; /* read: error */
942 u8 feature; /* write: feature */
943 };
944
945 u8 nsect; /* 8: number of sectors */
946 u8 lbal; /* 9: LBA low */
947 u8 lbam; /* 10: LBA mid */
948 u8 lbah; /* 11: LBA high */
949
950 u8 device; /* 12: device select */
951
952 union { /* 13: */
953 u8 status; /*  read: status  */
954 u8 command; /* write: command */
955 };
956 };
957
958 typedef struct ide_task_s {
959 union {
960 struct ide_taskfile tf;
961 u8 tf_array[14];
962 };
963 u32 tf_flags;
964 int data_phase;
965 struct request *rq; /* copy of request */
966 void *special; /* valid_t generally */
967 } ide_task_t;
968
969 void ide_tf_load(ide_drive_t *, ide_task_t *);
970 void ide_tf_read(ide_drive_t *, ide_task_t *);
971
972 extern void SELECT_DRIVE(ide_drive_t *);
973 extern void SELECT_MASK(ide_drive_t *, int);
974
975 extern int drive_is_ready(ide_drive_t *);
976
977 void ide_pktcmd_tf_load(ide_drive_t *, u32, u16, u8);
978
979 ide_startstop_t do_rw_taskfile(ide_drive_t *, ide_task_t *);
980
981 void task_end_request(ide_drive_t *, struct request *, u8);
982
983 int ide_raw_taskfile(ide_drive_t *, ide_task_t *, u8 *, u16);
984 int ide_no_data_taskfile(ide_drive_t *, ide_task_t *);
985
986 int ide_taskfile_ioctl(ide_drive_t *, unsigned int, unsigned long);
987 int ide_cmd_ioctl(ide_drive_t *, unsigned int, unsigned long);
988 int ide_task_ioctl(ide_drive_t *, unsigned int, unsigned long);
989
990 extern int system_bus_clock(void);
991
992 extern int ide_driveid_update(ide_drive_t *);
993 extern int ide_ata66_check(ide_drive_t *, ide_task_t *);
994 extern int ide_config_drive_speed(ide_drive_t *, u8);
995 extern u8 eighty_ninty_three (ide_drive_t *);
996 extern int set_transfer(ide_drive_t *, ide_task_t *);
997 extern int taskfile_lib_get_identify(ide_drive_t *drive, u8 *);
998
999 extern int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout);
1000
1001 extern void ide_stall_queue(ide_drive_t *drive, unsigned long timeout);
1002
1003 extern int ide_spin_wait_hwgroup(ide_drive_t *);
1004 extern void ide_timer_expiry(unsigned long);
1005 extern irqreturn_t ide_intr(int irq, void *dev_id);
1006 extern void do_ide_request(struct request_queue *);
1007
1008 void ide_init_disk(struct gendisk *, ide_drive_t *);
1009
1010 #ifdef CONFIG_IDEPCI_PCIBUS_ORDER
1011 extern int ide_scan_direction;
1012 extern int __ide_pci_register_driver(struct pci_driver *driver, struct module *owner, const char *mod_name);
1013 #define ide_pci_register_driver(d) __ide_pci_register_driver(d, THIS_MODULE, KBUILD_MODNAME)
1014 #else
1015 #define ide_pci_register_driver(d) pci_register_driver(d)
1016 #endif
1017
1018 void ide_pci_setup_ports(struct pci_dev *, const struct ide_port_info *, int, u8 *);
1019 void ide_setup_pci_noise(struct pci_dev *, const struct ide_port_info *);
1020
1021 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
1022 void ide_hwif_setup_dma(ide_hwif_t *, const struct ide_port_info *);
1023 #else
1024 static inline void ide_hwif_setup_dma(ide_hwif_t *hwif,
1025 const struct ide_port_info *d) { }
1026 #endif
1027
1028 extern void default_hwif_iops(ide_hwif_t *);
1029 extern void default_hwif_mmiops(ide_hwif_t *);
1030 extern void default_hwif_transport(ide_hwif_t *);
1031
1032 typedef struct ide_pci_enablebit_s {
1033 u8 reg; /* byte pci reg holding the enable-bit */
1034 u8 mask; /* mask to isolate the enable-bit */
1035 u8 val; /* value of masked reg when "enabled" */
1036 } ide_pci_enablebit_t;
1037
1038 enum {
1039 /* Uses ISA control ports not PCI ones. */
1040 IDE_HFLAG_ISA_PORTS = (1 << 0),
1041 /* single port device */
1042 IDE_HFLAG_SINGLE = (1 << 1),
1043 /* don't use legacy PIO blacklist */
1044 IDE_HFLAG_PIO_NO_BLACKLIST = (1 << 2),
1045 /* don't use conservative PIO "downgrade" */
1046 IDE_HFLAG_PIO_NO_DOWNGRADE = (1 << 3),
1047 /* use PIO8/9 for prefetch off/on */
1048 IDE_HFLAG_ABUSE_PREFETCH = (1 << 4),
1049 /* use PIO6/7 for fast-devsel off/on */
1050 IDE_HFLAG_ABUSE_FAST_DEVSEL = (1 << 5),
1051 /* use 100-102 and 200-202 PIO values to set DMA modes */
1052 IDE_HFLAG_ABUSE_DMA_MODES = (1 << 6),
1053 /*
1054 * keep DMA setting when programming PIO mode, may be used only
1055 * for hosts which have separate PIO and DMA timings (ie. PMAC)
1056 */
1057 IDE_HFLAG_SET_PIO_MODE_KEEP_DMA = (1 << 7),
1058 /* program host for the transfer mode after programming device */
1059 IDE_HFLAG_POST_SET_MODE = (1 << 8),
1060 /* don't program host/device for the transfer mode ("smart" hosts) */
1061 IDE_HFLAG_NO_SET_MODE = (1 << 9),
1062 /* trust BIOS for programming chipset/device for DMA */
1063 IDE_HFLAG_TRUST_BIOS_FOR_DMA = (1 << 10),
1064 /* host uses VDMA */
1065 IDE_HFLAG_VDMA = (1 << 11),
1066 /* ATAPI DMA is unsupported */
1067 IDE_HFLAG_NO_ATAPI_DMA = (1 << 12),
1068 /* set if host is a "bootable" controller */
1069 IDE_HFLAG_BOOTABLE = (1 << 13),
1070 /* host doesn't support DMA */
1071 IDE_HFLAG_NO_DMA = (1 << 14),
1072 /* check if host is PCI IDE device before allowing DMA */
1073 IDE_HFLAG_NO_AUTODMA = (1 << 15),
1074 /* host is CS5510/CS5520 */
1075 IDE_HFLAG_CS5520 = (1 << 16),
1076 /* no LBA48 */
1077 IDE_HFLAG_NO_LBA48 = (1 << 17),
1078 /* no LBA48 DMA */
1079 IDE_HFLAG_NO_LBA48_DMA = (1 << 18),
1080 /* data FIFO is cleared by an error */
1081 IDE_HFLAG_ERROR_STOPS_FIFO = (1 << 19),
1082 /* serialize ports */
1083 IDE_HFLAG_SERIALIZE = (1 << 20),
1084 /* use legacy IRQs */
1085 IDE_HFLAG_LEGACY_IRQS = (1 << 21),
1086 /* force use of legacy IRQs */
1087 IDE_HFLAG_FORCE_LEGACY_IRQS = (1 << 22),
1088 /* limit LBA48 requests to 256 sectors */
1089 IDE_HFLAG_RQSIZE_256 = (1 << 23),
1090 /* use 32-bit I/O ops */
1091 IDE_HFLAG_IO_32BIT = (1 << 24),
1092 /* unmask IRQs */
1093 IDE_HFLAG_UNMASK_IRQS = (1 << 25),
1094 IDE_HFLAG_ABUSE_SET_DMA_MODE = (1 << 26),
1095 /* host is CY82C693 */
1096 IDE_HFLAG_CY82C693 = (1 << 27),
1097 /* force host out of "simplex" mode */
1098 IDE_HFLAG_CLEAR_SIMPLEX = (1 << 28),
1099 /* DSC overlap is unsupported */
1100 IDE_HFLAG_NO_DSC = (1 << 29),
1101 /* don't autotune PIO */
1102 IDE_HFLAG_NO_AUTOTUNE = (1 << 30),
1103 };
1104
1105 #ifdef CONFIG_BLK_DEV_OFFBOARD
1106 # define IDE_HFLAG_OFF_BOARD IDE_HFLAG_BOOTABLE
1107 #else
1108 # define IDE_HFLAG_OFF_BOARD 0
1109 #endif
1110
1111 struct ide_port_info {
1112 char *name;
1113 unsigned int (*init_chipset)(struct pci_dev *, const char *);
1114 void (*init_iops)(ide_hwif_t *);
1115 void (*init_hwif)(ide_hwif_t *);
1116 void (*init_dma)(ide_hwif_t *, unsigned long);
1117 ide_pci_enablebit_t enablebits[2];
1118 hwif_chipset_t chipset;
1119 u8 extra;
1120 u32 host_flags;
1121 u8 pio_mask;
1122 u8 swdma_mask;
1123 u8 mwdma_mask;
1124 u8 udma_mask;
1125 };
1126
1127 int ide_setup_pci_device(struct pci_dev *, const struct ide_port_info *);
1128 int ide_setup_pci_devices(struct pci_dev *, struct pci_dev *, const struct ide_port_info *);
1129
1130 void ide_map_sg(ide_drive_t *, struct request *);
1131 void ide_init_sg_cmd(ide_drive_t *, struct request *);
1132
1133 #define BAD_DMA_DRIVE 0
1134 #define GOOD_DMA_DRIVE 1
1135
1136 struct drive_list_entry {
1137 const char *id_model;
1138 const char *id_firmware;
1139 };
1140
1141 int ide_in_drive_list(struct hd_driveid *, const struct drive_list_entry *);
1142
1143 #ifdef CONFIG_BLK_DEV_IDEDMA
1144 int __ide_dma_bad_drive(ide_drive_t *);
1145 int ide_id_dma_bug(ide_drive_t *);
1146
1147 u8 ide_find_dma_mode(ide_drive_t *, u8);
1148
1149 static inline u8 ide_max_dma_mode(ide_drive_t *drive)
1150 {
1151 return ide_find_dma_mode(drive, XFER_UDMA_6);
1152 }
1153
1154 void ide_dma_off_quietly(ide_drive_t *);
1155 void ide_dma_off(ide_drive_t *);
1156 void ide_dma_on(ide_drive_t *);
1157 int ide_set_dma(ide_drive_t *);
1158 ide_startstop_t ide_dma_intr(ide_drive_t *);
1159
1160 int ide_build_sglist(ide_drive_t *, struct request *);
1161 void ide_destroy_dmatable(ide_drive_t *);
1162
1163 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
1164 extern int ide_build_dmatable(ide_drive_t *, struct request *);
1165 extern int ide_release_dma(ide_hwif_t *);
1166 extern void ide_setup_dma(ide_hwif_t *, unsigned long);
1167
1168 void ide_dma_host_set(ide_drive_t *, int);
1169 extern int ide_dma_setup(ide_drive_t *);
1170 extern void ide_dma_start(ide_drive_t *);
1171 extern int __ide_dma_end(ide_drive_t *);
1172 extern void ide_dma_lost_irq(ide_drive_t *);
1173 extern void ide_dma_timeout(ide_drive_t *);
1174 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
1175
1176 #else
1177 static inline int ide_id_dma_bug(ide_drive_t *drive) { return 0; }
1178 static inline u8 ide_find_dma_mode(ide_drive_t *drive, u8 speed) { return 0; }
1179 static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; }
1180 static inline void ide_dma_off_quietly(ide_drive_t *drive) { ; }
1181 static inline void ide_dma_off(ide_drive_t *drive) { ; }
1182 static inline void ide_dma_on(ide_drive_t *drive) { ; }
1183 static inline void ide_dma_verbose(ide_drive_t *drive) { ; }
1184 static inline int ide_set_dma(ide_drive_t *drive) { return 1; }
1185 #endif /* CONFIG_BLK_DEV_IDEDMA */
1186
1187 #ifndef CONFIG_BLK_DEV_IDEDMA_PCI
1188 static inline void ide_release_dma(ide_hwif_t *drive) {;}
1189 #endif
1190
1191 #ifdef CONFIG_BLK_DEV_IDEACPI
1192 extern int ide_acpi_exec_tfs(ide_drive_t *drive);
1193 extern void ide_acpi_get_timing(ide_hwif_t *hwif);
1194 extern void ide_acpi_push_timing(ide_hwif_t *hwif);
1195 extern void ide_acpi_init(ide_hwif_t *hwif);
1196 extern void ide_acpi_set_state(ide_hwif_t *hwif, int on);
1197 #else
1198 static inline int ide_acpi_exec_tfs(ide_drive_t *drive) { return 0; }
1199 static inline void ide_acpi_get_timing(ide_hwif_t *hwif) { ; }
1200 static inline void ide_acpi_push_timing(ide_hwif_t *hwif) { ; }
1201 static inline void ide_acpi_init(ide_hwif_t *hwif) { ; }
1202 static inline void ide_acpi_set_state(ide_hwif_t *hwif, int on) {}
1203 #endif
1204
1205 void ide_remove_port_from_hwgroup(ide_hwif_t *);
1206 extern int ide_hwif_request_regions(ide_hwif_t *hwif);
1207 extern void ide_hwif_release_regions(ide_hwif_t* hwif);
1208 extern void ide_unregister (unsigned int index);
1209
1210 void ide_register_region(struct gendisk *);
1211 void ide_unregister_region(struct gendisk *);
1212
1213 void ide_undecoded_slave(ide_drive_t *);
1214
1215 int ide_device_add_all(u8 *idx, const struct ide_port_info *);
1216 int ide_device_add(u8 idx[4], const struct ide_port_info *);
1217
1218 static inline void *ide_get_hwifdata (ide_hwif_t * hwif)
1219 {
1220 return hwif->hwif_data;
1221 }
1222
1223 static inline void ide_set_hwifdata (ide_hwif_t * hwif, void *data)
1224 {
1225 hwif->hwif_data = data;
1226 }
1227
1228 const char *ide_xfer_verbose(u8 mode);
1229 extern void ide_toggle_bounce(ide_drive_t *drive, int on);
1230 extern int ide_set_xfer_rate(ide_drive_t *drive, u8 rate);
1231
1232 static inline int ide_dev_has_iordy(struct hd_driveid *id)
1233 {
1234 return ((id->field_valid & 2) && (id->capability & 8)) ? 1 : 0;
1235 }
1236
1237 static inline int ide_dev_is_sata(struct hd_driveid *id)
1238 {
1239 /*
1240 * See if word 93 is 0 AND drive is at least ATA-5 compatible
1241 * verifying that word 80 by casting it to a signed type --
1242 * this trick allows us to filter out the reserved values of
1243 * 0x0000 and 0xffff along with the earlier ATA revisions...
1244 */
1245 if (id->hw_config == 0 && (short)id->major_rev_num >= 0x0020)
1246 return 1;
1247 return 0;
1248 }
1249
1250 u64 ide_get_lba_addr(struct ide_taskfile *, int);
1251 u8 ide_dump_status(ide_drive_t *, const char *, u8);
1252
1253 typedef struct ide_pio_timings_s {
1254 int setup_time; /* Address setup (ns) minimum */
1255 int active_time; /* Active pulse (ns) minimum */
1256 int cycle_time; /* Cycle time (ns) minimum = */
1257 /* active + recovery (+ setup for some chips) */
1258 } ide_pio_timings_t;
1259
1260 unsigned int ide_pio_cycle_time(ide_drive_t *, u8);
1261 u8 ide_get_best_pio_mode(ide_drive_t *, u8, u8);
1262 extern const ide_pio_timings_t ide_pio_timings[6];
1263
1264 int ide_set_pio_mode(ide_drive_t *, u8);
1265 int ide_set_dma_mode(ide_drive_t *, u8);
1266
1267 void ide_set_pio(ide_drive_t *, u8);
1268
1269 static inline void ide_set_max_pio(ide_drive_t *drive)
1270 {
1271 ide_set_pio(drive, 255);
1272 }
1273
1274 extern spinlock_t ide_lock;
1275 extern struct mutex ide_cfg_mtx;
1276 /*
1277 * Structure locking:
1278 *
1279 * ide_cfg_mtx and ide_lock together protect changes to
1280 * ide_hwif_t->{next,hwgroup}
1281 * ide_drive_t->next
1282 *
1283 * ide_hwgroup_t->busy: ide_lock
1284 * ide_hwgroup_t->hwif: ide_lock
1285 * ide_hwif_t->mate: constant, no locking
1286 * ide_drive_t->hwif: constant, no locking
1287 */
1288
1289 #define local_irq_set(flags) do { local_save_flags((flags)); local_irq_enable_in_hardirq(); } while (0)
1290
1291 extern struct bus_type ide_bus_type;
1292
1293 /* check if CACHE FLUSH (EXT) command is supported (bits defined in ATA-6) */
1294 #define ide_id_has_flush_cache(id) ((id)->cfs_enable_2 & 0x3000)
1295
1296 /* some Maxtor disks have bit 13 defined incorrectly so check bit 10 too */
1297 #define ide_id_has_flush_cache_ext(id) \
1298 (((id)->cfs_enable_2 & 0x2400) == 0x2400)
1299
1300 static inline void ide_dump_identify(u8 *id)
1301 {
1302 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_NONE, 16, 2, id, 512, 0);
1303 }
1304
1305 static inline int hwif_to_node(ide_hwif_t *hwif)
1306 {
1307 struct pci_dev *dev = to_pci_dev(hwif->dev);
1308 return dev ? pcibus_to_node(dev->bus) : -1;
1309 }
1310
1311 static inline ide_drive_t *ide_get_paired_drive(ide_drive_t *drive)
1312 {
1313 ide_hwif_t *hwif = HWIF(drive);
1314
1315 return &hwif->drives[(drive->dn ^ 1) & 1];
1316 }
1317
1318 static inline void ide_set_irq(ide_drive_t *drive, int on)
1319 {
1320 drive->hwif->OUTB(drive->ctl | (on ? 0 : 2), IDE_CONTROL_REG);
1321 }
1322
1323 #endif /* _IDE_H */
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