4 * linux/include/linux/ide.h
6 * Copyright (C) 1994-2002 Linus Torvalds & authors
9 #include <linux/init.h>
10 #include <linux/ioport.h>
11 #include <linux/hdreg.h>
12 #include <linux/hdsmart.h>
13 #include <linux/blkdev.h>
14 #include <linux/proc_fs.h>
15 #include <linux/interrupt.h>
16 #include <linux/bitops.h>
17 #include <linux/bio.h>
18 #include <linux/device.h>
19 #include <linux/pci.h>
20 #include <linux/completion.h>
21 #ifdef CONFIG_BLK_DEV_IDEACPI
22 #include <acpi/acpi.h>
24 #include <asm/byteorder.h>
25 #include <asm/system.h>
27 #include <asm/semaphore.h>
28 #include <asm/mutex.h>
30 #if defined(CRIS) || defined(FRV)
31 # define SUPPORT_VLB_SYNC 0
33 # define SUPPORT_VLB_SYNC 1
37 * Used to indicate "no IRQ", should be a value that cannot be an IRQ
41 #define IDE_NO_IRQ (-1)
43 typedef unsigned char byte
; /* used everywhere */
46 * Probably not wise to fiddle with these
48 #define ERROR_MAX 8 /* Max read/write errors per sector */
49 #define ERROR_RESET 3 /* Reset controller every 4th retry */
50 #define ERROR_RECAL 1 /* Recalibrate every 2nd retry */
55 #define IDE_TUNE_NOAUTO 2
56 #define IDE_TUNE_AUTO 1
57 #define IDE_TUNE_DEFAULT 0
63 #define DMA_PIO_RETRY 1 /* retrying in PIO */
65 #define HWIF(drive) ((ide_hwif_t *)((drive)->hwif))
66 #define HWGROUP(drive) ((ide_hwgroup_t *)(HWIF(drive)->hwgroup))
69 * Definitions for accessing IDE controller registers
71 #define IDE_NR_PORTS (10)
73 #define IDE_DATA_OFFSET (0)
74 #define IDE_ERROR_OFFSET (1)
75 #define IDE_NSECTOR_OFFSET (2)
76 #define IDE_SECTOR_OFFSET (3)
77 #define IDE_LCYL_OFFSET (4)
78 #define IDE_HCYL_OFFSET (5)
79 #define IDE_SELECT_OFFSET (6)
80 #define IDE_STATUS_OFFSET (7)
81 #define IDE_CONTROL_OFFSET (8)
82 #define IDE_IRQ_OFFSET (9)
84 #define IDE_FEATURE_OFFSET IDE_ERROR_OFFSET
85 #define IDE_COMMAND_OFFSET IDE_STATUS_OFFSET
87 #define IDE_DATA_REG (HWIF(drive)->io_ports[IDE_DATA_OFFSET])
88 #define IDE_ERROR_REG (HWIF(drive)->io_ports[IDE_ERROR_OFFSET])
89 #define IDE_NSECTOR_REG (HWIF(drive)->io_ports[IDE_NSECTOR_OFFSET])
90 #define IDE_SECTOR_REG (HWIF(drive)->io_ports[IDE_SECTOR_OFFSET])
91 #define IDE_LCYL_REG (HWIF(drive)->io_ports[IDE_LCYL_OFFSET])
92 #define IDE_HCYL_REG (HWIF(drive)->io_ports[IDE_HCYL_OFFSET])
93 #define IDE_SELECT_REG (HWIF(drive)->io_ports[IDE_SELECT_OFFSET])
94 #define IDE_STATUS_REG (HWIF(drive)->io_ports[IDE_STATUS_OFFSET])
95 #define IDE_CONTROL_REG (HWIF(drive)->io_ports[IDE_CONTROL_OFFSET])
96 #define IDE_IRQ_REG (HWIF(drive)->io_ports[IDE_IRQ_OFFSET])
98 #define IDE_FEATURE_REG IDE_ERROR_REG
99 #define IDE_COMMAND_REG IDE_STATUS_REG
100 #define IDE_ALTSTATUS_REG IDE_CONTROL_REG
101 #define IDE_IREASON_REG IDE_NSECTOR_REG
102 #define IDE_BCOUNTL_REG IDE_LCYL_REG
103 #define IDE_BCOUNTH_REG IDE_HCYL_REG
105 #define OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good))
106 #define BAD_R_STAT (BUSY_STAT | ERR_STAT)
107 #define BAD_W_STAT (BAD_R_STAT | WRERR_STAT)
108 #define BAD_STAT (BAD_R_STAT | DRQ_STAT)
109 #define DRIVE_READY (READY_STAT | SEEK_STAT)
110 #define DATA_READY (DRQ_STAT)
112 #define BAD_CRC (ABRT_ERR | ICRC_ERR)
114 #define SATA_NR_PORTS (3) /* 16 possible ?? */
116 #define SATA_STATUS_OFFSET (0)
117 #define SATA_STATUS_REG (HWIF(drive)->sata_scr[SATA_STATUS_OFFSET])
118 #define SATA_ERROR_OFFSET (1)
119 #define SATA_ERROR_REG (HWIF(drive)->sata_scr[SATA_ERROR_OFFSET])
120 #define SATA_CONTROL_OFFSET (2)
121 #define SATA_CONTROL_REG (HWIF(drive)->sata_scr[SATA_CONTROL_OFFSET])
123 #define SATA_MISC_OFFSET (0)
124 #define SATA_MISC_REG (HWIF(drive)->sata_misc[SATA_MISC_OFFSET])
125 #define SATA_PHY_OFFSET (1)
126 #define SATA_PHY_REG (HWIF(drive)->sata_misc[SATA_PHY_OFFSET])
127 #define SATA_IEN_OFFSET (2)
128 #define SATA_IEN_REG (HWIF(drive)->sata_misc[SATA_IEN_OFFSET])
131 * Our Physical Region Descriptor (PRD) table should be large enough
132 * to handle the biggest I/O request we are likely to see. Since requests
133 * can have no more than 256 sectors, and since the typical blocksize is
134 * two or more sectors, we could get by with a limit of 128 entries here for
135 * the usual worst case. Most requests seem to include some contiguous blocks,
136 * further reducing the number of table entries required.
138 * The driver reverts to PIO mode for individual requests that exceed
139 * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling
140 * 100% of all crazy scenarios here is not necessary.
142 * As it turns out though, we must allocate a full 4KB page for this,
143 * so the two PRD tables (ide0 & ide1) will each get half of that,
144 * allowing each to have about 256 entries (8 bytes each) from this.
147 #define PRD_ENTRIES 256
150 * Some more useful definitions
152 #define PARTN_BITS 6 /* number of minor dev bits for partitions */
153 #define MAX_DRIVES 2 /* per interface; 2 assumed by lots of code */
154 #define SECTOR_SIZE 512
155 #define SECTOR_WORDS (SECTOR_SIZE / 4) /* number of 32bit words per sector */
156 #define IDE_LARGE_SEEK(b1,b2,t) (((b1) > (b2) + (t)) || ((b2) > (b1) + (t)))
159 * Timeouts for various operations:
161 #define WAIT_DRQ (HZ/10) /* 100msec - spec allows up to 20ms */
162 #define WAIT_READY (5*HZ) /* 5sec - some laptops are very slow */
163 #define WAIT_PIDENTIFY (10*HZ) /* 10sec - should be less than 3ms (?), if all ATAPI CD is closed at boot */
164 #define WAIT_WORSTCASE (30*HZ) /* 30sec - worst case when spinning up */
165 #define WAIT_CMD (10*HZ) /* 10sec - maximum wait for an IRQ to happen */
166 #define WAIT_MIN_SLEEP (2*HZ/100) /* 20msec - minimum sleep time */
169 * Check for an interrupt and acknowledge the interrupt status
172 typedef int (ide_ack_intr_t
)(struct hwif_s
*);
175 * hwif_chipset_t is used to keep track of the specific hardware
176 * chipset used by each IDE interface, if known.
178 enum { ide_unknown
, ide_generic
, ide_pci
,
179 ide_cmd640
, ide_dtc2278
, ide_ali14xx
,
180 ide_qd65xx
, ide_umc8672
, ide_ht6560b
,
181 ide_rz1000
, ide_trm290
,
182 ide_cmd646
, ide_cy82c693
, ide_4drives
,
183 ide_pmac
, ide_etrax100
, ide_acorn
,
184 ide_au1xxx
, ide_forced
187 typedef u8 hwif_chipset_t
;
190 * Structure to hold all information about the location of this port
192 typedef struct hw_regs_s
{
193 unsigned long io_ports
[IDE_NR_PORTS
]; /* task file registers */
194 int irq
; /* our irq number */
195 ide_ack_intr_t
*ack_intr
; /* acknowledge interrupt */
196 hwif_chipset_t chipset
;
200 struct hwif_s
* ide_find_port(unsigned long);
201 void ide_init_port_hw(struct hwif_s
*, hw_regs_t
*);
204 int ide_register_hw(hw_regs_t
*, void (*)(struct ide_drive_s
*), int,
207 void ide_setup_ports( hw_regs_t
*hw
,
212 ide_ack_intr_t
*ack_intr
,
218 static inline void ide_std_init_ports(hw_regs_t
*hw
,
219 unsigned long io_addr
,
220 unsigned long ctl_addr
)
224 for (i
= IDE_DATA_OFFSET
; i
<= IDE_STATUS_OFFSET
; i
++)
225 hw
->io_ports
[i
] = io_addr
++;
227 hw
->io_ports
[IDE_CONTROL_OFFSET
] = ctl_addr
;
232 #if !defined(MAX_HWIFS) || defined(CONFIG_EMBEDDED)
234 #define MAX_HWIFS CONFIG_IDE_MAX_HWIFS
237 /* needed on alpha, x86/x86_64, ia64, mips, ppc32 and sh */
238 #ifndef IDE_ARCH_OBSOLETE_DEFAULTS
239 # define ide_default_io_base(index) (0)
240 # define ide_default_irq(base) (0)
241 # define ide_init_default_irq(base) (0)
244 #ifdef CONFIG_IDE_ARCH_OBSOLETE_INIT
245 static inline void ide_init_hwif_ports(hw_regs_t
*hw
,
246 unsigned long io_addr
,
247 unsigned long ctl_addr
,
251 ide_std_init_ports(hw
, io_addr
, ide_default_io_ctl(io_addr
));
253 ide_std_init_ports(hw
, io_addr
, ctl_addr
);
258 hw
->io_ports
[IDE_IRQ_OFFSET
] = 0;
261 if (ppc_ide_md
.ide_init_hwif
)
262 ppc_ide_md
.ide_init_hwif(hw
, io_addr
, ctl_addr
, irq
);
266 static inline void ide_init_hwif_ports(hw_regs_t
*hw
,
267 unsigned long io_addr
,
268 unsigned long ctl_addr
,
271 if (io_addr
|| ctl_addr
)
272 printk(KERN_WARNING
"%s: must not be called\n", __FUNCTION__
);
274 #endif /* CONFIG_IDE_ARCH_OBSOLETE_INIT */
276 /* Currently only m68k, apus and m8xx need it */
277 #ifndef IDE_ARCH_ACK_INTR
278 # define ide_ack_intr(hwif) (1)
281 /* Currently only Atari needs it */
282 #ifndef IDE_ARCH_LOCK
283 # define ide_release_lock() do {} while (0)
284 # define ide_get_lock(hdlr, data) do {} while (0)
285 #endif /* IDE_ARCH_LOCK */
288 * Now for the data we need to maintain per-drive: ide_drive_t
291 #define ide_scsi 0x21
292 #define ide_disk 0x20
293 #define ide_optical 0x7
294 #define ide_cdrom 0x5
296 #define ide_floppy 0x0
299 * Special Driver Flags
301 * set_geometry : respecify drive geometry
302 * recalibrate : seek to cyl 0
303 * set_multmode : set multmode count
304 * set_tune : tune interface for drive
305 * serviced : service command
311 unsigned set_geometry
: 1;
312 unsigned recalibrate
: 1;
313 unsigned set_multmode
: 1;
314 unsigned set_tune
: 1;
315 unsigned serviced
: 1;
316 unsigned reserved
: 3;
321 * ATA-IDE Select Register, aka Device-Head
323 * head : always zeros here
324 * unit : drive select number: 0/1
326 * lba : using LBA instead of CHS
332 #if defined(__LITTLE_ENDIAN_BITFIELD)
338 #elif defined(__BIG_ENDIAN_BITFIELD)
345 #error "Please fix <asm/byteorder.h>"
348 } select_t
, ata_select_t
;
351 * Status returned from various ide_ functions
354 ide_stopped
, /* no drive operation was started */
355 ide_started
, /* a drive operation was started, handler was set */
359 struct ide_settings_s
;
361 #ifdef CONFIG_BLK_DEV_IDEACPI
362 struct ide_acpi_drive_link
;
363 struct ide_acpi_hwif_link
;
366 typedef struct ide_drive_s
{
367 char name
[4]; /* drive name, such as "hda" */
368 char driver_req
[10]; /* requests specific driver */
370 struct request_queue
*queue
; /* request queue */
372 struct request
*rq
; /* current request */
373 struct ide_drive_s
*next
; /* circular list of hwgroup drives */
374 void *driver_data
; /* extra driver data */
375 struct hd_driveid
*id
; /* drive model identification info */
376 #ifdef CONFIG_IDE_PROC_FS
377 struct proc_dir_entry
*proc
; /* /proc/ide/ directory entry */
378 struct ide_settings_s
*settings
;/* /proc/ide/ drive settings */
380 struct hwif_s
*hwif
; /* actually (ide_hwif_t *) */
382 unsigned long sleep
; /* sleep until this time */
383 unsigned long service_start
; /* time we started last request */
384 unsigned long service_time
; /* service time of last request */
385 unsigned long timeout
; /* max time to wait for irq */
387 special_t special
; /* special action flags */
388 select_t select
; /* basic drive/head select reg value */
390 u8 keep_settings
; /* restore settings after drive reset */
391 u8 using_dma
; /* disk is using dma for read/write */
392 u8 retry_pio
; /* retrying dma capable host in pio */
393 u8 state
; /* retry state */
394 u8 waiting_for_dma
; /* dma currently in progress */
395 u8 unmask
; /* okay to unmask other irqs */
396 u8 bswap
; /* byte swap data */
397 u8 noflush
; /* don't attempt flushes */
398 u8 dsc_overlap
; /* DSC overlap */
399 u8 nice1
; /* give potential excess bandwidth */
401 unsigned present
: 1; /* drive is physically present */
402 unsigned dead
: 1; /* device ejected hint */
403 unsigned id_read
: 1; /* 1=id read from disk 0 = synthetic */
404 unsigned noprobe
: 1; /* from: hdx=noprobe */
405 unsigned removable
: 1; /* 1 if need to do check_media_change */
406 unsigned attach
: 1; /* needed for removable devices */
407 unsigned forced_geom
: 1; /* 1 if hdx=c,h,s was given at boot */
408 unsigned no_unmask
: 1; /* disallow setting unmask bit */
409 unsigned no_io_32bit
: 1; /* disallow enabling 32bit I/O */
410 unsigned atapi_overlap
: 1; /* ATAPI overlap (not supported) */
411 unsigned nice0
: 1; /* give obvious excess bandwidth */
412 unsigned nice2
: 1; /* give a share in our own bandwidth */
413 unsigned doorlocking
: 1; /* for removable only: door lock/unlock works */
414 unsigned nodma
: 1; /* disallow DMA */
415 unsigned autotune
: 2; /* 0=default, 1=autotune, 2=noautotune */
416 unsigned remap_0_to_1
: 1; /* 0=noremap, 1=remap 0->1 (for EZDrive) */
417 unsigned blocked
: 1; /* 1=powermanagment told us not to do anything, so sleep nicely */
418 unsigned vdma
: 1; /* 1=doing PIO over DMA 0=doing normal DMA */
419 unsigned scsi
: 1; /* 0=default, 1=ide-scsi emulation */
420 unsigned sleeping
: 1; /* 1=sleeping & sleep field valid */
421 unsigned post_reset
: 1;
422 unsigned udma33_warned
: 1;
424 u8 addressing
; /* 0=28-bit, 1=48-bit, 2=48-bit doing 28-bit */
425 u8 quirk_list
; /* considered quirky, set for a specific host */
426 u8 init_speed
; /* transfer rate set at boot */
427 u8 current_speed
; /* current transfer rate set */
428 u8 desired_speed
; /* desired transfer rate set */
429 u8 dn
; /* now wide spread use */
430 u8 wcache
; /* status of write cache */
431 u8 acoustic
; /* acoustic management */
432 u8 media
; /* disk, cdrom, tape, floppy, ... */
433 u8 ctl
; /* "normal" value for IDE_CONTROL_REG */
434 u8 ready_stat
; /* min status value for drive ready */
435 u8 mult_count
; /* current multiple sector setting */
436 u8 mult_req
; /* requested multiple sector setting */
437 u8 tune_req
; /* requested drive tuning setting */
438 u8 io_32bit
; /* 0=16-bit, 1=32-bit, 2/3=32bit+sync */
439 u8 bad_wstat
; /* used for ignoring WRERR_STAT */
440 u8 nowerr
; /* used for ignoring WRERR_STAT */
441 u8 sect0
; /* offset of first sector for DM6:DDO */
442 u8 head
; /* "real" number of heads */
443 u8 sect
; /* "real" sectors per track */
444 u8 bios_head
; /* BIOS/fdisk/LILO number of heads */
445 u8 bios_sect
; /* BIOS/fdisk/LILO sectors per track */
447 unsigned int bios_cyl
; /* BIOS/fdisk/LILO number of cyls */
448 unsigned int cyl
; /* "real" number of cyls */
449 unsigned int drive_data
; /* used by set_pio_mode/selectproc */
450 unsigned int failures
; /* current failure count */
451 unsigned int max_failures
; /* maximum allowed failure count */
452 u64 probed_capacity
;/* initial reported media capacity (ide-cd only currently) */
454 u64 capacity64
; /* total number of sectors */
456 int lun
; /* logical unit */
457 int crc_count
; /* crc counter to reduce drive speed */
458 #ifdef CONFIG_BLK_DEV_IDEACPI
459 struct ide_acpi_drive_link
*acpidata
;
461 struct list_head list
;
462 struct device gendev
;
463 struct completion gendev_rel_comp
; /* to deal with device release() */
466 #define to_ide_device(dev)container_of(dev, ide_drive_t, gendev)
468 #define IDE_CHIPSET_PCI_MASK \
469 ((1<<ide_pci)|(1<<ide_cmd646)|(1<<ide_ali14xx))
470 #define IDE_CHIPSET_IS_PCI(c) ((IDE_CHIPSET_PCI_MASK >> (c)) & 1)
472 struct ide_port_info
;
474 typedef struct hwif_s
{
475 struct hwif_s
*next
; /* for linked-list in ide_hwgroup_t */
476 struct hwif_s
*mate
; /* other hwif from same PCI chip */
477 struct hwgroup_s
*hwgroup
; /* actually (ide_hwgroup_t *) */
478 struct proc_dir_entry
*proc
; /* /proc/ide/ directory entry */
480 char name
[6]; /* name of interface, eg. "ide0" */
482 /* task file registers for pata and sata */
483 unsigned long io_ports
[IDE_NR_PORTS
];
484 unsigned long sata_scr
[SATA_NR_PORTS
];
485 unsigned long sata_misc
[SATA_NR_PORTS
];
487 ide_drive_t drives
[MAX_DRIVES
]; /* drive info */
489 u8 major
; /* our major number */
490 u8 index
; /* 0 for ide0; 1 for ide1; ... */
491 u8 channel
; /* for dual-port chips: 0=primary, 1=secondary */
492 u8 straight8
; /* Alan's straight 8 check */
493 u8 bus_state
; /* power state of the IDE bus */
503 u8 cbl
; /* cable type */
505 hwif_chipset_t chipset
; /* sub-module for tuning.. */
507 struct pci_dev
*pci_dev
; /* for pci chipsets */
508 const struct ide_port_info
*cds
; /* chipset device struct */
510 ide_ack_intr_t
*ack_intr
;
512 void (*rw_disk
)(ide_drive_t
*, struct request
*);
515 ide_hwif_ops_t
*hwifops
;
517 /* routine to program host for PIO mode */
518 void (*set_pio_mode
)(ide_drive_t
*, const u8
);
519 /* routine to program host for DMA mode */
520 void (*set_dma_mode
)(ide_drive_t
*, const u8
);
521 /* tweaks hardware to select drive */
522 void (*selectproc
)(ide_drive_t
*);
523 /* chipset polling based on hba specifics */
524 int (*reset_poll
)(ide_drive_t
*);
525 /* chipset specific changes to default for device-hba resets */
526 void (*pre_reset
)(ide_drive_t
*);
527 /* routine to reset controller after a disk reset */
528 void (*resetproc
)(ide_drive_t
*);
529 /* special host masking for drive selection */
530 void (*maskproc
)(ide_drive_t
*, int);
531 /* check host's drive quirk list */
532 void (*quirkproc
)(ide_drive_t
*);
533 /* driver soft-power interface */
534 int (*busproc
)(ide_drive_t
*, int);
536 u8 (*mdma_filter
)(ide_drive_t
*);
537 u8 (*udma_filter
)(ide_drive_t
*);
539 void (*ata_input_data
)(ide_drive_t
*, void *, u32
);
540 void (*ata_output_data
)(ide_drive_t
*, void *, u32
);
542 void (*atapi_input_bytes
)(ide_drive_t
*, void *, u32
);
543 void (*atapi_output_bytes
)(ide_drive_t
*, void *, u32
);
545 void (*dma_host_set
)(ide_drive_t
*, int);
546 int (*dma_setup
)(ide_drive_t
*);
547 void (*dma_exec_cmd
)(ide_drive_t
*, u8
);
548 void (*dma_start
)(ide_drive_t
*);
549 int (*ide_dma_end
)(ide_drive_t
*drive
);
550 int (*ide_dma_test_irq
)(ide_drive_t
*drive
);
551 void (*ide_dma_clear_irq
)(ide_drive_t
*drive
);
552 void (*dma_lost_irq
)(ide_drive_t
*drive
);
553 void (*dma_timeout
)(ide_drive_t
*drive
);
555 void (*OUTB
)(u8 addr
, unsigned long port
);
556 void (*OUTBSYNC
)(ide_drive_t
*drive
, u8 addr
, unsigned long port
);
557 void (*OUTW
)(u16 addr
, unsigned long port
);
558 void (*OUTSW
)(unsigned long port
, void *addr
, u32 count
);
559 void (*OUTSL
)(unsigned long port
, void *addr
, u32 count
);
561 u8 (*INB
)(unsigned long port
);
562 u16 (*INW
)(unsigned long port
);
563 void (*INSW
)(unsigned long port
, void *addr
, u32 count
);
564 void (*INSL
)(unsigned long port
, void *addr
, u32 count
);
566 /* dma physical region descriptor table (cpu view) */
567 unsigned int *dmatable_cpu
;
568 /* dma physical region descriptor table (dma view) */
569 dma_addr_t dmatable_dma
;
570 /* Scatter-gather list used to build the above */
571 struct scatterlist
*sg_table
;
572 int sg_max_nents
; /* Maximum number of entries in it */
573 int sg_nents
; /* Current number of entries in it */
574 int sg_dma_direction
; /* dma transfer direction */
576 /* data phase of the active command (currently only valid for PIO/DMA) */
581 struct scatterlist
*cursg
;
582 unsigned int cursg_ofs
;
584 int rqsize
; /* max sectors per request */
585 int irq
; /* our irq number */
587 unsigned long dma_base
; /* base addr for dma ports */
588 unsigned long dma_command
; /* dma command register */
589 unsigned long dma_vendor1
; /* dma vendor 1 register */
590 unsigned long dma_status
; /* dma status register */
591 unsigned long dma_vendor3
; /* dma vendor 3 register */
592 unsigned long dma_prdtable
; /* actual prd table address */
594 unsigned long config_data
; /* for use by chipset-specific code */
595 unsigned long select_data
; /* for use by chipset-specific code */
597 unsigned long extra_base
; /* extra addr for dma ports */
598 unsigned extra_ports
; /* number of extra dma ports */
600 unsigned noprobe
: 1; /* don't probe for this interface */
601 unsigned present
: 1; /* this interface exists */
602 unsigned hold
: 1; /* this interface is always present */
603 unsigned serialized
: 1; /* serialized all channel operation */
604 unsigned sharing_irq
: 1; /* 1 = sharing irq with another hwif */
605 unsigned reset
: 1; /* reset after probe */
606 unsigned auto_poll
: 1; /* supports nop auto-poll */
607 unsigned sg_mapped
: 1; /* sg_table and sg_nents are ready */
608 unsigned no_io_32bit
: 1; /* 1 = can not do 32-bit IO ops */
609 unsigned mmio
: 1; /* host uses MMIO */
611 struct device gendev
;
612 struct completion gendev_rel_comp
; /* To deal with device release() */
614 void *hwif_data
; /* extra hwif data */
618 #ifdef CONFIG_BLK_DEV_IDEACPI
619 struct ide_acpi_hwif_link
*acpidata
;
621 } ____cacheline_internodealigned_in_smp ide_hwif_t
;
624 * internal ide interrupt handler type
626 typedef ide_startstop_t (ide_handler_t
)(ide_drive_t
*);
627 typedef int (ide_expiry_t
)(ide_drive_t
*);
629 typedef struct hwgroup_s
{
630 /* irq handler, if active */
631 ide_startstop_t (*handler
)(ide_drive_t
*);
632 /* irq handler, suspended if active */
633 ide_startstop_t (*handler_save
)(ide_drive_t
*);
634 /* BOOL: protects all fields below */
636 /* BOOL: wake us up on timer expiry */
637 unsigned int sleeping
: 1;
638 /* BOOL: polling active & poll_timeout field valid */
639 unsigned int polling
: 1;
640 /* BOOL: in a polling reset situation. Must not trigger another reset yet */
641 unsigned int resetting
: 1;
645 /* ptr to current hwif in linked-list */
648 /* for pci chipsets */
649 struct pci_dev
*pci_dev
;
651 /* current request */
654 struct timer_list timer
;
655 /* local copy of current write rq */
657 /* timeout value during long polls */
658 unsigned long poll_timeout
;
659 /* queried upon timeouts */
660 int (*expiry
)(ide_drive_t
*);
661 /* ide_system_bus_speed */
666 unsigned char cmd_buf
[4];
669 typedef struct ide_driver_s ide_driver_t
;
671 extern struct mutex ide_setting_mtx
;
673 int set_io_32bit(ide_drive_t
*, int);
674 int set_pio_mode(ide_drive_t
*, int);
675 int set_using_dma(ide_drive_t
*, int);
677 #ifdef CONFIG_IDE_PROC_FS
679 * configurable drive settings
686 #define SETTING_READ (1 << 0)
687 #define SETTING_WRITE (1 << 1)
688 #define SETTING_RW (SETTING_READ | SETTING_WRITE)
690 typedef int (ide_procset_t
)(ide_drive_t
*, int);
691 typedef struct ide_settings_s
{
702 struct ide_settings_s
*next
;
705 int ide_add_setting(ide_drive_t
*, const char *, int, int, int, int, int, int, void *, ide_procset_t
*set
);
708 * /proc/ide interface
713 read_proc_t
*read_proc
;
714 write_proc_t
*write_proc
;
717 void proc_ide_create(void);
718 void proc_ide_destroy(void);
719 void ide_proc_register_port(ide_hwif_t
*);
720 void ide_proc_unregister_port(ide_hwif_t
*);
721 void ide_proc_register_driver(ide_drive_t
*, ide_driver_t
*);
722 void ide_proc_unregister_driver(ide_drive_t
*, ide_driver_t
*);
724 void ide_add_generic_settings(ide_drive_t
*);
726 read_proc_t proc_ide_read_capacity
;
727 read_proc_t proc_ide_read_geometry
;
729 #ifdef CONFIG_BLK_DEV_IDEPCI
730 void ide_pci_create_host_proc(const char *, get_info_t
*);
734 * Standard exit stuff:
736 #define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) \
745 *start = page + off; \
749 static inline void proc_ide_create(void) { ; }
750 static inline void proc_ide_destroy(void) { ; }
751 static inline void ide_proc_register_port(ide_hwif_t
*hwif
) { ; }
752 static inline void ide_proc_unregister_port(ide_hwif_t
*hwif
) { ; }
753 static inline void ide_proc_register_driver(ide_drive_t
*drive
, ide_driver_t
*driver
) { ; }
754 static inline void ide_proc_unregister_driver(ide_drive_t
*drive
, ide_driver_t
*driver
) { ; }
755 static inline void ide_add_generic_settings(ide_drive_t
*drive
) { ; }
756 #define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) return 0;
760 * Power Management step value (rq->pm->pm_step).
762 * The step value starts at 0 (ide_pm_state_start_suspend) for a
763 * suspend operation or 1000 (ide_pm_state_start_resume) for a
766 * For each step, the core calls the subdriver start_power_step() first.
768 * - ide_stopped : In this case, the core calls us back again unless
769 * step have been set to ide_power_state_completed.
770 * - ide_started : In this case, the channel is left busy until an
771 * async event (interrupt) occurs.
772 * Typically, start_power_step() will issue a taskfile request with
775 * Upon reception of the interrupt, the core will call complete_power_step()
776 * with the error code if any. This routine should update the step value
777 * and return. It should not start a new request. The core will call
778 * start_power_step for the new step value, unless step have been set to
779 * ide_power_state_completed.
781 * Subdrivers are expected to define their own additional power
782 * steps from 1..999 for suspend and from 1001..1999 for resume,
783 * other values are reserved for future use.
787 ide_pm_state_completed
= -1,
788 ide_pm_state_start_suspend
= 0,
789 ide_pm_state_start_resume
= 1000,
793 * Subdrivers support.
795 * The gendriver.owner field should be set to the module owner of this driver.
796 * The gendriver.name field should be set to the name of this driver
798 struct ide_driver_s
{
801 unsigned supports_dsc_overlap
: 1;
802 ide_startstop_t (*do_request
)(ide_drive_t
*, struct request
*, sector_t
);
803 int (*end_request
)(ide_drive_t
*, int, int);
804 ide_startstop_t (*error
)(ide_drive_t
*, struct request
*rq
, u8
, u8
);
805 ide_startstop_t (*abort
)(ide_drive_t
*, struct request
*rq
);
806 struct device_driver gen_driver
;
807 int (*probe
)(ide_drive_t
*);
808 void (*remove
)(ide_drive_t
*);
809 void (*resume
)(ide_drive_t
*);
810 void (*shutdown
)(ide_drive_t
*);
811 #ifdef CONFIG_IDE_PROC_FS
812 ide_proc_entry_t
*proc
;
816 #define to_ide_driver(drv) container_of(drv, ide_driver_t, gen_driver)
818 int generic_ide_ioctl(ide_drive_t
*, struct file
*, struct block_device
*, unsigned, unsigned long);
821 * ide_hwifs[] is the master data structure used to keep track
822 * of just about everything in ide.c. Whenever possible, routines
823 * should be using pointers to a drive (ide_drive_t *) or
824 * pointers to a hwif (ide_hwif_t *), rather than indexing this
825 * structure directly (the allocation/layout may change!).
829 extern ide_hwif_t ide_hwifs
[]; /* master data repository */
831 extern int noautodma
;
833 extern int ide_end_request (ide_drive_t
*drive
, int uptodate
, int nrsecs
);
834 int ide_end_dequeued_request(ide_drive_t
*drive
, struct request
*rq
,
835 int uptodate
, int nr_sectors
);
837 extern void ide_set_handler (ide_drive_t
*drive
, ide_handler_t
*handler
, unsigned int timeout
, ide_expiry_t
*expiry
);
839 void ide_execute_command(ide_drive_t
*, u8
, ide_handler_t
*, unsigned int,
842 ide_startstop_t
__ide_error(ide_drive_t
*, struct request
*, u8
, u8
);
844 ide_startstop_t
ide_error (ide_drive_t
*drive
, const char *msg
, byte stat
);
846 ide_startstop_t
__ide_abort(ide_drive_t
*, struct request
*);
848 extern ide_startstop_t
ide_abort(ide_drive_t
*, const char *);
850 extern void ide_fix_driveid(struct hd_driveid
*);
852 extern void ide_fixstring(u8
*, const int, const int);
854 int ide_wait_stat(ide_startstop_t
*, ide_drive_t
*, u8
, u8
, unsigned long);
856 extern ide_startstop_t
ide_do_reset (ide_drive_t
*);
858 extern void ide_init_drive_cmd (struct request
*rq
);
861 * "action" parameter type for ide_do_drive_cmd() below.
864 ide_wait
, /* insert rq at end of list, and wait for it */
865 ide_preempt
, /* insert rq in front of current request */
866 ide_head_wait
, /* insert rq in front of current request and wait for it */
867 ide_end
/* insert rq at end of list, but don't wait for it */
870 extern int ide_do_drive_cmd(ide_drive_t
*, struct request
*, ide_action_t
);
872 extern void ide_end_drive_cmd(ide_drive_t
*, u8
, u8
);
875 * Issue ATA command and wait for completion.
876 * Use for implementing commands in kernel
878 * (ide_drive_t *drive, u8 cmd, u8 nsect, u8 feature, u8 sectors, u8 *buf)
880 extern int ide_wait_cmd(ide_drive_t
*, u8
, u8
, u8
, u8
, u8
*);
883 IDE_TFLAG_LBA48
= (1 << 0),
884 IDE_TFLAG_NO_SELECT_MASK
= (1 << 1),
885 IDE_TFLAG_FLAGGED
= (1 << 2),
886 IDE_TFLAG_OUT_DATA
= (1 << 3),
887 IDE_TFLAG_OUT_HOB_FEATURE
= (1 << 4),
888 IDE_TFLAG_OUT_HOB_NSECT
= (1 << 5),
889 IDE_TFLAG_OUT_HOB_LBAL
= (1 << 6),
890 IDE_TFLAG_OUT_HOB_LBAM
= (1 << 7),
891 IDE_TFLAG_OUT_HOB_LBAH
= (1 << 8),
892 IDE_TFLAG_OUT_HOB
= IDE_TFLAG_OUT_HOB_FEATURE
|
893 IDE_TFLAG_OUT_HOB_NSECT
|
894 IDE_TFLAG_OUT_HOB_LBAL
|
895 IDE_TFLAG_OUT_HOB_LBAM
|
896 IDE_TFLAG_OUT_HOB_LBAH
,
897 IDE_TFLAG_OUT_FEATURE
= (1 << 9),
898 IDE_TFLAG_OUT_NSECT
= (1 << 10),
899 IDE_TFLAG_OUT_LBAL
= (1 << 11),
900 IDE_TFLAG_OUT_LBAM
= (1 << 12),
901 IDE_TFLAG_OUT_LBAH
= (1 << 13),
902 IDE_TFLAG_OUT_TF
= IDE_TFLAG_OUT_FEATURE
|
903 IDE_TFLAG_OUT_NSECT
|
907 IDE_TFLAG_OUT_DEVICE
= (1 << 14),
908 IDE_TFLAG_WRITE
= (1 << 15),
909 IDE_TFLAG_FLAGGED_SET_IN_FLAGS
= (1 << 16),
910 IDE_TFLAG_IN_DATA
= (1 << 17),
911 IDE_TFLAG_CUSTOM_HANDLER
= (1 << 18),
912 IDE_TFLAG_DMA_PIO_FALLBACK
= (1 << 19),
913 IDE_TFLAG_IN_HOB_FEATURE
= (1 << 20),
914 IDE_TFLAG_IN_HOB_NSECT
= (1 << 21),
915 IDE_TFLAG_IN_HOB_LBAL
= (1 << 22),
916 IDE_TFLAG_IN_HOB_LBAM
= (1 << 23),
917 IDE_TFLAG_IN_HOB_LBAH
= (1 << 24),
918 IDE_TFLAG_IN_HOB_LBA
= IDE_TFLAG_IN_HOB_LBAL
|
919 IDE_TFLAG_IN_HOB_LBAM
|
920 IDE_TFLAG_IN_HOB_LBAH
,
921 IDE_TFLAG_IN_HOB
= IDE_TFLAG_IN_HOB_FEATURE
|
922 IDE_TFLAG_IN_HOB_NSECT
|
923 IDE_TFLAG_IN_HOB_LBA
,
924 IDE_TFLAG_IN_NSECT
= (1 << 25),
925 IDE_TFLAG_IN_LBAL
= (1 << 26),
926 IDE_TFLAG_IN_LBAM
= (1 << 27),
927 IDE_TFLAG_IN_LBAH
= (1 << 28),
928 IDE_TFLAG_IN_LBA
= IDE_TFLAG_IN_LBAL
|
931 IDE_TFLAG_IN_TF
= IDE_TFLAG_IN_NSECT
|
933 IDE_TFLAG_IN_DEVICE
= (1 << 29),
936 struct ide_taskfile
{
937 u8 hob_data
; /* 0: high data byte (for TASKFILE IOCTL) */
939 u8 hob_feature
; /* 1-5: additional data to support LBA48 */
945 u8 data
; /* 6: low data byte (for TASKFILE IOCTL) */
948 u8 error
; /* read: error */
949 u8 feature
; /* write: feature */
952 u8 nsect
; /* 8: number of sectors */
953 u8 lbal
; /* 9: LBA low */
954 u8 lbam
; /* 10: LBA mid */
955 u8 lbah
; /* 11: LBA high */
957 u8 device
; /* 12: device select */
960 u8 status
; /*  read: status  */
961 u8 command
; /* write: command */
965 typedef struct ide_task_s
{
967 struct ide_taskfile tf
;
972 struct request
*rq
; /* copy of request */
973 void *special
; /* valid_t generally */
976 void ide_tf_load(ide_drive_t
*, ide_task_t
*);
977 void ide_tf_read(ide_drive_t
*, ide_task_t
*);
979 extern void SELECT_DRIVE(ide_drive_t
*);
980 extern void SELECT_MASK(ide_drive_t
*, int);
982 extern int drive_is_ready(ide_drive_t
*);
984 void ide_pktcmd_tf_load(ide_drive_t
*, u32
, u16
, u8
);
986 ide_startstop_t
do_rw_taskfile(ide_drive_t
*, ide_task_t
*);
988 int ide_raw_taskfile(ide_drive_t
*, ide_task_t
*, u8
*, u16
);
989 int ide_no_data_taskfile(ide_drive_t
*, ide_task_t
*);
991 int ide_taskfile_ioctl(ide_drive_t
*, unsigned int, unsigned long);
992 int ide_cmd_ioctl(ide_drive_t
*, unsigned int, unsigned long);
993 int ide_task_ioctl(ide_drive_t
*, unsigned int, unsigned long);
995 extern int system_bus_clock(void);
997 extern int ide_driveid_update(ide_drive_t
*);
998 extern int ide_ata66_check(ide_drive_t
*, ide_task_t
*);
999 extern int ide_config_drive_speed(ide_drive_t
*, u8
);
1000 extern u8
eighty_ninty_three (ide_drive_t
*);
1001 extern int set_transfer(ide_drive_t
*, ide_task_t
*);
1002 extern int taskfile_lib_get_identify(ide_drive_t
*drive
, u8
*);
1004 extern int ide_wait_not_busy(ide_hwif_t
*hwif
, unsigned long timeout
);
1006 extern void ide_stall_queue(ide_drive_t
*drive
, unsigned long timeout
);
1008 extern int ide_spin_wait_hwgroup(ide_drive_t
*);
1009 extern void ide_timer_expiry(unsigned long);
1010 extern irqreturn_t
ide_intr(int irq
, void *dev_id
);
1011 extern void do_ide_request(struct request_queue
*);
1013 void ide_init_disk(struct gendisk
*, ide_drive_t
*);
1015 #ifdef CONFIG_IDEPCI_PCIBUS_ORDER
1016 extern void ide_scan_pcibus(int scan_direction
) __init
;
1017 extern int __ide_pci_register_driver(struct pci_driver
*driver
, struct module
*owner
, const char *mod_name
);
1018 #define ide_pci_register_driver(d) __ide_pci_register_driver(d, THIS_MODULE, KBUILD_MODNAME)
1020 #define ide_pci_register_driver(d) pci_register_driver(d)
1023 void ide_pci_setup_ports(struct pci_dev
*, const struct ide_port_info
*, int, u8
*);
1024 void ide_setup_pci_noise(struct pci_dev
*, const struct ide_port_info
*);
1026 extern void default_hwif_iops(ide_hwif_t
*);
1027 extern void default_hwif_mmiops(ide_hwif_t
*);
1028 extern void default_hwif_transport(ide_hwif_t
*);
1030 typedef struct ide_pci_enablebit_s
{
1031 u8 reg
; /* byte pci reg holding the enable-bit */
1032 u8 mask
; /* mask to isolate the enable-bit */
1033 u8 val
; /* value of masked reg when "enabled" */
1034 } ide_pci_enablebit_t
;
1037 /* Uses ISA control ports not PCI ones. */
1038 IDE_HFLAG_ISA_PORTS
= (1 << 0),
1039 /* single port device */
1040 IDE_HFLAG_SINGLE
= (1 << 1),
1041 /* don't use legacy PIO blacklist */
1042 IDE_HFLAG_PIO_NO_BLACKLIST
= (1 << 2),
1043 /* don't use conservative PIO "downgrade" */
1044 IDE_HFLAG_PIO_NO_DOWNGRADE
= (1 << 3),
1045 /* use PIO8/9 for prefetch off/on */
1046 IDE_HFLAG_ABUSE_PREFETCH
= (1 << 4),
1047 /* use PIO6/7 for fast-devsel off/on */
1048 IDE_HFLAG_ABUSE_FAST_DEVSEL
= (1 << 5),
1049 /* use 100-102 and 200-202 PIO values to set DMA modes */
1050 IDE_HFLAG_ABUSE_DMA_MODES
= (1 << 6),
1052 * keep DMA setting when programming PIO mode, may be used only
1053 * for hosts which have separate PIO and DMA timings (ie. PMAC)
1055 IDE_HFLAG_SET_PIO_MODE_KEEP_DMA
= (1 << 7),
1056 /* program host for the transfer mode after programming device */
1057 IDE_HFLAG_POST_SET_MODE
= (1 << 8),
1058 /* don't program host/device for the transfer mode ("smart" hosts) */
1059 IDE_HFLAG_NO_SET_MODE
= (1 << 9),
1060 /* trust BIOS for programming chipset/device for DMA */
1061 IDE_HFLAG_TRUST_BIOS_FOR_DMA
= (1 << 10),
1062 /* host uses VDMA */
1063 IDE_HFLAG_VDMA
= (1 << 11),
1064 /* ATAPI DMA is unsupported */
1065 IDE_HFLAG_NO_ATAPI_DMA
= (1 << 12),
1066 /* set if host is a "bootable" controller */
1067 IDE_HFLAG_BOOTABLE
= (1 << 13),
1068 /* host doesn't support DMA */
1069 IDE_HFLAG_NO_DMA
= (1 << 14),
1070 /* check if host is PCI IDE device before allowing DMA */
1071 IDE_HFLAG_NO_AUTODMA
= (1 << 15),
1072 /* host is CS5510/CS5520 */
1073 IDE_HFLAG_CS5520
= (1 << 16),
1075 IDE_HFLAG_NO_LBA48
= (1 << 17),
1077 IDE_HFLAG_NO_LBA48_DMA
= (1 << 18),
1078 /* data FIFO is cleared by an error */
1079 IDE_HFLAG_ERROR_STOPS_FIFO
= (1 << 19),
1080 /* serialize ports */
1081 IDE_HFLAG_SERIALIZE
= (1 << 20),
1082 /* use legacy IRQs */
1083 IDE_HFLAG_LEGACY_IRQS
= (1 << 21),
1084 /* force use of legacy IRQs */
1085 IDE_HFLAG_FORCE_LEGACY_IRQS
= (1 << 22),
1086 /* limit LBA48 requests to 256 sectors */
1087 IDE_HFLAG_RQSIZE_256
= (1 << 23),
1088 /* use 32-bit I/O ops */
1089 IDE_HFLAG_IO_32BIT
= (1 << 24),
1091 IDE_HFLAG_UNMASK_IRQS
= (1 << 25),
1092 IDE_HFLAG_ABUSE_SET_DMA_MODE
= (1 << 26),
1093 /* host is CY82C693 */
1094 IDE_HFLAG_CY82C693
= (1 << 27),
1097 #ifdef CONFIG_BLK_DEV_OFFBOARD
1098 # define IDE_HFLAG_OFF_BOARD IDE_HFLAG_BOOTABLE
1100 # define IDE_HFLAG_OFF_BOARD 0
1103 struct ide_port_info
{
1105 unsigned int (*init_chipset
)(struct pci_dev
*, const char *);
1106 void (*init_iops
)(ide_hwif_t
*);
1107 void (*init_hwif
)(ide_hwif_t
*);
1108 void (*init_dma
)(ide_hwif_t
*, unsigned long);
1109 ide_pci_enablebit_t enablebits
[2];
1110 hwif_chipset_t chipset
;
1119 int ide_setup_pci_device(struct pci_dev
*, const struct ide_port_info
*);
1120 int ide_setup_pci_devices(struct pci_dev
*, struct pci_dev
*, const struct ide_port_info
*);
1122 void ide_map_sg(ide_drive_t
*, struct request
*);
1123 void ide_init_sg_cmd(ide_drive_t
*, struct request
*);
1125 #define BAD_DMA_DRIVE 0
1126 #define GOOD_DMA_DRIVE 1
1128 struct drive_list_entry
{
1129 const char *id_model
;
1130 const char *id_firmware
;
1133 int ide_in_drive_list(struct hd_driveid
*, const struct drive_list_entry
*);
1135 #ifdef CONFIG_BLK_DEV_IDEDMA
1136 int __ide_dma_bad_drive(ide_drive_t
*);
1137 int ide_id_dma_bug(ide_drive_t
*);
1139 u8
ide_find_dma_mode(ide_drive_t
*, u8
);
1141 static inline u8
ide_max_dma_mode(ide_drive_t
*drive
)
1143 return ide_find_dma_mode(drive
, XFER_UDMA_6
);
1146 void ide_dma_off_quietly(ide_drive_t
*);
1147 void ide_dma_off(ide_drive_t
*);
1148 void ide_dma_on(ide_drive_t
*);
1149 int ide_set_dma(ide_drive_t
*);
1150 ide_startstop_t
ide_dma_intr(ide_drive_t
*);
1152 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
1153 extern int ide_build_sglist(ide_drive_t
*, struct request
*);
1154 extern int ide_build_dmatable(ide_drive_t
*, struct request
*);
1155 extern void ide_destroy_dmatable(ide_drive_t
*);
1156 extern int ide_release_dma(ide_hwif_t
*);
1157 extern void ide_setup_dma(ide_hwif_t
*, unsigned long, unsigned int);
1159 void ide_dma_host_set(ide_drive_t
*, int);
1160 extern int ide_dma_setup(ide_drive_t
*);
1161 extern void ide_dma_start(ide_drive_t
*);
1162 extern int __ide_dma_end(ide_drive_t
*);
1163 extern void ide_dma_lost_irq(ide_drive_t
*);
1164 extern void ide_dma_timeout(ide_drive_t
*);
1165 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
1168 static inline int ide_id_dma_bug(ide_drive_t
*drive
) { return 0; }
1169 static inline u8
ide_find_dma_mode(ide_drive_t
*drive
, u8 speed
) { return 0; }
1170 static inline u8
ide_max_dma_mode(ide_drive_t
*drive
) { return 0; }
1171 static inline void ide_dma_off_quietly(ide_drive_t
*drive
) { ; }
1172 static inline void ide_dma_off(ide_drive_t
*drive
) { ; }
1173 static inline void ide_dma_on(ide_drive_t
*drive
) { ; }
1174 static inline void ide_dma_verbose(ide_drive_t
*drive
) { ; }
1175 static inline int ide_set_dma(ide_drive_t
*drive
) { return 1; }
1176 #endif /* CONFIG_BLK_DEV_IDEDMA */
1178 #ifndef CONFIG_BLK_DEV_IDEDMA_PCI
1179 static inline void ide_release_dma(ide_hwif_t
*drive
) {;}
1182 #ifdef CONFIG_BLK_DEV_IDEACPI
1183 extern int ide_acpi_exec_tfs(ide_drive_t
*drive
);
1184 extern void ide_acpi_get_timing(ide_hwif_t
*hwif
);
1185 extern void ide_acpi_push_timing(ide_hwif_t
*hwif
);
1186 extern void ide_acpi_init(ide_hwif_t
*hwif
);
1187 extern void ide_acpi_set_state(ide_hwif_t
*hwif
, int on
);
1189 static inline int ide_acpi_exec_tfs(ide_drive_t
*drive
) { return 0; }
1190 static inline void ide_acpi_get_timing(ide_hwif_t
*hwif
) { ; }
1191 static inline void ide_acpi_push_timing(ide_hwif_t
*hwif
) { ; }
1192 static inline void ide_acpi_init(ide_hwif_t
*hwif
) { ; }
1193 static inline void ide_acpi_set_state(ide_hwif_t
*hwif
, int on
) {}
1196 extern int ide_hwif_request_regions(ide_hwif_t
*hwif
);
1197 extern void ide_hwif_release_regions(ide_hwif_t
* hwif
);
1198 extern void ide_unregister (unsigned int index
);
1200 void ide_register_region(struct gendisk
*);
1201 void ide_unregister_region(struct gendisk
*);
1203 void ide_undecoded_slave(ide_drive_t
*);
1205 int ide_device_add_all(u8
*idx
);
1206 int ide_device_add(u8 idx
[4]);
1208 static inline void *ide_get_hwifdata (ide_hwif_t
* hwif
)
1210 return hwif
->hwif_data
;
1213 static inline void ide_set_hwifdata (ide_hwif_t
* hwif
, void *data
)
1215 hwif
->hwif_data
= data
;
1218 const char *ide_xfer_verbose(u8 mode
);
1219 extern void ide_toggle_bounce(ide_drive_t
*drive
, int on
);
1220 extern int ide_set_xfer_rate(ide_drive_t
*drive
, u8 rate
);
1222 static inline int ide_dev_has_iordy(struct hd_driveid
*id
)
1224 return ((id
->field_valid
& 2) && (id
->capability
& 8)) ? 1 : 0;
1227 static inline int ide_dev_is_sata(struct hd_driveid
*id
)
1230 * See if word 93 is 0 AND drive is at least ATA-5 compatible
1231 * verifying that word 80 by casting it to a signed type --
1232 * this trick allows us to filter out the reserved values of
1233 * 0x0000 and 0xffff along with the earlier ATA revisions...
1235 if (id
->hw_config
== 0 && (short)id
->major_rev_num
>= 0x0020)
1240 u64
ide_get_lba_addr(struct ide_taskfile
*, int);
1241 u8
ide_dump_status(ide_drive_t
*, const char *, u8
);
1243 typedef struct ide_pio_timings_s
{
1244 int setup_time
; /* Address setup (ns) minimum */
1245 int active_time
; /* Active pulse (ns) minimum */
1246 int cycle_time
; /* Cycle time (ns) minimum = */
1247 /* active + recovery (+ setup for some chips) */
1248 } ide_pio_timings_t
;
1250 unsigned int ide_pio_cycle_time(ide_drive_t
*, u8
);
1251 u8
ide_get_best_pio_mode(ide_drive_t
*, u8
, u8
);
1252 extern const ide_pio_timings_t ide_pio_timings
[6];
1254 int ide_set_pio_mode(ide_drive_t
*, u8
);
1255 int ide_set_dma_mode(ide_drive_t
*, u8
);
1257 void ide_set_pio(ide_drive_t
*, u8
);
1259 static inline void ide_set_max_pio(ide_drive_t
*drive
)
1261 ide_set_pio(drive
, 255);
1264 extern spinlock_t ide_lock
;
1265 extern struct mutex ide_cfg_mtx
;
1267 * Structure locking:
1269 * ide_cfg_mtx and ide_lock together protect changes to
1270 * ide_hwif_t->{next,hwgroup}
1273 * ide_hwgroup_t->busy: ide_lock
1274 * ide_hwgroup_t->hwif: ide_lock
1275 * ide_hwif_t->mate: constant, no locking
1276 * ide_drive_t->hwif: constant, no locking
1279 #define local_irq_set(flags) do { local_save_flags((flags)); local_irq_enable_in_hardirq(); } while (0)
1281 extern struct bus_type ide_bus_type
;
1283 /* check if CACHE FLUSH (EXT) command is supported (bits defined in ATA-6) */
1284 #define ide_id_has_flush_cache(id) ((id)->cfs_enable_2 & 0x3000)
1286 /* some Maxtor disks have bit 13 defined incorrectly so check bit 10 too */
1287 #define ide_id_has_flush_cache_ext(id) \
1288 (((id)->cfs_enable_2 & 0x2400) == 0x2400)
1290 static inline int hwif_to_node(ide_hwif_t
*hwif
)
1292 struct pci_dev
*dev
= hwif
->pci_dev
;
1293 return dev
? pcibus_to_node(dev
->bus
) : -1;
1296 static inline ide_drive_t
*ide_get_paired_drive(ide_drive_t
*drive
)
1298 ide_hwif_t
*hwif
= HWIF(drive
);
1300 return &hwif
->drives
[(drive
->dn
^ 1) & 1];