include/linux/io-pgtable.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 #ifndef __IO_PGTABLE_H
   3 #define __IO_PGTABLE_H
   4 #include <linux/bitops.h>
   5
   6 /*
   7  * Public API for use by IOMMU drivers
   8  */
   9 enum io_pgtable_fmt {
  10         ARM_32_LPAE_S1,
  11         ARM_32_LPAE_S2,
  12         ARM_64_LPAE_S1,
  13         ARM_64_LPAE_S2,
  14         ARM_V7S,
  15         ARM_MALI_LPAE,
  16         IO_PGTABLE_NUM_FMTS,
  17 };
  18
  19 /**
  20  * struct iommu_gather_ops - IOMMU callbacks for TLB and page table management.
  21  *
  22  * @tlb_flush_all: Synchronously invalidate the entire TLB context.
  23  * @tlb_add_flush: Queue up a TLB invalidation for a virtual address range.
  24  * @tlb_sync:      Ensure any queued TLB invalidation has taken effect, and
  25  *                 any corresponding page table updates are visible to the
  26  *                 IOMMU.
  27  *
  28  * Note that these can all be called in atomic context and must therefore
  29  * not block.
  30  */
  31 struct iommu_gather_ops {
  32         void (*tlb_flush_all)(void *cookie);
  33         void (*tlb_add_flush)(unsigned long iova, size_t size, size_t granule,
  34                               bool leaf, void *cookie);
  35         void (*tlb_sync)(void *cookie);
  36 };
  37
  38 /**
  39  * struct io_pgtable_cfg - Configuration data for a set of page tables.
  40  *
  41  * @quirks:        A bitmap of hardware quirks that require some special
  42  *                 action by the low-level page table allocator.
  43  * @pgsize_bitmap: A bitmap of page sizes supported by this set of page
  44  *                 tables.
  45  * @ias:           Input address (iova) size, in bits.
  46  * @oas:           Output address (paddr) size, in bits.
  47  * @coherent_walk  A flag to indicate whether or not page table walks made
  48  *                 by the IOMMU are coherent with the CPU caches.
  49  * @tlb:           TLB management callbacks for this set of tables.
  50  * @iommu_dev:     The device representing the DMA configuration for the
  51  *                 page table walker.
  52  */
  53 struct io_pgtable_cfg {
  54         /*
  55          * IO_PGTABLE_QUIRK_ARM_NS: (ARM formats) Set NS and NSTABLE bits in
  56          *      stage 1 PTEs, for hardware which insists on validating them
  57          *      even in non-secure state where they should normally be ignored.
  58          *
  59          * IO_PGTABLE_QUIRK_NO_PERMS: Ignore the IOMMU_READ, IOMMU_WRITE and
  60          *      IOMMU_NOEXEC flags and map everything with full access, for
  61          *      hardware which does not implement the permissions of a given
  62          *      format, and/or requires some format-specific default value.
  63          *
  64          * IO_PGTABLE_QUIRK_TLBI_ON_MAP: If the format forbids caching invalid
  65          *      (unmapped) entries but the hardware might do so anyway, perform
  66          *      TLB maintenance when mapping as well as when unmapping.
  67          *
  68          * IO_PGTABLE_QUIRK_ARM_MTK_4GB: (ARM v7s format) Set bit 9 in all
  69          *      PTEs, for Mediatek IOMMUs which treat it as a 33rd address bit
  70          *      when the SoC is in "4GB mode" and they can only access the high
  71          *      remap of DRAM (0x1_00000000 to 0x1_ffffffff).
  72          *
  73          * IO_PGTABLE_QUIRK_NON_STRICT: Skip issuing synchronous leaf TLBIs
  74          *      on unmap, for DMA domains using the flush queue mechanism for
  75          *      delayed invalidation.
  76          */
  77         #define IO_PGTABLE_QUIRK_ARM_NS         BIT(0)
  78         #define IO_PGTABLE_QUIRK_NO_PERMS       BIT(1)
  79         #define IO_PGTABLE_QUIRK_TLBI_ON_MAP    BIT(2)
  80         #define IO_PGTABLE_QUIRK_ARM_MTK_4GB    BIT(3)
  81         #define IO_PGTABLE_QUIRK_NON_STRICT     BIT(4)
  82         unsigned long                   quirks;
  83         unsigned long                   pgsize_bitmap;
  84         unsigned int                    ias;
  85         unsigned int                    oas;
  86         bool                            coherent_walk;
  87         const struct iommu_gather_ops   *tlb;
  88         struct device                   *iommu_dev;
  89
  90         /* Low-level data specific to the table format */
  91         union {
  92                 struct {
  93                         u64     ttbr[2];
  94                         u64     tcr;
  95                         u64     mair[2];
  96                 } arm_lpae_s1_cfg;
  97
  98                 struct {
  99                         u64     vttbr;
 100                         u64     vtcr;
 101                 } arm_lpae_s2_cfg;
 102
 103                 struct {
 104                         u32     ttbr[2];
 105                         u32     tcr;
 106                         u32     nmrr;
 107                         u32     prrr;
 108                 } arm_v7s_cfg;
 109
 110                 struct {
 111                         u64     transtab;
 112                         u64     memattr;
 113                 } arm_mali_lpae_cfg;
 114         };
 115 };
 116
 117 /**
 118  * struct io_pgtable_ops - Page table manipulation API for IOMMU drivers.
 119  *
 120  * @map:          Map a physically contiguous memory region.
 121  * @unmap:        Unmap a physically contiguous memory region.
 122  * @iova_to_phys: Translate iova to physical address.
 123  *
 124  * These functions map directly onto the iommu_ops member functions with
 125  * the same names.
 126  */
 127 struct io_pgtable_ops {
 128         int (*map)(struct io_pgtable_ops *ops, unsigned long iova,
 129                    phys_addr_t paddr, size_t size, int prot);
 130         size_t (*unmap)(struct io_pgtable_ops *ops, unsigned long iova,
 131                         size_t size);
 132         phys_addr_t (*iova_to_phys)(struct io_pgtable_ops *ops,
 133                                     unsigned long iova);
 134 };
 135
 136 /**
 137  * alloc_io_pgtable_ops() - Allocate a page table allocator for use by an IOMMU.
 138  *
 139  * @fmt:    The page table format.
 140  * @cfg:    The page table configuration. This will be modified to represent
 141  *          the configuration actually provided by the allocator (e.g. the
 142  *          pgsize_bitmap may be restricted).
 143  * @cookie: An opaque token provided by the IOMMU driver and passed back to
 144  *          the callback routines in cfg->tlb.
 145  */
 146 struct io_pgtable_ops *alloc_io_pgtable_ops(enum io_pgtable_fmt fmt,
 147                                             struct io_pgtable_cfg *cfg,
 148                                             void *cookie);
 149
 150 /**
 151  * free_io_pgtable_ops() - Free an io_pgtable_ops structure. The caller
 152  *                         *must* ensure that the page table is no longer
 153  *                         live, but the TLB can be dirty.
 154  *
 155  * @ops: The ops returned from alloc_io_pgtable_ops.
 156  */
 157 void free_io_pgtable_ops(struct io_pgtable_ops *ops);
 158
 159
 160 /*
 161  * Internal structures for page table allocator implementations.
 162  */
 163
 164 /**
 165  * struct io_pgtable - Internal structure describing a set of page tables.
 166  *
 167  * @fmt:    The page table format.
 168  * @cookie: An opaque token provided by the IOMMU driver and passed back to
 169  *          any callback routines.
 170  * @cfg:    A copy of the page table configuration.
 171  * @ops:    The page table operations in use for this set of page tables.
 172  */
 173 struct io_pgtable {
 174         enum io_pgtable_fmt     fmt;
 175         void                    *cookie;
 176         struct io_pgtable_cfg   cfg;
 177         struct io_pgtable_ops   ops;
 178 };
 179
 180 #define io_pgtable_ops_to_pgtable(x) container_of((x), struct io_pgtable, ops)
 181
 182 static inline void io_pgtable_tlb_flush_all(struct io_pgtable *iop)
 183 {
 184         iop->cfg.tlb->tlb_flush_all(iop->cookie);
 185 }
 186
 187 static inline void io_pgtable_tlb_add_flush(struct io_pgtable *iop,
 188                 unsigned long iova, size_t size, size_t granule, bool leaf)
 189 {
 190         iop->cfg.tlb->tlb_add_flush(iova, size, granule, leaf, iop->cookie);
 191 }
 192
 193 static inline void io_pgtable_tlb_sync(struct io_pgtable *iop)
 194 {
 195         iop->cfg.tlb->tlb_sync(iop->cookie);
 196 }
 197
 198 /**
 199  * struct io_pgtable_init_fns - Alloc/free a set of page tables for a
 200  *                              particular format.
 201  *
 202  * @alloc: Allocate a set of page tables described by cfg.
 203  * @free:  Free the page tables associated with iop.
 204  */
 205 struct io_pgtable_init_fns {
 206         struct io_pgtable *(*alloc)(struct io_pgtable_cfg *cfg, void *cookie);
 207         void (*free)(struct io_pgtable *iop);
 208 };
 209
 210 extern struct io_pgtable_init_fns io_pgtable_arm_32_lpae_s1_init_fns;
 211 extern struct io_pgtable_init_fns io_pgtable_arm_32_lpae_s2_init_fns;
 212 extern struct io_pgtable_init_fns io_pgtable_arm_64_lpae_s1_init_fns;
 213 extern struct io_pgtable_init_fns io_pgtable_arm_64_lpae_s2_init_fns;
 214 extern struct io_pgtable_init_fns io_pgtable_arm_v7s_init_fns;
 215 extern struct io_pgtable_init_fns io_pgtable_arm_mali_lpae_init_fns;
 216
 217 #endif /* __IO_PGTABLE_H */