5 * Please do not include this file in generic code. There is currently
6 * no requirement for any architecture to implement anything held
12 #include <linux/smp.h>
16 #include <linux/linkage.h>
17 #include <linux/cache.h>
18 #include <linux/spinlock.h>
19 #include <linux/cpumask.h>
20 #include <linux/gfp.h>
21 #include <linux/irqreturn.h>
22 #include <linux/irqnr.h>
23 #include <linux/errno.h>
24 #include <linux/topology.h>
25 #include <linux/wait.h>
28 #include <asm/ptrace.h>
29 #include <asm/irq_regs.h>
35 typedef void (*irq_flow_handler_t
)(unsigned int irq
,
36 struct irq_desc
*desc
);
37 typedef void (*irq_preflow_handler_t
)(struct irq_data
*data
);
42 * Bits 0-7 are the same as the IRQF_* bits in linux/interrupt.h
44 * IRQ_TYPE_NONE - default, unspecified type
45 * IRQ_TYPE_EDGE_RISING - rising edge triggered
46 * IRQ_TYPE_EDGE_FALLING - falling edge triggered
47 * IRQ_TYPE_EDGE_BOTH - rising and falling edge triggered
48 * IRQ_TYPE_LEVEL_HIGH - high level triggered
49 * IRQ_TYPE_LEVEL_LOW - low level triggered
50 * IRQ_TYPE_LEVEL_MASK - Mask to filter out the level bits
51 * IRQ_TYPE_SENSE_MASK - Mask for all the above bits
52 * IRQ_TYPE_DEFAULT - For use by some PICs to ask irq_set_type
53 * to setup the HW to a sane default (used
54 * by irqdomain map() callbacks to synchronize
55 * the HW state and SW flags for a newly
56 * allocated descriptor).
58 * IRQ_TYPE_PROBE - Special flag for probing in progress
60 * Bits which can be modified via irq_set/clear/modify_status_flags()
61 * IRQ_LEVEL - Interrupt is level type. Will be also
62 * updated in the code when the above trigger
63 * bits are modified via irq_set_irq_type()
64 * IRQ_PER_CPU - Mark an interrupt PER_CPU. Will protect
65 * it from affinity setting
66 * IRQ_NOPROBE - Interrupt cannot be probed by autoprobing
67 * IRQ_NOREQUEST - Interrupt cannot be requested via
69 * IRQ_NOTHREAD - Interrupt cannot be threaded
70 * IRQ_NOAUTOEN - Interrupt is not automatically enabled in
72 * IRQ_NO_BALANCING - Interrupt cannot be balanced (affinity set)
73 * IRQ_MOVE_PCNTXT - Interrupt can be migrated from process context
74 * IRQ_NESTED_TRHEAD - Interrupt nests into another thread
75 * IRQ_PER_CPU_DEVID - Dev_id is a per-cpu variable
78 IRQ_TYPE_NONE
= 0x00000000,
79 IRQ_TYPE_EDGE_RISING
= 0x00000001,
80 IRQ_TYPE_EDGE_FALLING
= 0x00000002,
81 IRQ_TYPE_EDGE_BOTH
= (IRQ_TYPE_EDGE_FALLING
| IRQ_TYPE_EDGE_RISING
),
82 IRQ_TYPE_LEVEL_HIGH
= 0x00000004,
83 IRQ_TYPE_LEVEL_LOW
= 0x00000008,
84 IRQ_TYPE_LEVEL_MASK
= (IRQ_TYPE_LEVEL_LOW
| IRQ_TYPE_LEVEL_HIGH
),
85 IRQ_TYPE_SENSE_MASK
= 0x0000000f,
86 IRQ_TYPE_DEFAULT
= IRQ_TYPE_SENSE_MASK
,
88 IRQ_TYPE_PROBE
= 0x00000010,
91 IRQ_PER_CPU
= (1 << 9),
92 IRQ_NOPROBE
= (1 << 10),
93 IRQ_NOREQUEST
= (1 << 11),
94 IRQ_NOAUTOEN
= (1 << 12),
95 IRQ_NO_BALANCING
= (1 << 13),
96 IRQ_MOVE_PCNTXT
= (1 << 14),
97 IRQ_NESTED_THREAD
= (1 << 15),
98 IRQ_NOTHREAD
= (1 << 16),
99 IRQ_PER_CPU_DEVID
= (1 << 17),
102 #define IRQF_MODIFY_MASK \
103 (IRQ_TYPE_SENSE_MASK | IRQ_NOPROBE | IRQ_NOREQUEST | \
104 IRQ_NOAUTOEN | IRQ_MOVE_PCNTXT | IRQ_LEVEL | IRQ_NO_BALANCING | \
105 IRQ_PER_CPU | IRQ_NESTED_THREAD | IRQ_NOTHREAD | IRQ_PER_CPU_DEVID)
107 #define IRQ_NO_BALANCING_MASK (IRQ_PER_CPU | IRQ_NO_BALANCING)
110 * Return value for chip->irq_set_affinity()
112 * IRQ_SET_MASK_OK - OK, core updates irq_data.affinity
113 * IRQ_SET_MASK_NOCPY - OK, chip did update irq_data.affinity
117 IRQ_SET_MASK_OK_NOCOPY
,
124 * struct irq_data - per irq and irq chip data passed down to chip functions
125 * @irq: interrupt number
126 * @hwirq: hardware interrupt number, local to the interrupt domain
127 * @node: node index useful for balancing
128 * @state_use_accessors: status information for irq chip functions.
129 * Use accessor functions to deal with it
130 * @chip: low level interrupt hardware access
131 * @domain: Interrupt translation domain; responsible for mapping
132 * between hwirq number and linux irq number.
133 * @handler_data: per-IRQ data for the irq_chip methods
134 * @chip_data: platform-specific per-chip private data for the chip
135 * methods, to allow shared chip implementations
136 * @msi_desc: MSI descriptor
137 * @affinity: IRQ affinity on SMP
139 * The fields here need to overlay the ones in irq_desc until we
140 * cleaned up the direct references and switched everything over to
147 unsigned int state_use_accessors
;
148 struct irq_chip
*chip
;
149 struct irq_domain
*domain
;
152 struct msi_desc
*msi_desc
;
153 cpumask_var_t affinity
;
157 * Bit masks for irq_data.state
159 * IRQD_TRIGGER_MASK - Mask for the trigger type bits
160 * IRQD_SETAFFINITY_PENDING - Affinity setting is pending
161 * IRQD_NO_BALANCING - Balancing disabled for this IRQ
162 * IRQD_PER_CPU - Interrupt is per cpu
163 * IRQD_AFFINITY_SET - Interrupt affinity was set
164 * IRQD_LEVEL - Interrupt is level triggered
165 * IRQD_WAKEUP_STATE - Interrupt is configured for wakeup
167 * IRDQ_MOVE_PCNTXT - Interrupt can be moved in process
169 * IRQD_IRQ_DISABLED - Disabled state of the interrupt
170 * IRQD_IRQ_MASKED - Masked state of the interrupt
171 * IRQD_IRQ_INPROGRESS - In progress state of the interrupt
174 IRQD_TRIGGER_MASK
= 0xf,
175 IRQD_SETAFFINITY_PENDING
= (1 << 8),
176 IRQD_NO_BALANCING
= (1 << 10),
177 IRQD_PER_CPU
= (1 << 11),
178 IRQD_AFFINITY_SET
= (1 << 12),
179 IRQD_LEVEL
= (1 << 13),
180 IRQD_WAKEUP_STATE
= (1 << 14),
181 IRQD_MOVE_PCNTXT
= (1 << 15),
182 IRQD_IRQ_DISABLED
= (1 << 16),
183 IRQD_IRQ_MASKED
= (1 << 17),
184 IRQD_IRQ_INPROGRESS
= (1 << 18),
187 static inline bool irqd_is_setaffinity_pending(struct irq_data
*d
)
189 return d
->state_use_accessors
& IRQD_SETAFFINITY_PENDING
;
192 static inline bool irqd_is_per_cpu(struct irq_data
*d
)
194 return d
->state_use_accessors
& IRQD_PER_CPU
;
197 static inline bool irqd_can_balance(struct irq_data
*d
)
199 return !(d
->state_use_accessors
& (IRQD_PER_CPU
| IRQD_NO_BALANCING
));
202 static inline bool irqd_affinity_was_set(struct irq_data
*d
)
204 return d
->state_use_accessors
& IRQD_AFFINITY_SET
;
207 static inline void irqd_mark_affinity_was_set(struct irq_data
*d
)
209 d
->state_use_accessors
|= IRQD_AFFINITY_SET
;
212 static inline u32
irqd_get_trigger_type(struct irq_data
*d
)
214 return d
->state_use_accessors
& IRQD_TRIGGER_MASK
;
218 * Must only be called inside irq_chip.irq_set_type() functions.
220 static inline void irqd_set_trigger_type(struct irq_data
*d
, u32 type
)
222 d
->state_use_accessors
&= ~IRQD_TRIGGER_MASK
;
223 d
->state_use_accessors
|= type
& IRQD_TRIGGER_MASK
;
226 static inline bool irqd_is_level_type(struct irq_data
*d
)
228 return d
->state_use_accessors
& IRQD_LEVEL
;
231 static inline bool irqd_is_wakeup_set(struct irq_data
*d
)
233 return d
->state_use_accessors
& IRQD_WAKEUP_STATE
;
236 static inline bool irqd_can_move_in_process_context(struct irq_data
*d
)
238 return d
->state_use_accessors
& IRQD_MOVE_PCNTXT
;
241 static inline bool irqd_irq_disabled(struct irq_data
*d
)
243 return d
->state_use_accessors
& IRQD_IRQ_DISABLED
;
246 static inline bool irqd_irq_masked(struct irq_data
*d
)
248 return d
->state_use_accessors
& IRQD_IRQ_MASKED
;
251 static inline bool irqd_irq_inprogress(struct irq_data
*d
)
253 return d
->state_use_accessors
& IRQD_IRQ_INPROGRESS
;
257 * Functions for chained handlers which can be enabled/disabled by the
258 * standard disable_irq/enable_irq calls. Must be called with
259 * irq_desc->lock held.
261 static inline void irqd_set_chained_irq_inprogress(struct irq_data
*d
)
263 d
->state_use_accessors
|= IRQD_IRQ_INPROGRESS
;
266 static inline void irqd_clr_chained_irq_inprogress(struct irq_data
*d
)
268 d
->state_use_accessors
&= ~IRQD_IRQ_INPROGRESS
;
271 static inline irq_hw_number_t
irqd_to_hwirq(struct irq_data
*d
)
277 * struct irq_chip - hardware interrupt chip descriptor
279 * @name: name for /proc/interrupts
280 * @irq_startup: start up the interrupt (defaults to ->enable if NULL)
281 * @irq_shutdown: shut down the interrupt (defaults to ->disable if NULL)
282 * @irq_enable: enable the interrupt (defaults to chip->unmask if NULL)
283 * @irq_disable: disable the interrupt
284 * @irq_ack: start of a new interrupt
285 * @irq_mask: mask an interrupt source
286 * @irq_mask_ack: ack and mask an interrupt source
287 * @irq_unmask: unmask an interrupt source
288 * @irq_eoi: end of interrupt
289 * @irq_set_affinity: set the CPU affinity on SMP machines
290 * @irq_retrigger: resend an IRQ to the CPU
291 * @irq_set_type: set the flow type (IRQ_TYPE_LEVEL/etc.) of an IRQ
292 * @irq_set_wake: enable/disable power-management wake-on of an IRQ
293 * @irq_bus_lock: function to lock access to slow bus (i2c) chips
294 * @irq_bus_sync_unlock:function to sync and unlock slow bus (i2c) chips
295 * @irq_cpu_online: configure an interrupt source for a secondary CPU
296 * @irq_cpu_offline: un-configure an interrupt source for a secondary CPU
297 * @irq_suspend: function called from core code on suspend once per chip
298 * @irq_resume: function called from core code on resume once per chip
299 * @irq_pm_shutdown: function called from core code on shutdown once per chip
300 * @irq_print_chip: optional to print special chip info in show_interrupts
301 * @flags: chip specific flags
305 unsigned int (*irq_startup
)(struct irq_data
*data
);
306 void (*irq_shutdown
)(struct irq_data
*data
);
307 void (*irq_enable
)(struct irq_data
*data
);
308 void (*irq_disable
)(struct irq_data
*data
);
310 void (*irq_ack
)(struct irq_data
*data
);
311 void (*irq_mask
)(struct irq_data
*data
);
312 void (*irq_mask_ack
)(struct irq_data
*data
);
313 void (*irq_unmask
)(struct irq_data
*data
);
314 void (*irq_eoi
)(struct irq_data
*data
);
316 int (*irq_set_affinity
)(struct irq_data
*data
, const struct cpumask
*dest
, bool force
);
317 int (*irq_retrigger
)(struct irq_data
*data
);
318 int (*irq_set_type
)(struct irq_data
*data
, unsigned int flow_type
);
319 int (*irq_set_wake
)(struct irq_data
*data
, unsigned int on
);
321 void (*irq_bus_lock
)(struct irq_data
*data
);
322 void (*irq_bus_sync_unlock
)(struct irq_data
*data
);
324 void (*irq_cpu_online
)(struct irq_data
*data
);
325 void (*irq_cpu_offline
)(struct irq_data
*data
);
327 void (*irq_suspend
)(struct irq_data
*data
);
328 void (*irq_resume
)(struct irq_data
*data
);
329 void (*irq_pm_shutdown
)(struct irq_data
*data
);
331 void (*irq_print_chip
)(struct irq_data
*data
, struct seq_file
*p
);
337 * irq_chip specific flags
339 * IRQCHIP_SET_TYPE_MASKED: Mask before calling chip.irq_set_type()
340 * IRQCHIP_EOI_IF_HANDLED: Only issue irq_eoi() when irq was handled
341 * IRQCHIP_MASK_ON_SUSPEND: Mask non wake irqs in the suspend path
342 * IRQCHIP_ONOFFLINE_ENABLED: Only call irq_on/off_line callbacks
344 * IRQCHIP_SKIP_SET_WAKE: Skip chip.irq_set_wake(), for this irq chip
347 IRQCHIP_SET_TYPE_MASKED
= (1 << 0),
348 IRQCHIP_EOI_IF_HANDLED
= (1 << 1),
349 IRQCHIP_MASK_ON_SUSPEND
= (1 << 2),
350 IRQCHIP_ONOFFLINE_ENABLED
= (1 << 3),
351 IRQCHIP_SKIP_SET_WAKE
= (1 << 4),
354 /* This include will go away once we isolated irq_desc usage to core code */
355 #include <linux/irqdesc.h>
358 * Pick up the arch-dependent methods:
360 #include <asm/hw_irq.h>
362 #ifndef NR_IRQS_LEGACY
363 # define NR_IRQS_LEGACY 0
366 #ifndef ARCH_IRQ_INIT_FLAGS
367 # define ARCH_IRQ_INIT_FLAGS 0
370 #define IRQ_DEFAULT_INIT_FLAGS ARCH_IRQ_INIT_FLAGS
373 extern int setup_irq(unsigned int irq
, struct irqaction
*new);
374 extern void remove_irq(unsigned int irq
, struct irqaction
*act
);
375 extern int setup_percpu_irq(unsigned int irq
, struct irqaction
*new);
376 extern void remove_percpu_irq(unsigned int irq
, struct irqaction
*act
);
378 extern void irq_cpu_online(void);
379 extern void irq_cpu_offline(void);
380 extern int __irq_set_affinity_locked(struct irq_data
*data
, const struct cpumask
*cpumask
);
382 #ifdef CONFIG_GENERIC_HARDIRQS
384 #if defined(CONFIG_SMP) && defined(CONFIG_GENERIC_PENDING_IRQ)
385 void irq_move_irq(struct irq_data
*data
);
386 void irq_move_masked_irq(struct irq_data
*data
);
388 static inline void irq_move_irq(struct irq_data
*data
) { }
389 static inline void irq_move_masked_irq(struct irq_data
*data
) { }
392 extern int no_irq_affinity
;
395 * Built-in IRQ handlers for various IRQ types,
396 * callable via desc->handle_irq()
398 extern void handle_level_irq(unsigned int irq
, struct irq_desc
*desc
);
399 extern void handle_fasteoi_irq(unsigned int irq
, struct irq_desc
*desc
);
400 extern void handle_edge_irq(unsigned int irq
, struct irq_desc
*desc
);
401 extern void handle_edge_eoi_irq(unsigned int irq
, struct irq_desc
*desc
);
402 extern void handle_simple_irq(unsigned int irq
, struct irq_desc
*desc
);
403 extern void handle_percpu_irq(unsigned int irq
, struct irq_desc
*desc
);
404 extern void handle_percpu_devid_irq(unsigned int irq
, struct irq_desc
*desc
);
405 extern void handle_bad_irq(unsigned int irq
, struct irq_desc
*desc
);
406 extern void handle_nested_irq(unsigned int irq
);
408 /* Handling of unhandled and spurious interrupts: */
409 extern void note_interrupt(unsigned int irq
, struct irq_desc
*desc
,
410 irqreturn_t action_ret
);
413 /* Enable/disable irq debugging output: */
414 extern int noirqdebug_setup(char *str
);
416 /* Checks whether the interrupt can be requested by request_irq(): */
417 extern int can_request_irq(unsigned int irq
, unsigned long irqflags
);
419 /* Dummy irq-chip implementations: */
420 extern struct irq_chip no_irq_chip
;
421 extern struct irq_chip dummy_irq_chip
;
424 irq_set_chip_and_handler_name(unsigned int irq
, struct irq_chip
*chip
,
425 irq_flow_handler_t handle
, const char *name
);
427 static inline void irq_set_chip_and_handler(unsigned int irq
, struct irq_chip
*chip
,
428 irq_flow_handler_t handle
)
430 irq_set_chip_and_handler_name(irq
, chip
, handle
, NULL
);
433 extern int irq_set_percpu_devid(unsigned int irq
);
436 __irq_set_handler(unsigned int irq
, irq_flow_handler_t handle
, int is_chained
,
440 irq_set_handler(unsigned int irq
, irq_flow_handler_t handle
)
442 __irq_set_handler(irq
, handle
, 0, NULL
);
446 * Set a highlevel chained flow handler for a given IRQ.
447 * (a chained handler is automatically enabled and set to
448 * IRQ_NOREQUEST, IRQ_NOPROBE, and IRQ_NOTHREAD)
451 irq_set_chained_handler(unsigned int irq
, irq_flow_handler_t handle
)
453 __irq_set_handler(irq
, handle
, 1, NULL
);
456 void irq_modify_status(unsigned int irq
, unsigned long clr
, unsigned long set
);
458 static inline void irq_set_status_flags(unsigned int irq
, unsigned long set
)
460 irq_modify_status(irq
, 0, set
);
463 static inline void irq_clear_status_flags(unsigned int irq
, unsigned long clr
)
465 irq_modify_status(irq
, clr
, 0);
468 static inline void irq_set_noprobe(unsigned int irq
)
470 irq_modify_status(irq
, 0, IRQ_NOPROBE
);
473 static inline void irq_set_probe(unsigned int irq
)
475 irq_modify_status(irq
, IRQ_NOPROBE
, 0);
478 static inline void irq_set_nothread(unsigned int irq
)
480 irq_modify_status(irq
, 0, IRQ_NOTHREAD
);
483 static inline void irq_set_thread(unsigned int irq
)
485 irq_modify_status(irq
, IRQ_NOTHREAD
, 0);
488 static inline void irq_set_nested_thread(unsigned int irq
, bool nest
)
491 irq_set_status_flags(irq
, IRQ_NESTED_THREAD
);
493 irq_clear_status_flags(irq
, IRQ_NESTED_THREAD
);
496 static inline void irq_set_percpu_devid_flags(unsigned int irq
)
498 irq_set_status_flags(irq
,
499 IRQ_NOAUTOEN
| IRQ_PER_CPU
| IRQ_NOTHREAD
|
500 IRQ_NOPROBE
| IRQ_PER_CPU_DEVID
);
503 /* Handle dynamic irq creation and destruction */
504 extern unsigned int create_irq_nr(unsigned int irq_want
, int node
);
505 extern int create_irq(void);
506 extern void destroy_irq(unsigned int irq
);
509 * Dynamic irq helper functions. Obsolete. Use irq_alloc_desc* and
510 * irq_free_desc instead.
512 extern void dynamic_irq_cleanup(unsigned int irq
);
513 static inline void dynamic_irq_init(unsigned int irq
)
515 dynamic_irq_cleanup(irq
);
518 /* Set/get chip/data for an IRQ: */
519 extern int irq_set_chip(unsigned int irq
, struct irq_chip
*chip
);
520 extern int irq_set_handler_data(unsigned int irq
, void *data
);
521 extern int irq_set_chip_data(unsigned int irq
, void *data
);
522 extern int irq_set_irq_type(unsigned int irq
, unsigned int type
);
523 extern int irq_set_msi_desc(unsigned int irq
, struct msi_desc
*entry
);
524 extern struct irq_data
*irq_get_irq_data(unsigned int irq
);
526 static inline struct irq_chip
*irq_get_chip(unsigned int irq
)
528 struct irq_data
*d
= irq_get_irq_data(irq
);
529 return d
? d
->chip
: NULL
;
532 static inline struct irq_chip
*irq_data_get_irq_chip(struct irq_data
*d
)
537 static inline void *irq_get_chip_data(unsigned int irq
)
539 struct irq_data
*d
= irq_get_irq_data(irq
);
540 return d
? d
->chip_data
: NULL
;
543 static inline void *irq_data_get_irq_chip_data(struct irq_data
*d
)
548 static inline void *irq_get_handler_data(unsigned int irq
)
550 struct irq_data
*d
= irq_get_irq_data(irq
);
551 return d
? d
->handler_data
: NULL
;
554 static inline void *irq_data_get_irq_handler_data(struct irq_data
*d
)
556 return d
->handler_data
;
559 static inline struct msi_desc
*irq_get_msi_desc(unsigned int irq
)
561 struct irq_data
*d
= irq_get_irq_data(irq
);
562 return d
? d
->msi_desc
: NULL
;
565 static inline struct msi_desc
*irq_data_get_msi(struct irq_data
*d
)
570 int __irq_alloc_descs(int irq
, unsigned int from
, unsigned int cnt
, int node
,
571 struct module
*owner
);
573 /* use macros to avoid needing export.h for THIS_MODULE */
574 #define irq_alloc_descs(irq, from, cnt, node) \
575 __irq_alloc_descs(irq, from, cnt, node, THIS_MODULE)
577 #define irq_alloc_desc(node) \
578 irq_alloc_descs(-1, 0, 1, node)
580 #define irq_alloc_desc_at(at, node) \
581 irq_alloc_descs(at, at, 1, node)
583 #define irq_alloc_desc_from(from, node) \
584 irq_alloc_descs(-1, from, 1, node)
586 void irq_free_descs(unsigned int irq
, unsigned int cnt
);
587 int irq_reserve_irqs(unsigned int from
, unsigned int cnt
);
589 static inline void irq_free_desc(unsigned int irq
)
591 irq_free_descs(irq
, 1);
594 static inline int irq_reserve_irq(unsigned int irq
)
596 return irq_reserve_irqs(irq
, 1);
599 #ifndef irq_reg_writel
600 # define irq_reg_writel(val, addr) writel(val, addr)
602 #ifndef irq_reg_readl
603 # define irq_reg_readl(addr) readl(addr)
607 * struct irq_chip_regs - register offsets for struct irq_gci
608 * @enable: Enable register offset to reg_base
609 * @disable: Disable register offset to reg_base
610 * @mask: Mask register offset to reg_base
611 * @ack: Ack register offset to reg_base
612 * @eoi: Eoi register offset to reg_base
613 * @type: Type configuration register offset to reg_base
614 * @polarity: Polarity configuration register offset to reg_base
616 struct irq_chip_regs
{
617 unsigned long enable
;
618 unsigned long disable
;
623 unsigned long polarity
;
627 * struct irq_chip_type - Generic interrupt chip instance for a flow type
628 * @chip: The real interrupt chip which provides the callbacks
629 * @regs: Register offsets for this chip
630 * @handler: Flow handler associated with this chip
631 * @type: Chip can handle these flow types
633 * A irq_generic_chip can have several instances of irq_chip_type when
634 * it requires different functions and register offsets for different
637 struct irq_chip_type
{
638 struct irq_chip chip
;
639 struct irq_chip_regs regs
;
640 irq_flow_handler_t handler
;
645 * struct irq_chip_generic - Generic irq chip data structure
646 * @lock: Lock to protect register and cache data access
647 * @reg_base: Register base address (virtual)
648 * @irq_base: Interrupt base nr for this chip
649 * @irq_cnt: Number of interrupts handled by this chip
650 * @mask_cache: Cached mask register
651 * @type_cache: Cached type register
652 * @polarity_cache: Cached polarity register
653 * @wake_enabled: Interrupt can wakeup from suspend
654 * @wake_active: Interrupt is marked as an wakeup from suspend source
655 * @num_ct: Number of available irq_chip_type instances (usually 1)
656 * @private: Private data for non generic chip callbacks
657 * @list: List head for keeping track of instances
658 * @chip_types: Array of interrupt irq_chip_types
660 * Note, that irq_chip_generic can have multiple irq_chip_type
661 * implementations which can be associated to a particular irq line of
662 * an irq_chip_generic instance. That allows to share and protect
663 * state in an irq_chip_generic instance when we need to implement
664 * different flow mechanisms (level/edge) for it.
666 struct irq_chip_generic
{
668 void __iomem
*reg_base
;
669 unsigned int irq_base
;
670 unsigned int irq_cnt
;
678 struct list_head list
;
679 struct irq_chip_type chip_types
[0];
683 * enum irq_gc_flags - Initialization flags for generic irq chips
684 * @IRQ_GC_INIT_MASK_CACHE: Initialize the mask_cache by reading mask reg
685 * @IRQ_GC_INIT_NESTED_LOCK: Set the lock class of the irqs to nested for
686 * irq chips which need to call irq_set_wake() on
687 * the parent irq. Usually GPIO implementations
690 IRQ_GC_INIT_MASK_CACHE
= 1 << 0,
691 IRQ_GC_INIT_NESTED_LOCK
= 1 << 1,
694 /* Generic chip callback functions */
695 void irq_gc_noop(struct irq_data
*d
);
696 void irq_gc_mask_disable_reg(struct irq_data
*d
);
697 void irq_gc_mask_set_bit(struct irq_data
*d
);
698 void irq_gc_mask_clr_bit(struct irq_data
*d
);
699 void irq_gc_unmask_enable_reg(struct irq_data
*d
);
700 void irq_gc_ack_set_bit(struct irq_data
*d
);
701 void irq_gc_ack_clr_bit(struct irq_data
*d
);
702 void irq_gc_mask_disable_reg_and_ack(struct irq_data
*d
);
703 void irq_gc_eoi(struct irq_data
*d
);
704 int irq_gc_set_wake(struct irq_data
*d
, unsigned int on
);
706 /* Setup functions for irq_chip_generic */
707 struct irq_chip_generic
*
708 irq_alloc_generic_chip(const char *name
, int nr_ct
, unsigned int irq_base
,
709 void __iomem
*reg_base
, irq_flow_handler_t handler
);
710 void irq_setup_generic_chip(struct irq_chip_generic
*gc
, u32 msk
,
711 enum irq_gc_flags flags
, unsigned int clr
,
713 int irq_setup_alt_chip(struct irq_data
*d
, unsigned int type
);
714 void irq_remove_generic_chip(struct irq_chip_generic
*gc
, u32 msk
,
715 unsigned int clr
, unsigned int set
);
717 static inline struct irq_chip_type
*irq_data_get_chip_type(struct irq_data
*d
)
719 return container_of(d
->chip
, struct irq_chip_type
, chip
);
722 #define IRQ_MSK(n) (u32)((n) < 32 ? ((1 << (n)) - 1) : UINT_MAX)
725 static inline void irq_gc_lock(struct irq_chip_generic
*gc
)
727 raw_spin_lock(&gc
->lock
);
730 static inline void irq_gc_unlock(struct irq_chip_generic
*gc
)
732 raw_spin_unlock(&gc
->lock
);
735 static inline void irq_gc_lock(struct irq_chip_generic
*gc
) { }
736 static inline void irq_gc_unlock(struct irq_chip_generic
*gc
) { }
739 #endif /* CONFIG_GENERIC_HARDIRQS */
741 #endif /* !CONFIG_S390 */
743 #endif /* _LINUX_IRQ_H */