include/linux/mfd/rk808.h

   1 /*
   2  * Register definitions for Rockchip's RK808/RK818 PMIC
   3  *
   4  * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
   5  *
   6  * Author: Chris Zhong <zyw@rock-chips.com>
   7  * Author: Zhang Qing <zhangqing@rock-chips.com>
   8  *
   9  * Copyright (C) 2016 PHYTEC Messtechnik GmbH
  10  *
  11  * Author: Wadim Egorov <w.egorov@phytec.de>
  12  *
  13  * This program is free software; you can redistribute it and/or modify it
  14  * under the terms and conditions of the GNU General Public License,
  15  * version 2, as published by the Free Software Foundation.
  16  *
  17  * This program is distributed in the hope it will be useful, but WITHOUT
  18  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  19  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  20  * more details.
  21  */
  22
  23 #ifndef __LINUX_REGULATOR_RK808_H
  24 #define __LINUX_REGULATOR_RK808_H
  25
  26 #include <linux/regulator/machine.h>
  27 #include <linux/regmap.h>
  28
  29 /*
  30  * rk808 Global Register Map.
  31  */
  32
  33 #define RK808_DCDC1     0 /* (0+RK808_START) */
  34 #define RK808_LDO1      4 /* (4+RK808_START) */
  35 #define RK808_NUM_REGULATORS    14
  36
  37 enum rk808_reg {
  38         RK808_ID_DCDC1,
  39         RK808_ID_DCDC2,
  40         RK808_ID_DCDC3,
  41         RK808_ID_DCDC4,
  42         RK808_ID_LDO1,
  43         RK808_ID_LDO2,
  44         RK808_ID_LDO3,
  45         RK808_ID_LDO4,
  46         RK808_ID_LDO5,
  47         RK808_ID_LDO6,
  48         RK808_ID_LDO7,
  49         RK808_ID_LDO8,
  50         RK808_ID_SWITCH1,
  51         RK808_ID_SWITCH2,
  52 };
  53
  54 #define RK808_SECONDS_REG       0x00
  55 #define RK808_MINUTES_REG       0x01
  56 #define RK808_HOURS_REG         0x02
  57 #define RK808_DAYS_REG          0x03
  58 #define RK808_MONTHS_REG        0x04
  59 #define RK808_YEARS_REG         0x05
  60 #define RK808_WEEKS_REG         0x06
  61 #define RK808_ALARM_SECONDS_REG 0x08
  62 #define RK808_ALARM_MINUTES_REG 0x09
  63 #define RK808_ALARM_HOURS_REG   0x0a
  64 #define RK808_ALARM_DAYS_REG    0x0b
  65 #define RK808_ALARM_MONTHS_REG  0x0c
  66 #define RK808_ALARM_YEARS_REG   0x0d
  67 #define RK808_RTC_CTRL_REG      0x10
  68 #define RK808_RTC_STATUS_REG    0x11
  69 #define RK808_RTC_INT_REG       0x12
  70 #define RK808_RTC_COMP_LSB_REG  0x13
  71 #define RK808_RTC_COMP_MSB_REG  0x14
  72 #define RK808_ID_MSB            0x17
  73 #define RK808_ID_LSB            0x18
  74 #define RK808_CLK32OUT_REG      0x20
  75 #define RK808_VB_MON_REG        0x21
  76 #define RK808_THERMAL_REG       0x22
  77 #define RK808_DCDC_EN_REG       0x23
  78 #define RK808_LDO_EN_REG        0x24
  79 #define RK808_SLEEP_SET_OFF_REG1        0x25
  80 #define RK808_SLEEP_SET_OFF_REG2        0x26
  81 #define RK808_DCDC_UV_STS_REG   0x27
  82 #define RK808_DCDC_UV_ACT_REG   0x28
  83 #define RK808_LDO_UV_STS_REG    0x29
  84 #define RK808_LDO_UV_ACT_REG    0x2a
  85 #define RK808_DCDC_PG_REG       0x2b
  86 #define RK808_LDO_PG_REG        0x2c
  87 #define RK808_VOUT_MON_TDB_REG  0x2d
  88 #define RK808_BUCK1_CONFIG_REG          0x2e
  89 #define RK808_BUCK1_ON_VSEL_REG         0x2f
  90 #define RK808_BUCK1_SLP_VSEL_REG        0x30
  91 #define RK808_BUCK1_DVS_VSEL_REG        0x31
  92 #define RK808_BUCK2_CONFIG_REG          0x32
  93 #define RK808_BUCK2_ON_VSEL_REG         0x33
  94 #define RK808_BUCK2_SLP_VSEL_REG        0x34
  95 #define RK808_BUCK2_DVS_VSEL_REG        0x35
  96 #define RK808_BUCK3_CONFIG_REG          0x36
  97 #define RK808_BUCK4_CONFIG_REG          0x37
  98 #define RK808_BUCK4_ON_VSEL_REG         0x38
  99 #define RK808_BUCK4_SLP_VSEL_REG        0x39
 100 #define RK808_BOOST_CONFIG_REG          0x3a
 101 #define RK808_LDO1_ON_VSEL_REG          0x3b
 102 #define RK808_LDO1_SLP_VSEL_REG         0x3c
 103 #define RK808_LDO2_ON_VSEL_REG          0x3d
 104 #define RK808_LDO2_SLP_VSEL_REG         0x3e
 105 #define RK808_LDO3_ON_VSEL_REG          0x3f
 106 #define RK808_LDO3_SLP_VSEL_REG         0x40
 107 #define RK808_LDO4_ON_VSEL_REG          0x41
 108 #define RK808_LDO4_SLP_VSEL_REG         0x42
 109 #define RK808_LDO5_ON_VSEL_REG          0x43
 110 #define RK808_LDO5_SLP_VSEL_REG         0x44
 111 #define RK808_LDO6_ON_VSEL_REG          0x45
 112 #define RK808_LDO6_SLP_VSEL_REG         0x46
 113 #define RK808_LDO7_ON_VSEL_REG          0x47
 114 #define RK808_LDO7_SLP_VSEL_REG         0x48
 115 #define RK808_LDO8_ON_VSEL_REG          0x49
 116 #define RK808_LDO8_SLP_VSEL_REG         0x4a
 117 #define RK808_DEVCTRL_REG       0x4b
 118 #define RK808_INT_STS_REG1      0x4c
 119 #define RK808_INT_STS_MSK_REG1  0x4d
 120 #define RK808_INT_STS_REG2      0x4e
 121 #define RK808_INT_STS_MSK_REG2  0x4f
 122 #define RK808_IO_POL_REG        0x50
 123
 124 /* RK818 */
 125 #define RK818_DCDC1                     0
 126 #define RK818_LDO1                      4
 127 #define RK818_NUM_REGULATORS            17
 128
 129 enum rk818_reg {
 130         RK818_ID_DCDC1,
 131         RK818_ID_DCDC2,
 132         RK818_ID_DCDC3,
 133         RK818_ID_DCDC4,
 134         RK818_ID_BOOST,
 135         RK818_ID_LDO1,
 136         RK818_ID_LDO2,
 137         RK818_ID_LDO3,
 138         RK818_ID_LDO4,
 139         RK818_ID_LDO5,
 140         RK818_ID_LDO6,
 141         RK818_ID_LDO7,
 142         RK818_ID_LDO8,
 143         RK818_ID_LDO9,
 144         RK818_ID_SWITCH,
 145         RK818_ID_HDMI_SWITCH,
 146         RK818_ID_OTG_SWITCH,
 147 };
 148
 149 #define RK818_DCDC_EN_REG               0x23
 150 #define RK818_LDO_EN_REG                0x24
 151 #define RK818_SLEEP_SET_OFF_REG1        0x25
 152 #define RK818_SLEEP_SET_OFF_REG2        0x26
 153 #define RK818_DCDC_UV_STS_REG           0x27
 154 #define RK818_DCDC_UV_ACT_REG           0x28
 155 #define RK818_LDO_UV_STS_REG            0x29
 156 #define RK818_LDO_UV_ACT_REG            0x2a
 157 #define RK818_DCDC_PG_REG               0x2b
 158 #define RK818_LDO_PG_REG                0x2c
 159 #define RK818_VOUT_MON_TDB_REG          0x2d
 160 #define RK818_BUCK1_CONFIG_REG          0x2e
 161 #define RK818_BUCK1_ON_VSEL_REG         0x2f
 162 #define RK818_BUCK1_SLP_VSEL_REG        0x30
 163 #define RK818_BUCK2_CONFIG_REG          0x32
 164 #define RK818_BUCK2_ON_VSEL_REG         0x33
 165 #define RK818_BUCK2_SLP_VSEL_REG        0x34
 166 #define RK818_BUCK3_CONFIG_REG          0x36
 167 #define RK818_BUCK4_CONFIG_REG          0x37
 168 #define RK818_BUCK4_ON_VSEL_REG         0x38
 169 #define RK818_BUCK4_SLP_VSEL_REG        0x39
 170 #define RK818_BOOST_CONFIG_REG          0x3a
 171 #define RK818_LDO1_ON_VSEL_REG          0x3b
 172 #define RK818_LDO1_SLP_VSEL_REG         0x3c
 173 #define RK818_LDO2_ON_VSEL_REG          0x3d
 174 #define RK818_LDO2_SLP_VSEL_REG         0x3e
 175 #define RK818_LDO3_ON_VSEL_REG          0x3f
 176 #define RK818_LDO3_SLP_VSEL_REG         0x40
 177 #define RK818_LDO4_ON_VSEL_REG          0x41
 178 #define RK818_LDO4_SLP_VSEL_REG         0x42
 179 #define RK818_LDO5_ON_VSEL_REG          0x43
 180 #define RK818_LDO5_SLP_VSEL_REG         0x44
 181 #define RK818_LDO6_ON_VSEL_REG          0x45
 182 #define RK818_LDO6_SLP_VSEL_REG         0x46
 183 #define RK818_LDO7_ON_VSEL_REG          0x47
 184 #define RK818_LDO7_SLP_VSEL_REG         0x48
 185 #define RK818_LDO8_ON_VSEL_REG          0x49
 186 #define RK818_LDO8_SLP_VSEL_REG         0x4a
 187 #define RK818_BOOST_LDO9_ON_VSEL_REG    0x54
 188 #define RK818_BOOST_LDO9_SLP_VSEL_REG   0x55
 189 #define RK818_DEVCTRL_REG               0x4b
 190 #define RK818_INT_STS_REG1              0X4c
 191 #define RK818_INT_STS_MSK_REG1          0x4d
 192 #define RK818_INT_STS_REG2              0x4e
 193 #define RK818_INT_STS_MSK_REG2          0x4f
 194 #define RK818_IO_POL_REG                0x50
 195 #define RK818_H5V_EN_REG                0x52
 196 #define RK818_SLEEP_SET_OFF_REG3        0x53
 197 #define RK818_BOOST_LDO9_ON_VSEL_REG    0x54
 198 #define RK818_BOOST_LDO9_SLP_VSEL_REG   0x55
 199 #define RK818_BOOST_CTRL_REG            0x56
 200 #define RK818_DCDC_ILMAX                0x90
 201 #define RK818_USB_CTRL_REG              0xa1
 202
 203 #define RK818_H5V_EN                    BIT(0)
 204 #define RK818_REF_RDY_CTRL              BIT(1)
 205 #define RK818_USB_ILIM_SEL_MASK         0xf
 206 #define RK818_USB_ILMIN_2000MA          0x7
 207 #define RK818_USB_CHG_SD_VSEL_MASK      0x70
 208
 209 /* RK805 */
 210 enum rk805_reg {
 211         RK805_ID_DCDC1,
 212         RK805_ID_DCDC2,
 213         RK805_ID_DCDC3,
 214         RK805_ID_DCDC4,
 215         RK805_ID_LDO1,
 216         RK805_ID_LDO2,
 217         RK805_ID_LDO3,
 218 };
 219
 220 /* CONFIG REGISTER */
 221 #define RK805_VB_MON_REG                0x21
 222 #define RK805_THERMAL_REG               0x22
 223
 224 /* POWER CHANNELS ENABLE REGISTER */
 225 #define RK805_DCDC_EN_REG               0x23
 226 #define RK805_SLP_DCDC_EN_REG           0x25
 227 #define RK805_SLP_LDO_EN_REG            0x26
 228 #define RK805_LDO_EN_REG                0x27
 229
 230 /* BUCK AND LDO CONFIG REGISTER */
 231 #define RK805_BUCK_LDO_SLP_LP_EN_REG    0x2A
 232 #define RK805_BUCK1_CONFIG_REG          0x2E
 233 #define RK805_BUCK1_ON_VSEL_REG         0x2F
 234 #define RK805_BUCK1_SLP_VSEL_REG        0x30
 235 #define RK805_BUCK2_CONFIG_REG          0x32
 236 #define RK805_BUCK2_ON_VSEL_REG         0x33
 237 #define RK805_BUCK2_SLP_VSEL_REG        0x34
 238 #define RK805_BUCK3_CONFIG_REG          0x36
 239 #define RK805_BUCK4_CONFIG_REG          0x37
 240 #define RK805_BUCK4_ON_VSEL_REG         0x38
 241 #define RK805_BUCK4_SLP_VSEL_REG        0x39
 242 #define RK805_LDO1_ON_VSEL_REG          0x3B
 243 #define RK805_LDO1_SLP_VSEL_REG         0x3C
 244 #define RK805_LDO2_ON_VSEL_REG          0x3D
 245 #define RK805_LDO2_SLP_VSEL_REG         0x3E
 246 #define RK805_LDO3_ON_VSEL_REG          0x3F
 247 #define RK805_LDO3_SLP_VSEL_REG         0x40
 248
 249 /* INTERRUPT REGISTER */
 250 #define RK805_PWRON_LP_INT_TIME_REG     0x47
 251 #define RK805_PWRON_DB_REG              0x48
 252 #define RK805_DEV_CTRL_REG              0x4B
 253 #define RK805_INT_STS_REG               0x4C
 254 #define RK805_INT_STS_MSK_REG           0x4D
 255 #define RK805_GPIO_IO_POL_REG           0x50
 256 #define RK805_OUT_REG                   0x52
 257 #define RK805_ON_SOURCE_REG             0xAE
 258 #define RK805_OFF_SOURCE_REG            0xAF
 259
 260 #define RK805_NUM_REGULATORS            7
 261
 262 #define RK805_PWRON_FALL_RISE_INT_EN    0x0
 263 #define RK805_PWRON_FALL_RISE_INT_MSK   0x81
 264
 265 /* RK805 IRQ Definitions */
 266 #define RK805_IRQ_PWRON_RISE            0
 267 #define RK805_IRQ_VB_LOW                1
 268 #define RK805_IRQ_PWRON                 2
 269 #define RK805_IRQ_PWRON_LP              3
 270 #define RK805_IRQ_HOTDIE                4
 271 #define RK805_IRQ_RTC_ALARM             5
 272 #define RK805_IRQ_RTC_PERIOD            6
 273 #define RK805_IRQ_PWRON_FALL            7
 274
 275 #define RK805_IRQ_PWRON_RISE_MSK        BIT(0)
 276 #define RK805_IRQ_VB_LOW_MSK            BIT(1)
 277 #define RK805_IRQ_PWRON_MSK             BIT(2)
 278 #define RK805_IRQ_PWRON_LP_MSK          BIT(3)
 279 #define RK805_IRQ_HOTDIE_MSK            BIT(4)
 280 #define RK805_IRQ_RTC_ALARM_MSK         BIT(5)
 281 #define RK805_IRQ_RTC_PERIOD_MSK        BIT(6)
 282 #define RK805_IRQ_PWRON_FALL_MSK        BIT(7)
 283
 284 #define RK805_PWR_RISE_INT_STATUS       BIT(0)
 285 #define RK805_VB_LOW_INT_STATUS         BIT(1)
 286 #define RK805_PWRON_INT_STATUS          BIT(2)
 287 #define RK805_PWRON_LP_INT_STATUS       BIT(3)
 288 #define RK805_HOTDIE_INT_STATUS         BIT(4)
 289 #define RK805_ALARM_INT_STATUS          BIT(5)
 290 #define RK805_PERIOD_INT_STATUS         BIT(6)
 291 #define RK805_PWR_FALL_INT_STATUS       BIT(7)
 292
 293 #define RK805_BUCK1_2_ILMAX_MASK        (3 << 6)
 294 #define RK805_BUCK3_4_ILMAX_MASK        (3 << 3)
 295 #define RK805_RTC_PERIOD_INT_MASK       (1 << 6)
 296 #define RK805_RTC_ALARM_INT_MASK        (1 << 5)
 297 #define RK805_INT_ALARM_EN              (1 << 3)
 298 #define RK805_INT_TIMER_EN              (1 << 2)
 299
 300 /* RK808 IRQ Definitions */
 301 #define RK808_IRQ_VOUT_LO       0
 302 #define RK808_IRQ_VB_LO         1
 303 #define RK808_IRQ_PWRON         2
 304 #define RK808_IRQ_PWRON_LP      3
 305 #define RK808_IRQ_HOTDIE        4
 306 #define RK808_IRQ_RTC_ALARM     5
 307 #define RK808_IRQ_RTC_PERIOD    6
 308 #define RK808_IRQ_PLUG_IN_INT   7
 309 #define RK808_IRQ_PLUG_OUT_INT  8
 310 #define RK808_NUM_IRQ           9
 311
 312 #define RK808_IRQ_VOUT_LO_MSK           BIT(0)
 313 #define RK808_IRQ_VB_LO_MSK             BIT(1)
 314 #define RK808_IRQ_PWRON_MSK             BIT(2)
 315 #define RK808_IRQ_PWRON_LP_MSK          BIT(3)
 316 #define RK808_IRQ_HOTDIE_MSK            BIT(4)
 317 #define RK808_IRQ_RTC_ALARM_MSK         BIT(5)
 318 #define RK808_IRQ_RTC_PERIOD_MSK        BIT(6)
 319 #define RK808_IRQ_PLUG_IN_INT_MSK       BIT(0)
 320 #define RK808_IRQ_PLUG_OUT_INT_MSK      BIT(1)
 321
 322 /* RK818 IRQ Definitions */
 323 #define RK818_IRQ_VOUT_LO       0
 324 #define RK818_IRQ_VB_LO         1
 325 #define RK818_IRQ_PWRON         2
 326 #define RK818_IRQ_PWRON_LP      3
 327 #define RK818_IRQ_HOTDIE        4
 328 #define RK818_IRQ_RTC_ALARM     5
 329 #define RK818_IRQ_RTC_PERIOD    6
 330 #define RK818_IRQ_USB_OV        7
 331 #define RK818_IRQ_PLUG_IN       8
 332 #define RK818_IRQ_PLUG_OUT      9
 333 #define RK818_IRQ_CHG_OK        10
 334 #define RK818_IRQ_CHG_TE        11
 335 #define RK818_IRQ_CHG_TS1       12
 336 #define RK818_IRQ_TS2           13
 337 #define RK818_IRQ_CHG_CVTLIM    14
 338 #define RK818_IRQ_DISCHG_ILIM   15
 339
 340 #define RK818_IRQ_VOUT_LO_MSK           BIT(0)
 341 #define RK818_IRQ_VB_LO_MSK             BIT(1)
 342 #define RK818_IRQ_PWRON_MSK             BIT(2)
 343 #define RK818_IRQ_PWRON_LP_MSK          BIT(3)
 344 #define RK818_IRQ_HOTDIE_MSK            BIT(4)
 345 #define RK818_IRQ_RTC_ALARM_MSK         BIT(5)
 346 #define RK818_IRQ_RTC_PERIOD_MSK        BIT(6)
 347 #define RK818_IRQ_USB_OV_MSK            BIT(7)
 348 #define RK818_IRQ_PLUG_IN_MSK           BIT(0)
 349 #define RK818_IRQ_PLUG_OUT_MSK          BIT(1)
 350 #define RK818_IRQ_CHG_OK_MSK            BIT(2)
 351 #define RK818_IRQ_CHG_TE_MSK            BIT(3)
 352 #define RK818_IRQ_CHG_TS1_MSK           BIT(4)
 353 #define RK818_IRQ_TS2_MSK               BIT(5)
 354 #define RK818_IRQ_CHG_CVTLIM_MSK        BIT(6)
 355 #define RK818_IRQ_DISCHG_ILIM_MSK       BIT(7)
 356
 357 #define RK818_NUM_IRQ           16
 358
 359 #define RK808_VBAT_LOW_2V8      0x00
 360 #define RK808_VBAT_LOW_2V9      0x01
 361 #define RK808_VBAT_LOW_3V0      0x02
 362 #define RK808_VBAT_LOW_3V1      0x03
 363 #define RK808_VBAT_LOW_3V2      0x04
 364 #define RK808_VBAT_LOW_3V3      0x05
 365 #define RK808_VBAT_LOW_3V4      0x06
 366 #define RK808_VBAT_LOW_3V5      0x07
 367 #define VBAT_LOW_VOL_MASK       (0x07 << 0)
 368 #define EN_VABT_LOW_SHUT_DOWN   (0x00 << 4)
 369 #define EN_VBAT_LOW_IRQ         (0x1 << 4)
 370 #define VBAT_LOW_ACT_MASK       (0x1 << 4)
 371
 372 #define BUCK_ILMIN_MASK         (7 << 0)
 373 #define BOOST_ILMIN_MASK        (7 << 0)
 374 #define BUCK1_RATE_MASK         (3 << 3)
 375 #define BUCK2_RATE_MASK         (3 << 3)
 376 #define MASK_ALL        0xff
 377
 378 #define BUCK_UV_ACT_MASK        0x0f
 379 #define BUCK_UV_ACT_DISABLE     0
 380
 381 #define SWITCH2_EN      BIT(6)
 382 #define SWITCH1_EN      BIT(5)
 383 #define DEV_OFF_RST     BIT(3)
 384 #define DEV_OFF         BIT(0)
 385
 386 #define VB_LO_ACT               BIT(4)
 387 #define VB_LO_SEL_3500MV        (7 << 0)
 388
 389 #define VOUT_LO_INT     BIT(0)
 390 #define CLK32KOUT2_EN   BIT(0)
 391
 392 #define TEMP115C                        0x0c
 393 #define TEMP_HOTDIE_MSK                 0x0c
 394 #define SLP_SD_MSK                      (0x3 << 2)
 395 #define SHUTDOWN_FUN                    (0x2 << 2)
 396 #define SLEEP_FUN                       (0x1 << 2)
 397 #define RK8XX_ID_MSK                    0xfff0
 398 #define FPWM_MODE                       BIT(7)
 399
 400 enum {
 401         BUCK_ILMIN_50MA,
 402         BUCK_ILMIN_100MA,
 403         BUCK_ILMIN_150MA,
 404         BUCK_ILMIN_200MA,
 405         BUCK_ILMIN_250MA,
 406         BUCK_ILMIN_300MA,
 407         BUCK_ILMIN_350MA,
 408         BUCK_ILMIN_400MA,
 409 };
 410
 411 enum {
 412         BOOST_ILMIN_75MA,
 413         BOOST_ILMIN_100MA,
 414         BOOST_ILMIN_125MA,
 415         BOOST_ILMIN_150MA,
 416         BOOST_ILMIN_175MA,
 417         BOOST_ILMIN_200MA,
 418         BOOST_ILMIN_225MA,
 419         BOOST_ILMIN_250MA,
 420 };
 421
 422 enum {
 423         RK805_BUCK1_2_ILMAX_2500MA,
 424         RK805_BUCK1_2_ILMAX_3000MA,
 425         RK805_BUCK1_2_ILMAX_3500MA,
 426         RK805_BUCK1_2_ILMAX_4000MA,
 427 };
 428
 429 enum {
 430         RK805_BUCK3_ILMAX_1500MA,
 431         RK805_BUCK3_ILMAX_2000MA,
 432         RK805_BUCK3_ILMAX_2500MA,
 433         RK805_BUCK3_ILMAX_3000MA,
 434 };
 435
 436 enum {
 437         RK805_BUCK4_ILMAX_2000MA,
 438         RK805_BUCK4_ILMAX_2500MA,
 439         RK805_BUCK4_ILMAX_3000MA,
 440         RK805_BUCK4_ILMAX_3500MA,
 441 };
 442
 443 enum {
 444         RK805_ID = 0x8050,
 445         RK808_ID = 0x0000,
 446         RK818_ID = 0x8181,
 447 };
 448
 449 struct rk808 {
 450         struct i2c_client               *i2c;
 451         struct regmap_irq_chip_data     *irq_data;
 452         struct regmap                   *regmap;
 453         long                            variant;
 454         const struct regmap_config      *regmap_cfg;
 455         const struct regmap_irq_chip    *regmap_irq_chip;
 456 };
 457 #endif /* __LINUX_REGULATOR_RK808_H */