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mfd: Add STMPE I/O Expander support
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1 /*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License Terms: GNU General Public License, version 2
5 * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
6 */
7
8 #ifndef __LINUX_MFD_STMPE_H
9 #define __LINUX_MFD_STMPE_H
10
11 #include <linux/device.h>
12
13 enum stmpe_block {
14 STMPE_BLOCK_GPIO = 1 << 0,
15 STMPE_BLOCK_KEYPAD = 1 << 1,
16 STMPE_BLOCK_TOUCHSCREEN = 1 << 2,
17 STMPE_BLOCK_ADC = 1 << 3,
18 STMPE_BLOCK_PWM = 1 << 4,
19 STMPE_BLOCK_ROTATOR = 1 << 5,
20 };
21
22 enum stmpe_partnum {
23 STMPE811,
24 STMPE1601,
25 STMPE2401,
26 STMPE2403,
27 };
28
29 /*
30 * For registers whose locations differ on variants, the correct address is
31 * obtained by indexing stmpe->regs with one of the following.
32 */
33 enum {
34 STMPE_IDX_CHIP_ID,
35 STMPE_IDX_ICR_LSB,
36 STMPE_IDX_IER_LSB,
37 STMPE_IDX_ISR_MSB,
38 STMPE_IDX_GPMR_LSB,
39 STMPE_IDX_GPSR_LSB,
40 STMPE_IDX_GPCR_LSB,
41 STMPE_IDX_GPDR_LSB,
42 STMPE_IDX_GPEDR_MSB,
43 STMPE_IDX_GPRER_LSB,
44 STMPE_IDX_GPFER_LSB,
45 STMPE_IDX_GPAFR_U_MSB,
46 STMPE_IDX_IEGPIOR_LSB,
47 STMPE_IDX_ISGPIOR_MSB,
48 STMPE_IDX_MAX,
49 };
50
51
52 struct stmpe_variant_info;
53
54 /**
55 * struct stmpe - STMPE MFD structure
56 * @lock: lock protecting I/O operations
57 * @irq_lock: IRQ bus lock
58 * @dev: device, mostly for dev_dbg()
59 * @i2c: i2c client
60 * @variant: the detected STMPE model number
61 * @regs: list of addresses of registers which are at different addresses on
62 * different variants. Indexed by one of STMPE_IDX_*.
63 * @irq_base: starting IRQ number for internal IRQs
64 * @num_gpios: number of gpios, differs for variants
65 * @ier: cache of IER registers for bus_lock
66 * @oldier: cache of IER registers for bus_lock
67 * @pdata: platform data
68 */
69 struct stmpe {
70 struct mutex lock;
71 struct mutex irq_lock;
72 struct device *dev;
73 struct i2c_client *i2c;
74 enum stmpe_partnum partnum;
75 struct stmpe_variant_info *variant;
76 const u8 *regs;
77
78 int irq_base;
79 int num_gpios;
80 u8 ier[2];
81 u8 oldier[2];
82 struct stmpe_platform_data *pdata;
83 };
84
85 extern int stmpe_reg_write(struct stmpe *stmpe, u8 reg, u8 data);
86 extern int stmpe_reg_read(struct stmpe *stmpe, u8 reg);
87 extern int stmpe_block_read(struct stmpe *stmpe, u8 reg, u8 length,
88 u8 *values);
89 extern int stmpe_block_write(struct stmpe *stmpe, u8 reg, u8 length,
90 const u8 *values);
91 extern int stmpe_set_bits(struct stmpe *stmpe, u8 reg, u8 mask, u8 val);
92 extern int stmpe_set_altfunc(struct stmpe *stmpe, u32 pins,
93 enum stmpe_block block);
94 extern int stmpe_enable(struct stmpe *stmpe, unsigned int blocks);
95 extern int stmpe_disable(struct stmpe *stmpe, unsigned int blocks);
96
97 struct matrix_keymap_data;
98
99 /**
100 * struct stmpe_keypad_platform_data - STMPE keypad platform data
101 * @keymap_data: key map table and size
102 * @debounce_ms: debounce interval, in ms. Maximum is
103 * %STMPE_KEYPAD_MAX_DEBOUNCE.
104 * @scan_count: number of key scanning cycles to confirm key data.
105 * Maximum is %STMPE_KEYPAD_MAX_SCAN_COUNT.
106 * @no_autorepeat: disable key autorepeat
107 */
108 struct stmpe_keypad_platform_data {
109 struct matrix_keymap_data *keymap_data;
110 unsigned int debounce_ms;
111 unsigned int scan_count;
112 bool no_autorepeat;
113 };
114
115 /**
116 * struct stmpe_gpio_platform_data - STMPE GPIO platform data
117 * @gpio_base: first gpio number assigned. A maximum of
118 * %STMPE_NR_GPIOS GPIOs will be allocated.
119 */
120 struct stmpe_gpio_platform_data {
121 int gpio_base;
122 void (*setup)(struct stmpe *stmpe, unsigned gpio_base);
123 void (*remove)(struct stmpe *stmpe, unsigned gpio_base);
124 };
125
126 /**
127 * struct stmpe_ts_platform_data - stmpe811 touch screen controller platform
128 * data
129 * @sample_time: ADC converstion time in number of clock.
130 * (0 -> 36 clocks, 1 -> 44 clocks, 2 -> 56 clocks, 3 -> 64 clocks,
131 * 4 -> 80 clocks, 5 -> 96 clocks, 6 -> 144 clocks),
132 * recommended is 4.
133 * @mod_12b: ADC Bit mode (0 -> 10bit ADC, 1 -> 12bit ADC)
134 * @ref_sel: ADC reference source
135 * (0 -> internal reference, 1 -> external reference)
136 * @adc_freq: ADC Clock speed
137 * (0 -> 1.625 MHz, 1 -> 3.25 MHz, 2 || 3 -> 6.5 MHz)
138 * @ave_ctrl: Sample average control
139 * (0 -> 1 sample, 1 -> 2 samples, 2 -> 4 samples, 3 -> 8 samples)
140 * @touch_det_delay: Touch detect interrupt delay
141 * (0 -> 10 us, 1 -> 50 us, 2 -> 100 us, 3 -> 500 us,
142 * 4-> 1 ms, 5 -> 5 ms, 6 -> 10 ms, 7 -> 50 ms)
143 * recommended is 3
144 * @settling: Panel driver settling time
145 * (0 -> 10 us, 1 -> 100 us, 2 -> 500 us, 3 -> 1 ms,
146 * 4 -> 5 ms, 5 -> 10 ms, 6 for 50 ms, 7 -> 100 ms)
147 * recommended is 2
148 * @fraction_z: Length of the fractional part in z
149 * (fraction_z ([0..7]) = Count of the fractional part)
150 * recommended is 7
151 * @i_drive: current limit value of the touchscreen drivers
152 * (0 -> 20 mA typical 35 mA max, 1 -> 50 mA typical 80 mA max)
153 *
154 * */
155 struct stmpe_ts_platform_data {
156 u8 sample_time;
157 u8 mod_12b;
158 u8 ref_sel;
159 u8 adc_freq;
160 u8 ave_ctrl;
161 u8 touch_det_delay;
162 u8 settling;
163 u8 fraction_z;
164 u8 i_drive;
165 };
166
167 /**
168 * struct stmpe_platform_data - STMPE platform data
169 * @id: device id to distinguish between multiple STMPEs on the same board
170 * @blocks: bitmask of blocks to enable (use STMPE_BLOCK_*)
171 * @irq_trigger: IRQ trigger to use for the interrupt to the host
172 * @irq_invert_polarity: IRQ line is connected with reversed polarity
173 * @irq_base: base IRQ number. %STMPE_NR_IRQS irqs will be used, or
174 * %STMPE_NR_INTERNAL_IRQS if the GPIO driver is not used.
175 * @gpio: GPIO-specific platform data
176 * @keypad: keypad-specific platform data
177 * @ts: touchscreen-specific platform data
178 */
179 struct stmpe_platform_data {
180 int id;
181 unsigned int blocks;
182 int irq_base;
183 unsigned int irq_trigger;
184 bool irq_invert_polarity;
185
186 struct stmpe_gpio_platform_data *gpio;
187 struct stmpe_keypad_platform_data *keypad;
188 struct stmpe_ts_platform_data *ts;
189 };
190
191 #define STMPE_NR_INTERNAL_IRQS 9
192 #define STMPE_INT_GPIO(x) (STMPE_NR_INTERNAL_IRQS + (x))
193
194 #define STMPE_NR_GPIOS 24
195 #define STMPE_NR_IRQS STMPE_INT_GPIO(STMPE_NR_GPIOS)
196
197 #endif