2 * linux/include/linux/mmc/host.h
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
8 * Host driver specific definitions.
10 #ifndef LINUX_MMC_HOST_H
11 #define LINUX_MMC_HOST_H
13 #include <linux/leds.h>
14 #include <linux/mutex.h>
15 #include <linux/timer.h>
16 #include <linux/sched.h>
17 #include <linux/device.h>
18 #include <linux/fault-inject.h>
20 #include <linux/mmc/core.h>
21 #include <linux/mmc/card.h>
22 #include <linux/mmc/pm.h>
25 unsigned int clock
; /* clock rate */
28 /* vdd stores the bit number of the selected voltage range from below. */
30 unsigned char bus_mode
; /* command output mode */
32 #define MMC_BUSMODE_OPENDRAIN 1
33 #define MMC_BUSMODE_PUSHPULL 2
35 unsigned char chip_select
; /* SPI chip select */
37 #define MMC_CS_DONTCARE 0
41 unsigned char power_mode
; /* power supply mode */
43 #define MMC_POWER_OFF 0
44 #define MMC_POWER_UP 1
45 #define MMC_POWER_ON 2
46 #define MMC_POWER_UNDEFINED 3
48 unsigned char bus_width
; /* data bus width */
50 #define MMC_BUS_WIDTH_1 0
51 #define MMC_BUS_WIDTH_4 2
52 #define MMC_BUS_WIDTH_8 3
54 unsigned char timing
; /* timing specification used */
56 #define MMC_TIMING_LEGACY 0
57 #define MMC_TIMING_MMC_HS 1
58 #define MMC_TIMING_SD_HS 2
59 #define MMC_TIMING_UHS_SDR12 3
60 #define MMC_TIMING_UHS_SDR25 4
61 #define MMC_TIMING_UHS_SDR50 5
62 #define MMC_TIMING_UHS_SDR104 6
63 #define MMC_TIMING_UHS_DDR50 7
64 #define MMC_TIMING_MMC_DDR52 8
65 #define MMC_TIMING_MMC_HS200 9
66 #define MMC_TIMING_MMC_HS400 10
68 unsigned char signal_voltage
; /* signalling voltage (1.8V or 3.3V) */
70 #define MMC_SIGNAL_VOLTAGE_330 0
71 #define MMC_SIGNAL_VOLTAGE_180 1
72 #define MMC_SIGNAL_VOLTAGE_120 2
74 unsigned char drv_type
; /* driver type (A, B, C, D) */
76 #define MMC_SET_DRIVER_TYPE_B 0
77 #define MMC_SET_DRIVER_TYPE_A 1
78 #define MMC_SET_DRIVER_TYPE_C 2
79 #define MMC_SET_DRIVER_TYPE_D 3
84 * It is optional for the host to implement pre_req and post_req in
85 * order to support double buffering of requests (prepare one
86 * request while another request is active).
87 * pre_req() must always be followed by a post_req().
88 * To undo a call made to pre_req(), call post_req() with
89 * a nonzero err condition.
91 void (*post_req
)(struct mmc_host
*host
, struct mmc_request
*req
,
93 void (*pre_req
)(struct mmc_host
*host
, struct mmc_request
*req
,
95 void (*request
)(struct mmc_host
*host
, struct mmc_request
*req
);
97 * Avoid calling these three functions too often or in a "fast path",
98 * since underlaying controller might implement them in an expensive
101 * Also note that these functions might sleep, so don't call them
102 * in the atomic contexts!
104 * Return values for the get_ro callback should be:
105 * 0 for a read/write card
106 * 1 for a read-only card
107 * -ENOSYS when not supported (equal to NULL callback)
108 * or a negative errno value when something bad happened
110 * Return values for the get_cd callback should be:
111 * 0 for a absent card
112 * 1 for a present card
113 * -ENOSYS when not supported (equal to NULL callback)
114 * or a negative errno value when something bad happened
116 void (*set_ios
)(struct mmc_host
*host
, struct mmc_ios
*ios
);
117 int (*get_ro
)(struct mmc_host
*host
);
118 int (*get_cd
)(struct mmc_host
*host
);
120 void (*enable_sdio_irq
)(struct mmc_host
*host
, int enable
);
122 /* optional callback for HC quirks */
123 void (*init_card
)(struct mmc_host
*host
, struct mmc_card
*card
);
125 int (*start_signal_voltage_switch
)(struct mmc_host
*host
, struct mmc_ios
*ios
);
127 /* Check if the card is pulling dat[0:3] low */
128 int (*card_busy
)(struct mmc_host
*host
);
130 /* The tuning command opcode value is different for SD and eMMC cards */
131 int (*execute_tuning
)(struct mmc_host
*host
, u32 opcode
);
133 /* Prepare HS400 target operating frequency depending host driver */
134 int (*prepare_hs400_tuning
)(struct mmc_host
*host
, struct mmc_ios
*ios
);
135 int (*select_drive_strength
)(struct mmc_card
*card
,
136 unsigned int max_dtr
, int host_drv
,
137 int card_drv
, int *drv_type
);
138 void (*hw_reset
)(struct mmc_host
*host
);
139 void (*card_event
)(struct mmc_host
*host
);
142 * Optional callback to support controllers with HW issues for multiple
143 * I/O. Returns the number of supported blocks for the request.
145 int (*multi_io_quirk
)(struct mmc_card
*card
,
146 unsigned int direction
, int blk_size
);
152 struct mmc_async_req
{
153 /* active mmc request */
154 struct mmc_request
*mrq
;
156 * Check error status of completed mmc request.
157 * Returns 0 if success otherwise non zero.
159 int (*err_check
) (struct mmc_card
*, struct mmc_async_req
*);
163 * struct mmc_slot - MMC slot functions
165 * @cd_irq: MMC/SD-card slot hotplug detection IRQ or -EINVAL
166 * @handler_priv: MMC/SD-card slot context
168 * Some MMC/SD host controllers implement slot-functions like card and
169 * write-protect detection natively. However, a large number of controllers
170 * leave these functions to the CPU. This struct provides a hook to attach
171 * such slot-function drivers.
179 * mmc_context_info - synchronization details for mmc context
180 * @is_done_rcv wake up reason was done request
181 * @is_new_req wake up reason was new request
182 * @is_waiting_last_req mmc context waiting for single running request
184 * @lock lock to protect data fields
186 struct mmc_context_info
{
189 bool is_waiting_last_req
;
190 wait_queue_head_t wait
;
198 struct regulator
*vmmc
; /* Card power supply */
199 struct regulator
*vqmmc
; /* Optional Vccq supply */
203 struct device
*parent
;
204 struct device class_dev
;
206 const struct mmc_host_ops
*ops
;
207 struct mmc_pwrseq
*pwrseq
;
212 u32 ocr_avail_sdio
; /* SDIO-specific OCR */
213 u32 ocr_avail_sd
; /* SD-specific OCR */
214 u32 ocr_avail_mmc
; /* MMC-specific OCR */
215 struct notifier_block pm_notify
;
220 #define MMC_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */
221 #define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */
222 #define MMC_VDD_21_22 0x00000200 /* VDD voltage 2.1 ~ 2.2 */
223 #define MMC_VDD_22_23 0x00000400 /* VDD voltage 2.2 ~ 2.3 */
224 #define MMC_VDD_23_24 0x00000800 /* VDD voltage 2.3 ~ 2.4 */
225 #define MMC_VDD_24_25 0x00001000 /* VDD voltage 2.4 ~ 2.5 */
226 #define MMC_VDD_25_26 0x00002000 /* VDD voltage 2.5 ~ 2.6 */
227 #define MMC_VDD_26_27 0x00004000 /* VDD voltage 2.6 ~ 2.7 */
228 #define MMC_VDD_27_28 0x00008000 /* VDD voltage 2.7 ~ 2.8 */
229 #define MMC_VDD_28_29 0x00010000 /* VDD voltage 2.8 ~ 2.9 */
230 #define MMC_VDD_29_30 0x00020000 /* VDD voltage 2.9 ~ 3.0 */
231 #define MMC_VDD_30_31 0x00040000 /* VDD voltage 3.0 ~ 3.1 */
232 #define MMC_VDD_31_32 0x00080000 /* VDD voltage 3.1 ~ 3.2 */
233 #define MMC_VDD_32_33 0x00100000 /* VDD voltage 3.2 ~ 3.3 */
234 #define MMC_VDD_33_34 0x00200000 /* VDD voltage 3.3 ~ 3.4 */
235 #define MMC_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */
236 #define MMC_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */
238 u32 caps
; /* Host capabilities */
240 #define MMC_CAP_4_BIT_DATA (1 << 0) /* Can the host do 4 bit transfers */
241 #define MMC_CAP_MMC_HIGHSPEED (1 << 1) /* Can do MMC high-speed timing */
242 #define MMC_CAP_SD_HIGHSPEED (1 << 2) /* Can do SD high-speed timing */
243 #define MMC_CAP_SDIO_IRQ (1 << 3) /* Can signal pending SDIO IRQs */
244 #define MMC_CAP_SPI (1 << 4) /* Talks only SPI protocols */
245 #define MMC_CAP_NEEDS_POLL (1 << 5) /* Needs polling for card-detection */
246 #define MMC_CAP_8_BIT_DATA (1 << 6) /* Can the host do 8 bit transfers */
247 #define MMC_CAP_AGGRESSIVE_PM (1 << 7) /* Suspend (e)MMC/SD at idle */
248 #define MMC_CAP_NONREMOVABLE (1 << 8) /* Nonremovable e.g. eMMC */
249 #define MMC_CAP_WAIT_WHILE_BUSY (1 << 9) /* Waits while card is busy */
250 #define MMC_CAP_ERASE (1 << 10) /* Allow erase/trim commands */
251 #define MMC_CAP_1_8V_DDR (1 << 11) /* can support */
252 /* DDR mode at 1.8V */
253 #define MMC_CAP_1_2V_DDR (1 << 12) /* can support */
254 /* DDR mode at 1.2V */
255 #define MMC_CAP_POWER_OFF_CARD (1 << 13) /* Can power off after boot */
256 #define MMC_CAP_BUS_WIDTH_TEST (1 << 14) /* CMD14/CMD19 bus width ok */
257 #define MMC_CAP_UHS_SDR12 (1 << 15) /* Host supports UHS SDR12 mode */
258 #define MMC_CAP_UHS_SDR25 (1 << 16) /* Host supports UHS SDR25 mode */
259 #define MMC_CAP_UHS_SDR50 (1 << 17) /* Host supports UHS SDR50 mode */
260 #define MMC_CAP_UHS_SDR104 (1 << 18) /* Host supports UHS SDR104 mode */
261 #define MMC_CAP_UHS_DDR50 (1 << 19) /* Host supports UHS DDR50 mode */
262 #define MMC_CAP_RUNTIME_RESUME (1 << 20) /* Resume at runtime_resume. */
263 #define MMC_CAP_DRIVER_TYPE_A (1 << 23) /* Host supports Driver Type A */
264 #define MMC_CAP_DRIVER_TYPE_C (1 << 24) /* Host supports Driver Type C */
265 #define MMC_CAP_DRIVER_TYPE_D (1 << 25) /* Host supports Driver Type D */
266 #define MMC_CAP_CMD23 (1 << 30) /* CMD23 supported. */
267 #define MMC_CAP_HW_RESET (1 << 31) /* Hardware reset */
269 u32 caps2
; /* More host capabilities */
271 #define MMC_CAP2_BOOTPART_NOACC (1 << 0) /* Boot partition no access */
272 #define MMC_CAP2_FULL_PWR_CYCLE (1 << 2) /* Can do full power cycle */
273 #define MMC_CAP2_HS200_1_8V_SDR (1 << 5) /* can support */
274 #define MMC_CAP2_HS200_1_2V_SDR (1 << 6) /* can support */
275 #define MMC_CAP2_HS200 (MMC_CAP2_HS200_1_8V_SDR | \
276 MMC_CAP2_HS200_1_2V_SDR)
277 #define MMC_CAP2_HC_ERASE_SZ (1 << 9) /* High-capacity erase size */
278 #define MMC_CAP2_CD_ACTIVE_HIGH (1 << 10) /* Card-detect signal active high */
279 #define MMC_CAP2_RO_ACTIVE_HIGH (1 << 11) /* Write-protect signal active high */
280 #define MMC_CAP2_PACKED_RD (1 << 12) /* Allow packed read */
281 #define MMC_CAP2_PACKED_WR (1 << 13) /* Allow packed write */
282 #define MMC_CAP2_PACKED_CMD (MMC_CAP2_PACKED_RD | \
284 #define MMC_CAP2_NO_PRESCAN_POWERUP (1 << 14) /* Don't power up before scan */
285 #define MMC_CAP2_HS400_1_8V (1 << 15) /* Can support HS400 1.8V */
286 #define MMC_CAP2_HS400_1_2V (1 << 16) /* Can support HS400 1.2V */
287 #define MMC_CAP2_HS400 (MMC_CAP2_HS400_1_8V | \
289 #define MMC_CAP2_HSX00_1_2V (MMC_CAP2_HS200_1_2V_SDR | MMC_CAP2_HS400_1_2V)
290 #define MMC_CAP2_SDIO_IRQ_NOTHREAD (1 << 17)
291 #define MMC_CAP2_NO_WRITE_PROTECT (1 << 18) /* No physical write protect pin, assume that card is always read-write */
293 mmc_pm_flag_t pm_caps
; /* supported pm features */
295 #ifdef CONFIG_MMC_CLKGATE
296 int clk_requests
; /* internal reference counter */
297 unsigned int clk_delay
; /* number of MCI clk hold cycles */
298 bool clk_gated
; /* clock gated */
299 struct delayed_work clk_gate_work
; /* delayed clock gate */
300 unsigned int clk_old
; /* old clock value cache */
301 spinlock_t clk_lock
; /* lock for clk fields */
302 struct mutex clk_gate_mutex
; /* mutex for clock gating */
303 struct device_attribute clkgate_delay_attr
;
304 unsigned long clkgate_delay
;
307 /* host specific block data */
308 unsigned int max_seg_size
; /* see blk_queue_max_segment_size */
309 unsigned short max_segs
; /* see blk_queue_max_segments */
310 unsigned short unused
;
311 unsigned int max_req_size
; /* maximum number of bytes in one req */
312 unsigned int max_blk_size
; /* maximum size of one mmc block */
313 unsigned int max_blk_count
; /* maximum number of blocks in one req */
314 unsigned int max_busy_timeout
; /* max busy timeout in ms */
317 spinlock_t lock
; /* lock for claim and bus ops */
319 struct mmc_ios ios
; /* current io bus settings */
321 /* group bitfields together to minimize padding */
322 unsigned int use_spi_crc
:1;
323 unsigned int claimed
:1; /* host exclusively claimed */
324 unsigned int bus_dead
:1; /* bus has been released */
325 #ifdef CONFIG_MMC_DEBUG
326 unsigned int removed
:1; /* host is being removed */
328 unsigned int can_retune
:1; /* re-tuning can be used */
329 unsigned int doing_retune
:1; /* re-tuning in progress */
330 unsigned int retune_now
:1; /* do re-tuning at next req */
332 int rescan_disable
; /* disable card detection */
333 int rescan_entered
; /* used with nonremovable devices */
335 int need_retune
; /* re-tuning is needed */
336 int hold_retune
; /* hold off re-tuning */
337 unsigned int retune_period
; /* re-tuning period in secs */
338 struct timer_list retune_timer
; /* for periodic re-tuning */
340 bool trigger_card_event
; /* card_event necessary */
342 struct mmc_card
*card
; /* device attached to this host */
344 wait_queue_head_t wq
;
345 struct task_struct
*claimer
; /* task that has host claimed */
346 int claim_cnt
; /* "claim" nesting count */
348 struct delayed_work detect
;
349 int detect_change
; /* card detect flag */
350 struct mmc_slot slot
;
352 const struct mmc_bus_ops
*bus_ops
; /* current bus driver */
353 unsigned int bus_refs
; /* reference counter */
355 unsigned int sdio_irqs
;
356 struct task_struct
*sdio_irq_thread
;
357 bool sdio_irq_pending
;
358 atomic_t sdio_irq_thread_abort
;
360 mmc_pm_flag_t pm_flags
; /* requested pm features */
362 struct led_trigger
*led
; /* activity led */
364 #ifdef CONFIG_REGULATOR
365 bool regulator_enabled
; /* regulator state */
367 struct mmc_supply supply
;
369 struct dentry
*debugfs_root
;
371 struct mmc_async_req
*areq
; /* active async req */
372 struct mmc_context_info context_info
; /* async synchronization info */
374 #ifdef CONFIG_FAIL_MMC_REQUEST
375 struct fault_attr fail_mmc_request
;
378 unsigned int actual_clock
; /* Actual HC clock rate */
380 unsigned int slotno
; /* used for sdio acpi binding */
382 int dsr_req
; /* DSR value is valid */
383 u32 dsr
; /* optional driver stage (DSR) value */
385 unsigned long private[0] ____cacheline_aligned
;
388 struct mmc_host
*mmc_alloc_host(int extra
, struct device
*);
389 int mmc_add_host(struct mmc_host
*);
390 void mmc_remove_host(struct mmc_host
*);
391 void mmc_free_host(struct mmc_host
*);
392 int mmc_of_parse(struct mmc_host
*host
);
394 static inline void *mmc_priv(struct mmc_host
*host
)
396 return (void *)host
->private;
399 #define mmc_host_is_spi(host) ((host)->caps & MMC_CAP_SPI)
401 #define mmc_dev(x) ((x)->parent)
402 #define mmc_classdev(x) (&(x)->class_dev)
403 #define mmc_hostname(x) (dev_name(&(x)->class_dev))
405 int mmc_power_save_host(struct mmc_host
*host
);
406 int mmc_power_restore_host(struct mmc_host
*host
);
408 void mmc_detect_change(struct mmc_host
*, unsigned long delay
);
409 void mmc_request_done(struct mmc_host
*, struct mmc_request
*);
411 static inline void mmc_signal_sdio_irq(struct mmc_host
*host
)
413 host
->ops
->enable_sdio_irq(host
, 0);
414 host
->sdio_irq_pending
= true;
415 if (host
->sdio_irq_thread
)
416 wake_up_process(host
->sdio_irq_thread
);
419 void sdio_run_irqs(struct mmc_host
*host
);
421 #ifdef CONFIG_REGULATOR
422 int mmc_regulator_get_ocrmask(struct regulator
*supply
);
423 int mmc_regulator_set_ocr(struct mmc_host
*mmc
,
424 struct regulator
*supply
,
425 unsigned short vdd_bit
);
427 static inline int mmc_regulator_get_ocrmask(struct regulator
*supply
)
432 static inline int mmc_regulator_set_ocr(struct mmc_host
*mmc
,
433 struct regulator
*supply
,
434 unsigned short vdd_bit
)
440 int mmc_regulator_get_supply(struct mmc_host
*mmc
);
442 int mmc_pm_notify(struct notifier_block
*notify_block
, unsigned long, void *);
444 static inline int mmc_card_is_removable(struct mmc_host
*host
)
446 return !(host
->caps
& MMC_CAP_NONREMOVABLE
);
449 static inline int mmc_card_keep_power(struct mmc_host
*host
)
451 return host
->pm_flags
& MMC_PM_KEEP_POWER
;
454 static inline int mmc_card_wake_sdio_irq(struct mmc_host
*host
)
456 return host
->pm_flags
& MMC_PM_WAKE_SDIO_IRQ
;
459 static inline int mmc_host_cmd23(struct mmc_host
*host
)
461 return host
->caps
& MMC_CAP_CMD23
;
464 static inline int mmc_boot_partition_access(struct mmc_host
*host
)
466 return !(host
->caps2
& MMC_CAP2_BOOTPART_NOACC
);
469 static inline int mmc_host_uhs(struct mmc_host
*host
)
472 (MMC_CAP_UHS_SDR12
| MMC_CAP_UHS_SDR25
|
473 MMC_CAP_UHS_SDR50
| MMC_CAP_UHS_SDR104
|
477 static inline int mmc_host_packed_wr(struct mmc_host
*host
)
479 return host
->caps2
& MMC_CAP2_PACKED_WR
;
482 #ifdef CONFIG_MMC_CLKGATE
483 void mmc_host_clk_hold(struct mmc_host
*host
);
484 void mmc_host_clk_release(struct mmc_host
*host
);
485 unsigned int mmc_host_clk_rate(struct mmc_host
*host
);
488 static inline void mmc_host_clk_hold(struct mmc_host
*host
)
492 static inline void mmc_host_clk_release(struct mmc_host
*host
)
496 static inline unsigned int mmc_host_clk_rate(struct mmc_host
*host
)
498 return host
->ios
.clock
;
502 static inline int mmc_card_hs(struct mmc_card
*card
)
504 return card
->host
->ios
.timing
== MMC_TIMING_SD_HS
||
505 card
->host
->ios
.timing
== MMC_TIMING_MMC_HS
;
508 static inline int mmc_card_uhs(struct mmc_card
*card
)
510 return card
->host
->ios
.timing
>= MMC_TIMING_UHS_SDR12
&&
511 card
->host
->ios
.timing
<= MMC_TIMING_UHS_DDR50
;
514 static inline bool mmc_card_hs200(struct mmc_card
*card
)
516 return card
->host
->ios
.timing
== MMC_TIMING_MMC_HS200
;
519 static inline bool mmc_card_ddr52(struct mmc_card
*card
)
521 return card
->host
->ios
.timing
== MMC_TIMING_MMC_DDR52
;
524 static inline bool mmc_card_hs400(struct mmc_card
*card
)
526 return card
->host
->ios
.timing
== MMC_TIMING_MMC_HS400
;
529 void mmc_retune_timer_stop(struct mmc_host
*host
);
531 static inline void mmc_retune_needed(struct mmc_host
*host
)
533 if (host
->can_retune
)
534 host
->need_retune
= 1;
537 static inline void mmc_retune_recheck(struct mmc_host
*host
)
539 if (host
->hold_retune
<= 1)
540 host
->retune_now
= 1;
543 #endif /* LINUX_MMC_HOST_H */