include/linux/msi.h

   1 #ifndef LINUX_MSI_H
   2 #define LINUX_MSI_H
   3
   4 #include <linux/kobject.h>
   5 #include <linux/list.h>
   6
   7 struct msi_msg {
   8         u32     address_lo;     /* low 32 bits of msi message address */
   9         u32     address_hi;     /* high 32 bits of msi message address */
  10         u32     data;           /* 16 bits of msi message data */
  11 };
  12
  13 extern int pci_msi_ignore_mask;
  14 /* Helper functions */
  15 struct irq_data;
  16 struct msi_desc;
  17 struct pci_dev;
  18 struct platform_msi_priv_data;
  19 void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
  20 #ifdef CONFIG_GENERIC_MSI_IRQ
  21 void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg);
  22 #else
  23 static inline void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg)
  24 {
  25 }
  26 #endif
  27
  28 typedef void (*irq_write_msi_msg_t)(struct msi_desc *desc,
  29                                     struct msi_msg *msg);
  30
  31 /**
  32  * platform_msi_desc - Platform device specific msi descriptor data
  33  * @msi_priv_data:      Pointer to platform private data
  34  * @msi_index:          The index of the MSI descriptor for multi MSI
  35  */
  36 struct platform_msi_desc {
  37         struct platform_msi_priv_data   *msi_priv_data;
  38         u16                             msi_index;
  39 };
  40
  41 /**
  42  * fsl_mc_msi_desc - FSL-MC device specific msi descriptor data
  43  * @msi_index:          The index of the MSI descriptor
  44  */
  45 struct fsl_mc_msi_desc {
  46         u16                             msi_index;
  47 };
  48
  49 /**
  50  * struct msi_desc - Descriptor structure for MSI based interrupts
  51  * @list:       List head for management
  52  * @irq:        The base interrupt number
  53  * @nvec_used:  The number of vectors used
  54  * @dev:        Pointer to the device which uses this descriptor
  55  * @msg:        The last set MSI message cached for reuse
  56  * @affinity:   Optional pointer to a cpu affinity mask for this descriptor
  57  *
  58  * @masked:     [PCI MSI/X] Mask bits
  59  * @is_msix:    [PCI MSI/X] True if MSI-X
  60  * @multiple:   [PCI MSI/X] log2 num of messages allocated
  61  * @multi_cap:  [PCI MSI/X] log2 num of messages supported
  62  * @maskbit:    [PCI MSI/X] Mask-Pending bit supported?
  63  * @is_64:      [PCI MSI/X] Address size: 0=32bit 1=64bit
  64  * @entry_nr:   [PCI MSI/X] Entry which is described by this descriptor
  65  * @default_irq:[PCI MSI/X] The default pre-assigned non-MSI irq
  66  * @mask_pos:   [PCI MSI]   Mask register position
  67  * @mask_base:  [PCI MSI-X] Mask register base address
  68  * @platform:   [platform]  Platform device specific msi descriptor data
  69  * @fsl_mc:     [fsl-mc]    FSL MC device specific msi descriptor data
  70  */
  71 struct msi_desc {
  72         /* Shared device/bus type independent data */
  73         struct list_head                list;
  74         unsigned int                    irq;
  75         unsigned int                    nvec_used;
  76         struct device                   *dev;
  77         struct msi_msg                  msg;
  78         struct cpumask                  *affinity;
  79
  80         union {
  81                 /* PCI MSI/X specific data */
  82                 struct {
  83                         u32 masked;
  84                         struct {
  85                                 __u8    is_msix         : 1;
  86                                 __u8    multiple        : 3;
  87                                 __u8    multi_cap       : 3;
  88                                 __u8    maskbit         : 1;
  89                                 __u8    is_64           : 1;
  90                                 __u16   entry_nr;
  91                                 unsigned default_irq;
  92                         } msi_attrib;
  93                         union {
  94                                 u8      mask_pos;
  95                                 void __iomem *mask_base;
  96                         };
  97                 };
  98
  99                 /*
 100                  * Non PCI variants add their data structure here. New
 101                  * entries need to use a named structure. We want
 102                  * proper name spaces for this. The PCI part is
 103                  * anonymous for now as it would require an immediate
 104                  * tree wide cleanup.
 105                  */
 106                 struct platform_msi_desc platform;
 107                 struct fsl_mc_msi_desc fsl_mc;
 108         };
 109 };
 110
 111 /* Helpers to hide struct msi_desc implementation details */
 112 #define msi_desc_to_dev(desc)           ((desc)->dev)
 113 #define dev_to_msi_list(dev)            (&(dev)->msi_list)
 114 #define first_msi_entry(dev)            \
 115         list_first_entry(dev_to_msi_list((dev)), struct msi_desc, list)
 116 #define for_each_msi_entry(desc, dev)   \
 117         list_for_each_entry((desc), dev_to_msi_list((dev)), list)
 118
 119 #ifdef CONFIG_PCI_MSI
 120 #define first_pci_msi_entry(pdev)       first_msi_entry(&(pdev)->dev)
 121 #define for_each_pci_msi_entry(desc, pdev)      \
 122         for_each_msi_entry((desc), &(pdev)->dev)
 123
 124 struct pci_dev *msi_desc_to_pci_dev(struct msi_desc *desc);
 125 void *msi_desc_to_pci_sysdata(struct msi_desc *desc);
 126 void pci_write_msi_msg(unsigned int irq, struct msi_msg *msg);
 127 #else /* CONFIG_PCI_MSI */
 128 static inline void *msi_desc_to_pci_sysdata(struct msi_desc *desc)
 129 {
 130         return NULL;
 131 }
 132 static inline void pci_write_msi_msg(unsigned int irq, struct msi_msg *msg)
 133 {
 134 }
 135 #endif /* CONFIG_PCI_MSI */
 136
 137 struct msi_desc *alloc_msi_entry(struct device *dev, int nvec,
 138                                  const struct cpumask *affinity);
 139 void free_msi_entry(struct msi_desc *entry);
 140 void __pci_read_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
 141 void __pci_write_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
 142
 143 u32 __pci_msix_desc_mask_irq(struct msi_desc *desc, u32 flag);
 144 u32 __pci_msi_desc_mask_irq(struct msi_desc *desc, u32 mask, u32 flag);
 145 void pci_msi_mask_irq(struct irq_data *data);
 146 void pci_msi_unmask_irq(struct irq_data *data);
 147
 148 /* Conversion helpers. Should be removed after merging */
 149 static inline void __write_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
 150 {
 151         __pci_write_msi_msg(entry, msg);
 152 }
 153 static inline void write_msi_msg(int irq, struct msi_msg *msg)
 154 {
 155         pci_write_msi_msg(irq, msg);
 156 }
 157 static inline void mask_msi_irq(struct irq_data *data)
 158 {
 159         pci_msi_mask_irq(data);
 160 }
 161 static inline void unmask_msi_irq(struct irq_data *data)
 162 {
 163         pci_msi_unmask_irq(data);
 164 }
 165
 166 /*
 167  * The arch hooks to setup up msi irqs. Those functions are
 168  * implemented as weak symbols so that they /can/ be overriden by
 169  * architecture specific code if needed.
 170  */
 171 int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc);
 172 void arch_teardown_msi_irq(unsigned int irq);
 173 int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type);
 174 void arch_teardown_msi_irqs(struct pci_dev *dev);
 175 void arch_restore_msi_irqs(struct pci_dev *dev);
 176
 177 void default_teardown_msi_irqs(struct pci_dev *dev);
 178 void default_restore_msi_irqs(struct pci_dev *dev);
 179
 180 struct msi_controller {
 181         struct module *owner;
 182         struct device *dev;
 183         struct device_node *of_node;
 184         struct list_head list;
 185
 186         int (*setup_irq)(struct msi_controller *chip, struct pci_dev *dev,
 187                          struct msi_desc *desc);
 188         int (*setup_irqs)(struct msi_controller *chip, struct pci_dev *dev,
 189                           int nvec, int type);
 190         void (*teardown_irq)(struct msi_controller *chip, unsigned int irq);
 191 };
 192
 193 #ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
 194
 195 #include <linux/irqhandler.h>
 196 #include <asm/msi.h>
 197
 198 struct irq_domain;
 199 struct irq_domain_ops;
 200 struct irq_chip;
 201 struct device_node;
 202 struct fwnode_handle;
 203 struct msi_domain_info;
 204
 205 /**
 206  * struct msi_domain_ops - MSI interrupt domain callbacks
 207  * @get_hwirq:          Retrieve the resulting hw irq number
 208  * @msi_init:           Domain specific init function for MSI interrupts
 209  * @msi_free:           Domain specific function to free a MSI interrupts
 210  * @msi_check:          Callback for verification of the domain/info/dev data
 211  * @msi_prepare:        Prepare the allocation of the interrupts in the domain
 212  * @msi_finish:         Optional callback to finalize the allocation
 213  * @set_desc:           Set the msi descriptor for an interrupt
 214  * @handle_error:       Optional error handler if the allocation fails
 215  *
 216  * @get_hwirq, @msi_init and @msi_free are callbacks used by
 217  * msi_create_irq_domain() and related interfaces
 218  *
 219  * @msi_check, @msi_prepare, @msi_finish, @set_desc and @handle_error
 220  * are callbacks used by msi_domain_alloc_irqs() and related
 221  * interfaces which are based on msi_desc.
 222  */
 223 struct msi_domain_ops {
 224         irq_hw_number_t (*get_hwirq)(struct msi_domain_info *info,
 225                                      msi_alloc_info_t *arg);
 226         int             (*msi_init)(struct irq_domain *domain,
 227                                     struct msi_domain_info *info,
 228                                     unsigned int virq, irq_hw_number_t hwirq,
 229                                     msi_alloc_info_t *arg);
 230         void            (*msi_free)(struct irq_domain *domain,
 231                                     struct msi_domain_info *info,
 232                                     unsigned int virq);
 233         int             (*msi_check)(struct irq_domain *domain,
 234                                      struct msi_domain_info *info,
 235                                      struct device *dev);
 236         int             (*msi_prepare)(struct irq_domain *domain,
 237                                        struct device *dev, int nvec,
 238                                        msi_alloc_info_t *arg);
 239         void            (*msi_finish)(msi_alloc_info_t *arg, int retval);
 240         void            (*set_desc)(msi_alloc_info_t *arg,
 241                                     struct msi_desc *desc);
 242         int             (*handle_error)(struct irq_domain *domain,
 243                                         struct msi_desc *desc, int error);
 244 };
 245
 246 /**
 247  * struct msi_domain_info - MSI interrupt domain data
 248  * @flags:              Flags to decribe features and capabilities
 249  * @ops:                The callback data structure
 250  * @chip:               Optional: associated interrupt chip
 251  * @chip_data:          Optional: associated interrupt chip data
 252  * @handler:            Optional: associated interrupt flow handler
 253  * @handler_data:       Optional: associated interrupt flow handler data
 254  * @handler_name:       Optional: associated interrupt flow handler name
 255  * @data:               Optional: domain specific data
 256  */
 257 struct msi_domain_info {
 258         u32                     flags;
 259         struct msi_domain_ops   *ops;
 260         struct irq_chip         *chip;
 261         void                    *chip_data;
 262         irq_flow_handler_t      handler;
 263         void                    *handler_data;
 264         const char              *handler_name;
 265         void                    *data;
 266 };
 267
 268 /* Flags for msi_domain_info */
 269 enum {
 270         /*
 271          * Init non implemented ops callbacks with default MSI domain
 272          * callbacks.
 273          */
 274         MSI_FLAG_USE_DEF_DOM_OPS        = (1 << 0),
 275         /*
 276          * Init non implemented chip callbacks with default MSI chip
 277          * callbacks.
 278          */
 279         MSI_FLAG_USE_DEF_CHIP_OPS       = (1 << 1),
 280         /* Support multiple PCI MSI interrupts */
 281         MSI_FLAG_MULTI_PCI_MSI          = (1 << 2),
 282         /* Support PCI MSIX interrupts */
 283         MSI_FLAG_PCI_MSIX               = (1 << 3),
 284         /* Needs early activate, required for PCI */
 285         MSI_FLAG_ACTIVATE_EARLY         = (1 << 4),
 286 };
 287
 288 int msi_domain_set_affinity(struct irq_data *data, const struct cpumask *mask,
 289                             bool force);
 290
 291 struct irq_domain *msi_create_irq_domain(struct fwnode_handle *fwnode,
 292                                          struct msi_domain_info *info,
 293                                          struct irq_domain *parent);
 294 int msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev,
 295                           int nvec);
 296 void msi_domain_free_irqs(struct irq_domain *domain, struct device *dev);
 297 struct msi_domain_info *msi_get_domain_info(struct irq_domain *domain);
 298
 299 struct irq_domain *platform_msi_create_irq_domain(struct fwnode_handle *fwnode,
 300                                                   struct msi_domain_info *info,
 301                                                   struct irq_domain *parent);
 302 int platform_msi_domain_alloc_irqs(struct device *dev, unsigned int nvec,
 303                                    irq_write_msi_msg_t write_msi_msg);
 304 void platform_msi_domain_free_irqs(struct device *dev);
 305
 306 /* When an MSI domain is used as an intermediate domain */
 307 int msi_domain_prepare_irqs(struct irq_domain *domain, struct device *dev,
 308                             int nvec, msi_alloc_info_t *args);
 309 int msi_domain_populate_irqs(struct irq_domain *domain, struct device *dev,
 310                              int virq, int nvec, msi_alloc_info_t *args);
 311 struct irq_domain *
 312 platform_msi_create_device_domain(struct device *dev,
 313                                   unsigned int nvec,
 314                                   irq_write_msi_msg_t write_msi_msg,
 315                                   const struct irq_domain_ops *ops,
 316                                   void *host_data);
 317 int platform_msi_domain_alloc(struct irq_domain *domain, unsigned int virq,
 318                               unsigned int nr_irqs);
 319 void platform_msi_domain_free(struct irq_domain *domain, unsigned int virq,
 320                               unsigned int nvec);
 321 void *platform_msi_get_host_data(struct irq_domain *domain);
 322 #endif /* CONFIG_GENERIC_MSI_IRQ_DOMAIN */
 323
 324 #ifdef CONFIG_PCI_MSI_IRQ_DOMAIN
 325 void pci_msi_domain_write_msg(struct irq_data *irq_data, struct msi_msg *msg);
 326 struct irq_domain *pci_msi_create_irq_domain(struct fwnode_handle *fwnode,
 327                                              struct msi_domain_info *info,
 328                                              struct irq_domain *parent);
 329 irq_hw_number_t pci_msi_domain_calc_hwirq(struct pci_dev *dev,
 330                                           struct msi_desc *desc);
 331 int pci_msi_domain_check_cap(struct irq_domain *domain,
 332                              struct msi_domain_info *info, struct device *dev);
 333 u32 pci_msi_domain_get_msi_rid(struct irq_domain *domain, struct pci_dev *pdev);
 334 struct irq_domain *pci_msi_get_device_domain(struct pci_dev *pdev);
 335 #else
 336 static inline struct irq_domain *pci_msi_get_device_domain(struct pci_dev *pdev)
 337 {
 338         return NULL;
 339 }
 340 #endif /* CONFIG_PCI_MSI_IRQ_DOMAIN */
 341
 342 #endif /* LINUX_MSI_H */