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1 /* SPDX-License-Identifier: GPL-2.0 */
3 * PCI Endpoint *Controller* (EPC) header file
5 * Copyright (C) 2017 Texas Instruments
6 * Author: Kishon Vijay Abraham I <kishon@ti.com>
9 #ifndef __LINUX_PCI_EPC_H
10 #define __LINUX_PCI_EPC_H
12 #include <linux/pci-epf.h>
16 enum pci_epc_irq_type
{
24 * struct pci_epc_ops - set of function pointers for performing EPC operations
25 * @write_header: ops to populate configuration space header
26 * @set_bar: ops to configure the BAR
27 * @clear_bar: ops to reset the BAR
28 * @map_addr: ops to map CPU address to PCI address
29 * @unmap_addr: ops to unmap CPU address and PCI address
30 * @set_msi: ops to set the requested number of MSI interrupts in the MSI
32 * @get_msi: ops to get the number of MSI interrupts allocated by the RC from
33 * the MSI capability register
34 * @set_msix: ops to set the requested number of MSI-X interrupts in the
35 * MSI-X capability register
36 * @get_msix: ops to get the number of MSI-X interrupts allocated by the RC
37 * from the MSI-X capability register
38 * @raise_irq: ops to raise a legacy, MSI or MSI-X interrupt
39 * @start: ops to start the PCI link
40 * @stop: ops to stop the PCI link
41 * @owner: the module owner containing the ops
44 int (*write_header
)(struct pci_epc
*epc
, u8 func_no
,
45 struct pci_epf_header
*hdr
);
46 int (*set_bar
)(struct pci_epc
*epc
, u8 func_no
,
47 struct pci_epf_bar
*epf_bar
);
48 void (*clear_bar
)(struct pci_epc
*epc
, u8 func_no
,
49 struct pci_epf_bar
*epf_bar
);
50 int (*map_addr
)(struct pci_epc
*epc
, u8 func_no
,
51 phys_addr_t addr
, u64 pci_addr
, size_t size
);
52 void (*unmap_addr
)(struct pci_epc
*epc
, u8 func_no
,
54 int (*set_msi
)(struct pci_epc
*epc
, u8 func_no
, u8 interrupts
);
55 int (*get_msi
)(struct pci_epc
*epc
, u8 func_no
);
56 int (*set_msix
)(struct pci_epc
*epc
, u8 func_no
, u16 interrupts
);
57 int (*get_msix
)(struct pci_epc
*epc
, u8 func_no
);
58 int (*raise_irq
)(struct pci_epc
*epc
, u8 func_no
,
59 enum pci_epc_irq_type type
, u16 interrupt_num
);
60 int (*start
)(struct pci_epc
*epc
);
61 void (*stop
)(struct pci_epc
*epc
);
66 * struct pci_epc_mem - address space of the endpoint controller
67 * @phys_base: physical base address of the PCI address space
68 * @size: the size of the PCI address space
69 * @bitmap: bitmap to manage the PCI address space
70 * @pages: number of bits representing the address region
71 * @page_size: size of each page
74 phys_addr_t phys_base
;
76 unsigned long *bitmap
;
82 * struct pci_epc - represents the PCI EPC device
83 * @dev: PCI EPC device
84 * @pci_epf: list of endpoint functions present in this EPC device
85 * @ops: function pointers for performing endpoint operations
86 * @mem: address space of the endpoint controller
87 * @max_functions: max number of functions that can be configured in this EPC
88 * @group: configfs group representing the PCI EPC device
89 * @lock: spinlock to protect pci_epc ops
93 struct list_head pci_epf
;
94 const struct pci_epc_ops
*ops
;
95 struct pci_epc_mem
*mem
;
97 struct config_group
*group
;
98 /* spinlock to protect against concurrent access of EP controller */
100 unsigned int features
;
103 #define EPC_FEATURE_NO_LINKUP_NOTIFIER BIT(0)
104 #define EPC_FEATURE_BAR_MASK (BIT(1) | BIT(2) | BIT(3))
105 #define EPC_FEATURE_MSIX_AVAILABLE BIT(4)
106 #define EPC_FEATURE_SET_BAR(features, bar) \
107 (features |= (EPC_FEATURE_BAR_MASK & (bar << 1)))
108 #define EPC_FEATURE_GET_BAR(features) \
109 ((features & EPC_FEATURE_BAR_MASK) >> 1)
111 #define to_pci_epc(device) container_of((device), struct pci_epc, dev)
113 #define pci_epc_create(dev, ops) \
114 __pci_epc_create((dev), (ops), THIS_MODULE)
115 #define devm_pci_epc_create(dev, ops) \
116 __devm_pci_epc_create((dev), (ops), THIS_MODULE)
118 #define pci_epc_mem_init(epc, phys_addr, size) \
119 __pci_epc_mem_init((epc), (phys_addr), (size), PAGE_SIZE)
121 static inline void epc_set_drvdata(struct pci_epc
*epc
, void *data
)
123 dev_set_drvdata(&epc
->dev
, data
);
126 static inline void *epc_get_drvdata(struct pci_epc
*epc
)
128 return dev_get_drvdata(&epc
->dev
);
132 __devm_pci_epc_create(struct device
*dev
, const struct pci_epc_ops
*ops
,
133 struct module
*owner
);
135 __pci_epc_create(struct device
*dev
, const struct pci_epc_ops
*ops
,
136 struct module
*owner
);
137 void devm_pci_epc_destroy(struct device
*dev
, struct pci_epc
*epc
);
138 void pci_epc_destroy(struct pci_epc
*epc
);
139 int pci_epc_add_epf(struct pci_epc
*epc
, struct pci_epf
*epf
);
140 void pci_epc_linkup(struct pci_epc
*epc
);
141 void pci_epc_remove_epf(struct pci_epc
*epc
, struct pci_epf
*epf
);
142 int pci_epc_write_header(struct pci_epc
*epc
, u8 func_no
,
143 struct pci_epf_header
*hdr
);
144 int pci_epc_set_bar(struct pci_epc
*epc
, u8 func_no
,
145 struct pci_epf_bar
*epf_bar
);
146 void pci_epc_clear_bar(struct pci_epc
*epc
, u8 func_no
,
147 struct pci_epf_bar
*epf_bar
);
148 int pci_epc_map_addr(struct pci_epc
*epc
, u8 func_no
,
149 phys_addr_t phys_addr
,
150 u64 pci_addr
, size_t size
);
151 void pci_epc_unmap_addr(struct pci_epc
*epc
, u8 func_no
,
152 phys_addr_t phys_addr
);
153 int pci_epc_set_msi(struct pci_epc
*epc
, u8 func_no
, u8 interrupts
);
154 int pci_epc_get_msi(struct pci_epc
*epc
, u8 func_no
);
155 int pci_epc_set_msix(struct pci_epc
*epc
, u8 func_no
, u16 interrupts
);
156 int pci_epc_get_msix(struct pci_epc
*epc
, u8 func_no
);
157 int pci_epc_raise_irq(struct pci_epc
*epc
, u8 func_no
,
158 enum pci_epc_irq_type type
, u16 interrupt_num
);
159 int pci_epc_start(struct pci_epc
*epc
);
160 void pci_epc_stop(struct pci_epc
*epc
);
161 struct pci_epc
*pci_epc_get(const char *epc_name
);
162 void pci_epc_put(struct pci_epc
*epc
);
164 int __pci_epc_mem_init(struct pci_epc
*epc
, phys_addr_t phys_addr
, size_t size
,
166 void pci_epc_mem_exit(struct pci_epc
*epc
);
167 void __iomem
*pci_epc_mem_alloc_addr(struct pci_epc
*epc
,
168 phys_addr_t
*phys_addr
, size_t size
);
169 void pci_epc_mem_free_addr(struct pci_epc
*epc
, phys_addr_t phys_addr
,
170 void __iomem
*virt_addr
, size_t size
);
171 #endif /* __LINUX_PCI_EPC_H */