include/linux/pci-epc.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /**
   3  * PCI Endpoint *Controller* (EPC) header file
   4  *
   5  * Copyright (C) 2017 Texas Instruments
   6  * Author: Kishon Vijay Abraham I <kishon@ti.com>
   7  */
   8
   9 #ifndef __LINUX_PCI_EPC_H
  10 #define __LINUX_PCI_EPC_H
  11
  12 #include <linux/pci-epf.h>
  13
  14 struct pci_epc;
  15
  16 enum pci_epc_irq_type {
  17         PCI_EPC_IRQ_UNKNOWN,
  18         PCI_EPC_IRQ_LEGACY,
  19         PCI_EPC_IRQ_MSI,
  20         PCI_EPC_IRQ_MSIX,
  21 };
  22
  23 /**
  24  * struct pci_epc_ops - set of function pointers for performing EPC operations
  25  * @write_header: ops to populate configuration space header
  26  * @set_bar: ops to configure the BAR
  27  * @clear_bar: ops to reset the BAR
  28  * @map_addr: ops to map CPU address to PCI address
  29  * @unmap_addr: ops to unmap CPU address and PCI address
  30  * @set_msi: ops to set the requested number of MSI interrupts in the MSI
  31  *           capability register
  32  * @get_msi: ops to get the number of MSI interrupts allocated by the RC from
  33  *           the MSI capability register
  34  * @set_msix: ops to set the requested number of MSI-X interrupts in the
  35  *           MSI-X capability register
  36  * @get_msix: ops to get the number of MSI-X interrupts allocated by the RC
  37  *           from the MSI-X capability register
  38  * @raise_irq: ops to raise a legacy, MSI or MSI-X interrupt
  39  * @start: ops to start the PCI link
  40  * @stop: ops to stop the PCI link
  41  * @owner: the module owner containing the ops
  42  */
  43 struct pci_epc_ops {
  44         int     (*write_header)(struct pci_epc *epc, u8 func_no,
  45                                 struct pci_epf_header *hdr);
  46         int     (*set_bar)(struct pci_epc *epc, u8 func_no,
  47                            struct pci_epf_bar *epf_bar);
  48         void    (*clear_bar)(struct pci_epc *epc, u8 func_no,
  49                              struct pci_epf_bar *epf_bar);
  50         int     (*map_addr)(struct pci_epc *epc, u8 func_no,
  51                             phys_addr_t addr, u64 pci_addr, size_t size);
  52         void    (*unmap_addr)(struct pci_epc *epc, u8 func_no,
  53                               phys_addr_t addr);
  54         int     (*set_msi)(struct pci_epc *epc, u8 func_no, u8 interrupts);
  55         int     (*get_msi)(struct pci_epc *epc, u8 func_no);
  56         int     (*set_msix)(struct pci_epc *epc, u8 func_no, u16 interrupts,
  57                             enum pci_barno, u32 offset);
  58         int     (*get_msix)(struct pci_epc *epc, u8 func_no);
  59         int     (*raise_irq)(struct pci_epc *epc, u8 func_no,
  60                              enum pci_epc_irq_type type, u16 interrupt_num);
  61         int     (*start)(struct pci_epc *epc);
  62         void    (*stop)(struct pci_epc *epc);
  63         const struct pci_epc_features* (*get_features)(struct pci_epc *epc,
  64                                                        u8 func_no);
  65         struct module *owner;
  66 };
  67
  68 /**
  69  * struct pci_epc_mem - address space of the endpoint controller
  70  * @phys_base: physical base address of the PCI address space
  71  * @size: the size of the PCI address space
  72  * @bitmap: bitmap to manage the PCI address space
  73  * @pages: number of bits representing the address region
  74  * @page_size: size of each page
  75  * @lock: mutex to protect bitmap
  76  */
  77 struct pci_epc_mem {
  78         phys_addr_t     phys_base;
  79         size_t          size;
  80         unsigned long   *bitmap;
  81         size_t          page_size;
  82         int             pages;
  83         /* mutex to protect against concurrent access for memory allocation*/
  84         struct mutex    lock;
  85 };
  86
  87 /**
  88  * struct pci_epc - represents the PCI EPC device
  89  * @dev: PCI EPC device
  90  * @pci_epf: list of endpoint functions present in this EPC device
  91  * @ops: function pointers for performing endpoint operations
  92  * @mem: address space of the endpoint controller
  93  * @max_functions: max number of functions that can be configured in this EPC
  94  * @group: configfs group representing the PCI EPC device
  95  * @lock: mutex to protect pci_epc ops
  96  * @function_num_map: bitmap to manage physical function number
  97  * @notifier: used to notify EPF of any EPC events (like linkup)
  98  */
  99 struct pci_epc {
 100         struct device                   dev;
 101         struct list_head                pci_epf;
 102         const struct pci_epc_ops        *ops;
 103         struct pci_epc_mem              *mem;
 104         u8                              max_functions;
 105         struct config_group             *group;
 106         /* mutex to protect against concurrent access of EP controller */
 107         struct mutex                    lock;
 108         unsigned long                   function_num_map;
 109         struct atomic_notifier_head     notifier;
 110 };
 111
 112 /**
 113  * struct pci_epc_features - features supported by a EPC device per function
 114  * @linkup_notifier: indicate if the EPC device can notify EPF driver on link up
 115  * @msi_capable: indicate if the endpoint function has MSI capability
 116  * @msix_capable: indicate if the endpoint function has MSI-X capability
 117  * @reserved_bar: bitmap to indicate reserved BAR unavailable to function driver
 118  * @bar_fixed_64bit: bitmap to indicate fixed 64bit BARs
 119  * @bar_fixed_size: Array specifying the size supported by each BAR
 120  * @align: alignment size required for BAR buffer allocation
 121  */
 122 struct pci_epc_features {
 123         unsigned int    linkup_notifier : 1;
 124         unsigned int    core_init_notifier : 1;
 125         unsigned int    msi_capable : 1;
 126         unsigned int    msix_capable : 1;
 127         u8      reserved_bar;
 128         u8      bar_fixed_64bit;
 129         u64     bar_fixed_size[PCI_STD_NUM_BARS];
 130         size_t  align;
 131 };
 132
 133 #define to_pci_epc(device) container_of((device), struct pci_epc, dev)
 134
 135 #define pci_epc_create(dev, ops)    \
 136                 __pci_epc_create((dev), (ops), THIS_MODULE)
 137 #define devm_pci_epc_create(dev, ops)    \
 138                 __devm_pci_epc_create((dev), (ops), THIS_MODULE)
 139
 140 #define pci_epc_mem_init(epc, phys_addr, size)  \
 141                 __pci_epc_mem_init((epc), (phys_addr), (size), PAGE_SIZE)
 142
 143 static inline void epc_set_drvdata(struct pci_epc *epc, void *data)
 144 {
 145         dev_set_drvdata(&epc->dev, data);
 146 }
 147
 148 static inline void *epc_get_drvdata(struct pci_epc *epc)
 149 {
 150         return dev_get_drvdata(&epc->dev);
 151 }
 152
 153 static inline int
 154 pci_epc_register_notifier(struct pci_epc *epc, struct notifier_block *nb)
 155 {
 156         return atomic_notifier_chain_register(&epc->notifier, nb);
 157 }
 158
 159 struct pci_epc *
 160 __devm_pci_epc_create(struct device *dev, const struct pci_epc_ops *ops,
 161                       struct module *owner);
 162 struct pci_epc *
 163 __pci_epc_create(struct device *dev, const struct pci_epc_ops *ops,
 164                  struct module *owner);
 165 void devm_pci_epc_destroy(struct device *dev, struct pci_epc *epc);
 166 void pci_epc_destroy(struct pci_epc *epc);
 167 int pci_epc_add_epf(struct pci_epc *epc, struct pci_epf *epf);
 168 void pci_epc_linkup(struct pci_epc *epc);
 169 void pci_epc_init_notify(struct pci_epc *epc);
 170 void pci_epc_remove_epf(struct pci_epc *epc, struct pci_epf *epf);
 171 int pci_epc_write_header(struct pci_epc *epc, u8 func_no,
 172                          struct pci_epf_header *hdr);
 173 int pci_epc_set_bar(struct pci_epc *epc, u8 func_no,
 174                     struct pci_epf_bar *epf_bar);
 175 void pci_epc_clear_bar(struct pci_epc *epc, u8 func_no,
 176                        struct pci_epf_bar *epf_bar);
 177 int pci_epc_map_addr(struct pci_epc *epc, u8 func_no,
 178                      phys_addr_t phys_addr,
 179                      u64 pci_addr, size_t size);
 180 void pci_epc_unmap_addr(struct pci_epc *epc, u8 func_no,
 181                         phys_addr_t phys_addr);
 182 int pci_epc_set_msi(struct pci_epc *epc, u8 func_no, u8 interrupts);
 183 int pci_epc_get_msi(struct pci_epc *epc, u8 func_no);
 184 int pci_epc_set_msix(struct pci_epc *epc, u8 func_no, u16 interrupts,
 185                      enum pci_barno, u32 offset);
 186 int pci_epc_get_msix(struct pci_epc *epc, u8 func_no);
 187 int pci_epc_raise_irq(struct pci_epc *epc, u8 func_no,
 188                       enum pci_epc_irq_type type, u16 interrupt_num);
 189 int pci_epc_start(struct pci_epc *epc);
 190 void pci_epc_stop(struct pci_epc *epc);
 191 const struct pci_epc_features *pci_epc_get_features(struct pci_epc *epc,
 192                                                     u8 func_no);
 193 unsigned int pci_epc_get_first_free_bar(const struct pci_epc_features
 194                                         *epc_features);
 195 struct pci_epc *pci_epc_get(const char *epc_name);
 196 void pci_epc_put(struct pci_epc *epc);
 197
 198 int __pci_epc_mem_init(struct pci_epc *epc, phys_addr_t phys_addr, size_t size,
 199                        size_t page_size);
 200 void pci_epc_mem_exit(struct pci_epc *epc);
 201 void __iomem *pci_epc_mem_alloc_addr(struct pci_epc *epc,
 202                                      phys_addr_t *phys_addr, size_t size);
 203 void pci_epc_mem_free_addr(struct pci_epc *epc, phys_addr_t phys_addr,
 204                            void __iomem *virt_addr, size_t size);
 205 #endif /* __LINUX_PCI_EPC_H */