include/linux/pci.h

   1 /*
   2  *      pci.h
   3  *
   4  *      PCI defines and function prototypes
   5  *      Copyright 1994, Drew Eckhardt
   6  *      Copyright 1997--1999 Martin Mares <mj@ucw.cz>
   7  *
   8  *      For more information, please consult the following manuals (look at
   9  *      http://www.pcisig.com/ for how to get them):
  10  *
  11  *      PCI BIOS Specification
  12  *      PCI Local Bus Specification
  13  *      PCI to PCI Bridge Specification
  14  *      PCI System Design Guide
  15  */
  16
  17 #ifndef LINUX_PCI_H
  18 #define LINUX_PCI_H
  19
  20 /* Include the pci register defines */
  21 #include <linux/pci_regs.h>
  22
  23 /* Include the ID list */
  24 #include <linux/pci_ids.h>
  25
  26 /*
  27  * The PCI interface treats multi-function devices as independent
  28  * devices.  The slot/function address of each device is encoded
  29  * in a single byte as follows:
  30  *
  31  *      7:3 = slot
  32  *      2:0 = function
  33  */
  34 #define PCI_DEVFN(slot,func)    ((((slot) & 0x1f) << 3) | ((func) & 0x07))
  35 #define PCI_SLOT(devfn)         (((devfn) >> 3) & 0x1f)
  36 #define PCI_FUNC(devfn)         ((devfn) & 0x07)
  37
  38 /* Ioctls for /proc/bus/pci/X/Y nodes. */
  39 #define PCIIOC_BASE             ('P' << 24 | 'C' << 16 | 'I' << 8)
  40 #define PCIIOC_CONTROLLER       (PCIIOC_BASE | 0x00)    /* Get controller for PCI device. */
  41 #define PCIIOC_MMAP_IS_IO       (PCIIOC_BASE | 0x01)    /* Set mmap state to I/O space. */
  42 #define PCIIOC_MMAP_IS_MEM      (PCIIOC_BASE | 0x02)    /* Set mmap state to MEM space. */
  43 #define PCIIOC_WRITE_COMBINE    (PCIIOC_BASE | 0x03)    /* Enable/disable write-combining. */
  44
  45 #ifdef __KERNEL__
  46
  47 #include <linux/mod_devicetable.h>
  48
  49 #include <linux/types.h>
  50 #include <linux/ioport.h>
  51 #include <linux/list.h>
  52 #include <linux/errno.h>
  53 #include <linux/device.h>
  54
  55 /* File state for mmap()s on /proc/bus/pci/X/Y */
  56 enum pci_mmap_state {
  57         pci_mmap_io,
  58         pci_mmap_mem
  59 };
  60
  61 /* This defines the direction arg to the DMA mapping routines. */
  62 #define PCI_DMA_BIDIRECTIONAL   0
  63 #define PCI_DMA_TODEVICE        1
  64 #define PCI_DMA_FROMDEVICE      2
  65 #define PCI_DMA_NONE            3
  66
  67 #define DEVICE_COUNT_COMPATIBLE 4
  68 #define DEVICE_COUNT_RESOURCE   12
  69
  70 typedef int __bitwise pci_power_t;
  71
  72 #define PCI_D0          ((pci_power_t __force) 0)
  73 #define PCI_D1          ((pci_power_t __force) 1)
  74 #define PCI_D2          ((pci_power_t __force) 2)
  75 #define PCI_D3hot       ((pci_power_t __force) 3)
  76 #define PCI_D3cold      ((pci_power_t __force) 4)
  77 #define PCI_UNKNOWN     ((pci_power_t __force) 5)
  78 #define PCI_POWER_ERROR ((pci_power_t __force) -1)
  79
  80 /** The pci_channel state describes connectivity between the CPU and
  81  *  the pci device.  If some PCI bus between here and the pci device
  82  *  has crashed or locked up, this info is reflected here.
  83  */
  84 typedef unsigned int __bitwise pci_channel_state_t;
  85
  86 enum pci_channel_state {
  87         /* I/O channel is in normal state */
  88         pci_channel_io_normal = (__force pci_channel_state_t) 1,
  89
  90         /* I/O to channel is blocked */
  91         pci_channel_io_frozen = (__force pci_channel_state_t) 2,
  92
  93         /* PCI card is dead */
  94         pci_channel_io_perm_failure = (__force pci_channel_state_t) 3,
  95 };
  96
  97 typedef unsigned short __bitwise pci_bus_flags_t;
  98 enum pci_bus_flags {
  99         PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1,
 100 };
 101
 102 struct pci_cap_saved_state {
 103         struct hlist_node next;
 104         char cap_nr;
 105         u32 data[0];
 106 };
 107
 108 /*
 109  * The pci_dev structure is used to describe PCI devices.
 110  */
 111 struct pci_dev {
 112         struct list_head global_list;   /* node in list of all PCI devices */
 113         struct list_head bus_list;      /* node in per-bus list */
 114         struct pci_bus  *bus;           /* bus this device is on */
 115         struct pci_bus  *subordinate;   /* bus this device bridges to */
 116
 117         void            *sysdata;       /* hook for sys-specific extension */
 118         struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */
 119
 120         unsigned int    devfn;          /* encoded device & function index */
 121         unsigned short  vendor;
 122         unsigned short  device;
 123         unsigned short  subsystem_vendor;
 124         unsigned short  subsystem_device;
 125         unsigned int    class;          /* 3 bytes: (base,sub,prog-if) */
 126         u8              hdr_type;       /* PCI header type (`multi' flag masked out) */
 127         u8              rom_base_reg;   /* which config register controls the ROM */
 128         u8              pin;            /* which interrupt pin this device uses */
 129
 130         struct pci_driver *driver;      /* which driver has allocated this device */
 131         u64             dma_mask;       /* Mask of the bits of bus address this
 132                                            device implements.  Normally this is
 133                                            0xffffffff.  You only need to change
 134                                            this if your device has broken DMA
 135                                            or supports 64-bit transfers.  */
 136
 137         pci_power_t     current_state;  /* Current operating state. In ACPI-speak,
 138                                            this is D0-D3, D0 being fully functional,
 139                                            and D3 being off. */
 140
 141         pci_channel_state_t error_state;        /* current connectivity state */
 142         struct  device  dev;            /* Generic device interface */
 143
 144         /* device is compatible with these IDs */
 145         unsigned short vendor_compatible[DEVICE_COUNT_COMPATIBLE];
 146         unsigned short device_compatible[DEVICE_COUNT_COMPATIBLE];
 147
 148         int             cfg_size;       /* Size of configuration space */
 149
 150         /*
 151          * Instead of touching interrupt line and base address registers
 152          * directly, use the values stored here. They might be different!
 153          */
 154         unsigned int    irq;
 155         struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */
 156
 157         /* These fields are used by common fixups */
 158         unsigned int    transparent:1;  /* Transparent PCI bridge */
 159         unsigned int    multifunction:1;/* Part of multi-function device */
 160         /* keep track of device state */
 161         unsigned int    is_enabled:1;   /* pci_enable_device has been called */
 162         unsigned int    is_busmaster:1; /* device is busmaster */
 163         unsigned int    no_msi:1;       /* device may not use msi */
 164         unsigned int    no_d1d2:1;   /* only allow d0 or d3 */
 165         unsigned int    block_ucfg_access:1;    /* userspace config space access is blocked */
 166         unsigned int    broken_parity_status:1; /* Device generates false positive parity */
 167         unsigned int    msi_enabled:1;
 168         unsigned int    msix_enabled:1;
 169
 170         u32             saved_config_space[16]; /* config space saved at suspend time */
 171         struct hlist_head saved_cap_space;
 172         struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */
 173         int rom_attr_enabled;           /* has display of the rom attribute been enabled? */
 174         struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */
 175 };
 176
 177 #define pci_dev_g(n) list_entry(n, struct pci_dev, global_list)
 178 #define pci_dev_b(n) list_entry(n, struct pci_dev, bus_list)
 179 #define to_pci_dev(n) container_of(n, struct pci_dev, dev)
 180 #define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL)
 181
 182 static inline struct pci_cap_saved_state *pci_find_saved_cap(
 183         struct pci_dev *pci_dev,char cap)
 184 {
 185         struct pci_cap_saved_state *tmp;
 186         struct hlist_node *pos;
 187
 188         hlist_for_each_entry(tmp, pos, &pci_dev->saved_cap_space, next) {
 189                 if (tmp->cap_nr == cap)
 190                         return tmp;
 191         }
 192         return NULL;
 193 }
 194
 195 static inline void pci_add_saved_cap(struct pci_dev *pci_dev,
 196         struct pci_cap_saved_state *new_cap)
 197 {
 198         hlist_add_head(&new_cap->next, &pci_dev->saved_cap_space);
 199 }
 200
 201 static inline void pci_remove_saved_cap(struct pci_cap_saved_state *cap)
 202 {
 203         hlist_del(&cap->next);
 204 }
 205
 206 /*
 207  *  For PCI devices, the region numbers are assigned this way:
 208  *
 209  *      0-5     standard PCI regions
 210  *      6       expansion ROM
 211  *      7-10    bridges: address space assigned to buses behind the bridge
 212  */
 213
 214 #define PCI_ROM_RESOURCE        6
 215 #define PCI_BRIDGE_RESOURCES    7
 216 #define PCI_NUM_RESOURCES       11
 217
 218 #ifndef PCI_BUS_NUM_RESOURCES
 219 #define PCI_BUS_NUM_RESOURCES   8
 220 #endif
 221
 222 #define PCI_REGION_FLAG_MASK    0x0fU   /* These bits of resource flags tell us the PCI region flags */
 223
 224 struct pci_bus {
 225         struct list_head node;          /* node in list of buses */
 226         struct pci_bus  *parent;        /* parent bus this bridge is on */
 227         struct list_head children;      /* list of child buses */
 228         struct list_head devices;       /* list of devices on this bus */
 229         struct pci_dev  *self;          /* bridge device as seen by parent */
 230         struct resource *resource[PCI_BUS_NUM_RESOURCES];
 231                                         /* address space routed to this bus */
 232
 233         struct pci_ops  *ops;           /* configuration access functions */
 234         void            *sysdata;       /* hook for sys-specific extension */
 235         struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */
 236
 237         unsigned char   number;         /* bus number */
 238         unsigned char   primary;        /* number of primary bridge */
 239         unsigned char   secondary;      /* number of secondary bridge */
 240         unsigned char   subordinate;    /* max number of subordinate buses */
 241
 242         char            name[48];
 243
 244         unsigned short  bridge_ctl;     /* manage NO_ISA/FBB/et al behaviors */
 245         pci_bus_flags_t bus_flags;      /* Inherited by child busses */
 246         struct device           *bridge;
 247         struct class_device     class_dev;
 248         struct bin_attribute    *legacy_io; /* legacy I/O for this bus */
 249         struct bin_attribute    *legacy_mem; /* legacy mem */
 250 };
 251
 252 #define pci_bus_b(n)    list_entry(n, struct pci_bus, node)
 253 #define to_pci_bus(n)   container_of(n, struct pci_bus, class_dev)
 254
 255 /*
 256  * Error values that may be returned by PCI functions.
 257  */
 258 #define PCIBIOS_SUCCESSFUL              0x00
 259 #define PCIBIOS_FUNC_NOT_SUPPORTED      0x81
 260 #define PCIBIOS_BAD_VENDOR_ID           0x83
 261 #define PCIBIOS_DEVICE_NOT_FOUND        0x86
 262 #define PCIBIOS_BAD_REGISTER_NUMBER     0x87
 263 #define PCIBIOS_SET_FAILED              0x88
 264 #define PCIBIOS_BUFFER_TOO_SMALL        0x89
 265
 266 /* Low-level architecture-dependent routines */
 267
 268 struct pci_ops {
 269         int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
 270         int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
 271 };
 272
 273 struct pci_raw_ops {
 274         int (*read)(unsigned int domain, unsigned int bus, unsigned int devfn,
 275                     int reg, int len, u32 *val);
 276         int (*write)(unsigned int domain, unsigned int bus, unsigned int devfn,
 277                      int reg, int len, u32 val);
 278 };
 279
 280 extern struct pci_raw_ops *raw_pci_ops;
 281
 282 struct pci_bus_region {
 283         unsigned long start;
 284         unsigned long end;
 285 };
 286
 287 struct pci_dynids {
 288         spinlock_t lock;            /* protects list, index */
 289         struct list_head list;      /* for IDs added at runtime */
 290         unsigned int use_driver_data:1; /* pci_driver->driver_data is used */
 291 };
 292
 293 /* ---------------------------------------------------------------- */
 294 /** PCI Error Recovery System (PCI-ERS).  If a PCI device driver provides
 295  *  a set fof callbacks in struct pci_error_handlers, then that device driver
 296  *  will be notified of PCI bus errors, and will be driven to recovery
 297  *  when an error occurs.
 298  */
 299
 300 typedef unsigned int __bitwise pci_ers_result_t;
 301
 302 enum pci_ers_result {
 303         /* no result/none/not supported in device driver */
 304         PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1,
 305
 306         /* Device driver can recover without slot reset */
 307         PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2,
 308
 309         /* Device driver wants slot to be reset. */
 310         PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3,
 311
 312         /* Device has completely failed, is unrecoverable */
 313         PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4,
 314
 315         /* Device driver is fully recovered and operational */
 316         PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5,
 317 };
 318
 319 /* PCI bus error event callbacks */
 320 struct pci_error_handlers
 321 {
 322         /* PCI bus error detected on this device */
 323         pci_ers_result_t (*error_detected)(struct pci_dev *dev,
 324                               enum pci_channel_state error);
 325
 326         /* MMIO has been re-enabled, but not DMA */
 327         pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev);
 328
 329         /* PCI Express link has been reset */
 330         pci_ers_result_t (*link_reset)(struct pci_dev *dev);
 331
 332         /* PCI slot has been reset */
 333         pci_ers_result_t (*slot_reset)(struct pci_dev *dev);
 334
 335         /* Device driver may resume normal operations */
 336         void (*resume)(struct pci_dev *dev);
 337 };
 338
 339 /* ---------------------------------------------------------------- */
 340
 341 struct module;
 342 struct pci_driver {
 343         struct list_head node;
 344         char *name;
 345         const struct pci_device_id *id_table;   /* must be non-NULL for probe to be called */
 346         int  (*probe)  (struct pci_dev *dev, const struct pci_device_id *id);   /* New device inserted */
 347         void (*remove) (struct pci_dev *dev);   /* Device removed (NULL if not a hot-plug capable driver) */
 348         int  (*suspend) (struct pci_dev *dev, pm_message_t state);      /* Device suspended */
 349         int  (*resume) (struct pci_dev *dev);                   /* Device woken up */
 350         int  (*enable_wake) (struct pci_dev *dev, pci_power_t state, int enable);   /* Enable wake event */
 351         void (*shutdown) (struct pci_dev *dev);
 352
 353         struct pci_error_handlers *err_handler;
 354         struct device_driver    driver;
 355         struct pci_dynids dynids;
 356 };
 357
 358 #define to_pci_driver(drv) container_of(drv,struct pci_driver, driver)
 359
 360 /**
 361  * PCI_DEVICE - macro used to describe a specific pci device
 362  * @vend: the 16 bit PCI Vendor ID
 363  * @dev: the 16 bit PCI Device ID
 364  *
 365  * This macro is used to create a struct pci_device_id that matches a
 366  * specific device.  The subvendor and subdevice fields will be set to
 367  * PCI_ANY_ID.
 368  */
 369 #define PCI_DEVICE(vend,dev) \
 370         .vendor = (vend), .device = (dev), \
 371         .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
 372
 373 /**
 374  * PCI_DEVICE_CLASS - macro used to describe a specific pci device class
 375  * @dev_class: the class, subclass, prog-if triple for this device
 376  * @dev_class_mask: the class mask for this device
 377  *
 378  * This macro is used to create a struct pci_device_id that matches a
 379  * specific PCI class.  The vendor, device, subvendor, and subdevice
 380  * fields will be set to PCI_ANY_ID.
 381  */
 382 #define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \
 383         .class = (dev_class), .class_mask = (dev_class_mask), \
 384         .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \
 385         .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
 386
 387 /*
 388  * pci_module_init is obsolete, this stays here till we fix up all usages of it
 389  * in the tree.
 390  */
 391 #define pci_module_init pci_register_driver
 392
 393 /* these external functions are only available when PCI support is enabled */
 394 #ifdef CONFIG_PCI
 395
 396 extern struct bus_type pci_bus_type;
 397
 398 /* Do NOT directly access these two variables, unless you are arch specific pci
 399  * code, or pci core code. */
 400 extern struct list_head pci_root_buses; /* list of all known PCI buses */
 401 extern struct list_head pci_devices;    /* list of all devices */
 402
 403 void pcibios_fixup_bus(struct pci_bus *);
 404 int pcibios_enable_device(struct pci_dev *, int mask);
 405 char *pcibios_setup (char *str);
 406
 407 /* Used only when drivers/pci/setup.c is used */
 408 void pcibios_align_resource(void *, struct resource *, resource_size_t,
 409                                 resource_size_t);
 410 void pcibios_update_irq(struct pci_dev *, int irq);
 411
 412 /* Generic PCI functions used internally */
 413
 414 extern struct pci_bus *pci_find_bus(int domain, int busnr);
 415 void pci_bus_add_devices(struct pci_bus *bus);
 416 struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus, struct pci_ops *ops, void *sysdata);
 417 static inline struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops, void *sysdata)
 418 {
 419         struct pci_bus *root_bus;
 420         root_bus = pci_scan_bus_parented(NULL, bus, ops, sysdata);
 421         if (root_bus)
 422                 pci_bus_add_devices(root_bus);
 423         return root_bus;
 424 }
 425 struct pci_bus *pci_create_bus(struct device *parent, int bus, struct pci_ops *ops, void *sysdata);
 426 struct pci_bus * pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev, int busnr);
 427 int pci_scan_slot(struct pci_bus *bus, int devfn);
 428 struct pci_dev * pci_scan_single_device(struct pci_bus *bus, int devfn);
 429 void pci_device_add(struct pci_dev *dev, struct pci_bus *bus);
 430 unsigned int pci_scan_child_bus(struct pci_bus *bus);
 431 void pci_bus_add_device(struct pci_dev *dev);
 432 void pci_read_bridge_bases(struct pci_bus *child);
 433 struct resource *pci_find_parent_resource(const struct pci_dev *dev, struct resource *res);
 434 int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge);
 435 extern struct pci_dev *pci_dev_get(struct pci_dev *dev);
 436 extern void pci_dev_put(struct pci_dev *dev);
 437 extern void pci_remove_bus(struct pci_bus *b);
 438 extern void pci_remove_bus_device(struct pci_dev *dev);
 439 void pci_setup_cardbus(struct pci_bus *bus);
 440
 441 /* Generic PCI functions exported to card drivers */
 442
 443 struct pci_dev *pci_find_device (unsigned int vendor, unsigned int device, const struct pci_dev *from);
 444 struct pci_dev *pci_find_device_reverse (unsigned int vendor, unsigned int device, const struct pci_dev *from);
 445 struct pci_dev *pci_find_slot (unsigned int bus, unsigned int devfn);
 446 int pci_find_capability (struct pci_dev *dev, int cap);
 447 int pci_find_next_capability (struct pci_dev *dev, u8 pos, int cap);
 448 int pci_find_ext_capability (struct pci_dev *dev, int cap);
 449 struct pci_bus * pci_find_next_bus(const struct pci_bus *from);
 450
 451 struct pci_dev *pci_get_device (unsigned int vendor, unsigned int device, struct pci_dev *from);
 452 struct pci_dev *pci_get_subsys (unsigned int vendor, unsigned int device,
 453                                 unsigned int ss_vendor, unsigned int ss_device,
 454                                 struct pci_dev *from);
 455 struct pci_dev *pci_get_slot (struct pci_bus *bus, unsigned int devfn);
 456 struct pci_dev *pci_get_class (unsigned int class, struct pci_dev *from);
 457 int pci_dev_present(const struct pci_device_id *ids);
 458
 459 int pci_bus_read_config_byte (struct pci_bus *bus, unsigned int devfn, int where, u8 *val);
 460 int pci_bus_read_config_word (struct pci_bus *bus, unsigned int devfn, int where, u16 *val);
 461 int pci_bus_read_config_dword (struct pci_bus *bus, unsigned int devfn, int where, u32 *val);
 462 int pci_bus_write_config_byte (struct pci_bus *bus, unsigned int devfn, int where, u8 val);
 463 int pci_bus_write_config_word (struct pci_bus *bus, unsigned int devfn, int where, u16 val);
 464 int pci_bus_write_config_dword (struct pci_bus *bus, unsigned int devfn, int where, u32 val);
 465
 466 static inline int pci_read_config_byte(struct pci_dev *dev, int where, u8 *val)
 467 {
 468         return pci_bus_read_config_byte (dev->bus, dev->devfn, where, val);
 469 }
 470 static inline int pci_read_config_word(struct pci_dev *dev, int where, u16 *val)
 471 {
 472         return pci_bus_read_config_word (dev->bus, dev->devfn, where, val);
 473 }
 474 static inline int pci_read_config_dword(struct pci_dev *dev, int where, u32 *val)
 475 {
 476         return pci_bus_read_config_dword (dev->bus, dev->devfn, where, val);
 477 }
 478 static inline int pci_write_config_byte(struct pci_dev *dev, int where, u8 val)
 479 {
 480         return pci_bus_write_config_byte (dev->bus, dev->devfn, where, val);
 481 }
 482 static inline int pci_write_config_word(struct pci_dev *dev, int where, u16 val)
 483 {
 484         return pci_bus_write_config_word (dev->bus, dev->devfn, where, val);
 485 }
 486 static inline int pci_write_config_dword(struct pci_dev *dev, int where, u32 val)
 487 {
 488         return pci_bus_write_config_dword (dev->bus, dev->devfn, where, val);
 489 }
 490
 491 int pci_enable_device(struct pci_dev *dev);
 492 int pci_enable_device_bars(struct pci_dev *dev, int mask);
 493 void pci_disable_device(struct pci_dev *dev);
 494 void pci_set_master(struct pci_dev *dev);
 495 #define HAVE_PCI_SET_MWI
 496 int pci_set_mwi(struct pci_dev *dev);
 497 void pci_clear_mwi(struct pci_dev *dev);
 498 void pci_intx(struct pci_dev *dev, int enable);
 499 int pci_set_dma_mask(struct pci_dev *dev, u64 mask);
 500 int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask);
 501 void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno);
 502 int pci_assign_resource(struct pci_dev *dev, int i);
 503 int pci_assign_resource_fixed(struct pci_dev *dev, int i);
 504 void pci_restore_bars(struct pci_dev *dev);
 505
 506 /* ROM control related routines */
 507 void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size);
 508 void __iomem __must_check *pci_map_rom_copy(struct pci_dev *pdev, size_t *size);
 509 void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom);
 510 void pci_remove_rom(struct pci_dev *pdev);
 511
 512 /* Power management related routines */
 513 int pci_save_state(struct pci_dev *dev);
 514 int pci_restore_state(struct pci_dev *dev);
 515 int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
 516 pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
 517 int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable);
 518
 519 /* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */
 520 void pci_bus_assign_resources(struct pci_bus *bus);
 521 void pci_bus_size_bridges(struct pci_bus *bus);
 522 int pci_claim_resource(struct pci_dev *, int);
 523 void pci_assign_unassigned_resources(void);
 524 void pdev_enable_device(struct pci_dev *);
 525 void pdev_sort_resources(struct pci_dev *, struct resource_list *);
 526 void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *),
 527                     int (*)(struct pci_dev *, u8, u8));
 528 #define HAVE_PCI_REQ_REGIONS    2
 529 int pci_request_regions(struct pci_dev *, const char *);
 530 void pci_release_regions(struct pci_dev *);
 531 int pci_request_region(struct pci_dev *, int, const char *);
 532 void pci_release_region(struct pci_dev *, int);
 533
 534 /* drivers/pci/bus.c */
 535 int pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res,
 536                            resource_size_t size, resource_size_t align,
 537                            resource_size_t min, unsigned int type_mask,
 538                            void (*alignf)(void *, struct resource *,
 539                                           resource_size_t, resource_size_t),
 540                            void *alignf_data);
 541 void pci_enable_bridges(struct pci_bus *bus);
 542
 543 /* Proper probing supporting hot-pluggable devices */
 544 int __pci_register_driver(struct pci_driver *, struct module *);
 545 static inline int pci_register_driver(struct pci_driver *driver)
 546 {
 547         return __pci_register_driver(driver, THIS_MODULE);
 548 }
 549
 550 void pci_unregister_driver(struct pci_driver *);
 551 void pci_remove_behind_bridge(struct pci_dev *);
 552 struct pci_driver *pci_dev_driver(const struct pci_dev *);
 553 const struct pci_device_id *pci_match_device(struct pci_driver *drv, struct pci_dev *dev);
 554 const struct pci_device_id *pci_match_id(const struct pci_device_id *ids, struct pci_dev *dev);
 555 int pci_scan_bridge(struct pci_bus *bus, struct pci_dev * dev, int max, int pass);
 556
 557 void pci_walk_bus(struct pci_bus *top, void (*cb)(struct pci_dev *, void *),
 558                   void *userdata);
 559 int pci_cfg_space_size(struct pci_dev *dev);
 560 unsigned char pci_bus_max_busnr(struct pci_bus* bus);
 561
 562 /* kmem_cache style wrapper around pci_alloc_consistent() */
 563
 564 #include <linux/dmapool.h>
 565
 566 #define pci_pool dma_pool
 567 #define pci_pool_create(name, pdev, size, align, allocation) \
 568                 dma_pool_create(name, &pdev->dev, size, align, allocation)
 569 #define pci_pool_destroy(pool) dma_pool_destroy(pool)
 570 #define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle)
 571 #define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr)
 572
 573 enum pci_dma_burst_strategy {
 574         PCI_DMA_BURST_INFINITY, /* make bursts as large as possible,
 575                                    strategy_parameter is N/A */
 576         PCI_DMA_BURST_BOUNDARY, /* disconnect at every strategy_parameter
 577                                    byte boundaries */
 578         PCI_DMA_BURST_MULTIPLE, /* disconnect at some multiple of
 579                                    strategy_parameter byte boundaries */
 580 };
 581
 582 #if defined(CONFIG_ISA) || defined(CONFIG_EISA)
 583 extern struct pci_dev *isa_bridge;
 584 #endif
 585
 586 struct msix_entry {
 587         u16     vector; /* kernel uses to write allocated vector */
 588         u16     entry;  /* driver uses to specify entry, OS writes */
 589 };
 590
 591 #ifndef CONFIG_PCI_MSI
 592 static inline void pci_scan_msi_device(struct pci_dev *dev) {}
 593 static inline int pci_enable_msi(struct pci_dev *dev) {return -1;}
 594 static inline void pci_disable_msi(struct pci_dev *dev) {}
 595 static inline int pci_enable_msix(struct pci_dev* dev,
 596         struct msix_entry *entries, int nvec) {return -1;}
 597 static inline void pci_disable_msix(struct pci_dev *dev) {}
 598 static inline void msi_remove_pci_irq_vectors(struct pci_dev *dev) {}
 599 #else
 600 extern void pci_scan_msi_device(struct pci_dev *dev);
 601 extern int pci_enable_msi(struct pci_dev *dev);
 602 extern void pci_disable_msi(struct pci_dev *dev);
 603 extern int pci_enable_msix(struct pci_dev* dev,
 604         struct msix_entry *entries, int nvec);
 605 extern void pci_disable_msix(struct pci_dev *dev);
 606 extern void msi_remove_pci_irq_vectors(struct pci_dev *dev);
 607 #endif
 608
 609 extern void pci_block_user_cfg_access(struct pci_dev *dev);
 610 extern void pci_unblock_user_cfg_access(struct pci_dev *dev);
 611
 612 /*
 613  * PCI domain support.  Sometimes called PCI segment (eg by ACPI),
 614  * a PCI domain is defined to be a set of PCI busses which share
 615  * configuration space.
 616  */
 617 #ifndef CONFIG_PCI_DOMAINS
 618 static inline int pci_domain_nr(struct pci_bus *bus) { return 0; }
 619 static inline int pci_proc_domain(struct pci_bus *bus)
 620 {
 621         return 0;
 622 }
 623 #endif
 624
 625 #else /* CONFIG_PCI is not enabled */
 626
 627 /*
 628  *  If the system does not have PCI, clearly these return errors.  Define
 629  *  these as simple inline functions to avoid hair in drivers.
 630  */
 631
 632 #define _PCI_NOP(o,s,t) \
 633         static inline int pci_##o##_config_##s (struct pci_dev *dev, int where, t val) \
 634                 { return PCIBIOS_FUNC_NOT_SUPPORTED; }
 635 #define _PCI_NOP_ALL(o,x)       _PCI_NOP(o,byte,u8 x) \
 636                                 _PCI_NOP(o,word,u16 x) \
 637                                 _PCI_NOP(o,dword,u32 x)
 638 _PCI_NOP_ALL(read, *)
 639 _PCI_NOP_ALL(write,)
 640
 641 static inline struct pci_dev *pci_find_device(unsigned int vendor, unsigned int device, const struct pci_dev *from)
 642 { return NULL; }
 643
 644 static inline struct pci_dev *pci_find_slot(unsigned int bus, unsigned int devfn)
 645 { return NULL; }
 646
 647 static inline struct pci_dev *pci_get_device (unsigned int vendor, unsigned int device, struct pci_dev *from)
 648 { return NULL; }
 649
 650 static inline struct pci_dev *pci_get_subsys (unsigned int vendor, unsigned int device,
 651 unsigned int ss_vendor, unsigned int ss_device, struct pci_dev *from)
 652 { return NULL; }
 653
 654 static inline struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from)
 655 { return NULL; }
 656
 657 #define pci_dev_present(ids)    (0)
 658 #define pci_dev_put(dev)        do { } while (0)
 659
 660 static inline void pci_set_master(struct pci_dev *dev) { }
 661 static inline int pci_enable_device(struct pci_dev *dev) { return -EIO; }
 662 static inline void pci_disable_device(struct pci_dev *dev) { }
 663 static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask) { return -EIO; }
 664 static inline int pci_assign_resource(struct pci_dev *dev, int i) { return -EBUSY;}
 665 static inline int __pci_register_driver(struct pci_driver *drv, struct module *owner) { return 0;}
 666 static inline int pci_register_driver(struct pci_driver *drv) { return 0;}
 667 static inline void pci_unregister_driver(struct pci_driver *drv) { }
 668 static inline int pci_find_capability (struct pci_dev *dev, int cap) {return 0; }
 669 static inline int pci_find_next_capability (struct pci_dev *dev, u8 post, int cap) { return 0; }
 670 static inline int pci_find_ext_capability (struct pci_dev *dev, int cap) {return 0; }
 671 static inline const struct pci_device_id *pci_match_device(const struct pci_device_id *ids, const struct pci_dev *dev) { return NULL; }
 672
 673 /* Power management related routines */
 674 static inline int pci_save_state(struct pci_dev *dev) { return 0; }
 675 static inline int pci_restore_state(struct pci_dev *dev) { return 0; }
 676 static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state) { return 0; }
 677 static inline pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state) { return PCI_D0; }
 678 static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable) { return 0; }
 679
 680 #define isa_bridge      ((struct pci_dev *)NULL)
 681
 682 #define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0)
 683
 684 static inline void pci_block_user_cfg_access(struct pci_dev *dev) { }
 685 static inline void pci_unblock_user_cfg_access(struct pci_dev *dev) { }
 686
 687 #endif /* CONFIG_PCI */
 688
 689 /* Include architecture-dependent settings and functions */
 690
 691 #include <asm/pci.h>
 692
 693 /* these helpers provide future and backwards compatibility
 694  * for accessing popular PCI BAR info */
 695 #define pci_resource_start(dev,bar)   ((dev)->resource[(bar)].start)
 696 #define pci_resource_end(dev,bar)     ((dev)->resource[(bar)].end)
 697 #define pci_resource_flags(dev,bar)   ((dev)->resource[(bar)].flags)
 698 #define pci_resource_len(dev,bar) \
 699         ((pci_resource_start((dev),(bar)) == 0 &&       \
 700           pci_resource_end((dev),(bar)) ==              \
 701           pci_resource_start((dev),(bar))) ? 0 :        \
 702                                                         \
 703          (pci_resource_end((dev),(bar)) -               \
 704           pci_resource_start((dev),(bar)) + 1))
 705
 706 /* Similar to the helpers above, these manipulate per-pci_dev
 707  * driver-specific data.  They are really just a wrapper around
 708  * the generic device structure functions of these calls.
 709  */
 710 static inline void *pci_get_drvdata (struct pci_dev *pdev)
 711 {
 712         return dev_get_drvdata(&pdev->dev);
 713 }
 714
 715 static inline void pci_set_drvdata (struct pci_dev *pdev, void *data)
 716 {
 717         dev_set_drvdata(&pdev->dev, data);
 718 }
 719
 720 /* If you want to know what to call your pci_dev, ask this function.
 721  * Again, it's a wrapper around the generic device.
 722  */
 723 static inline char *pci_name(struct pci_dev *pdev)
 724 {
 725         return pdev->dev.bus_id;
 726 }
 727
 728
 729 /* Some archs don't want to expose struct resource to userland as-is
 730  * in sysfs and /proc
 731  */
 732 #ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER
 733 static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,
 734                 const struct resource *rsrc, resource_size_t *start,
 735                 resource_size_t *end)
 736 {
 737         *start = rsrc->start;
 738         *end = rsrc->end;
 739 }
 740 #endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */
 741
 742
 743 /*
 744  *  The world is not perfect and supplies us with broken PCI devices.
 745  *  For at least a part of these bugs we need a work-around, so both
 746  *  generic (drivers/pci/quirks.c) and per-architecture code can define
 747  *  fixup hooks to be called for particular buggy devices.
 748  */
 749
 750 struct pci_fixup {
 751         u16 vendor, device;     /* You can use PCI_ANY_ID here of course */
 752         void (*hook)(struct pci_dev *dev);
 753 };
 754
 755 enum pci_fixup_pass {
 756         pci_fixup_early,        /* Before probing BARs */
 757         pci_fixup_header,       /* After reading configuration header */
 758         pci_fixup_final,        /* Final phase of device fixups */
 759         pci_fixup_enable,       /* pci_enable_device() time */
 760 };
 761
 762 /* Anonymous variables would be nice... */
 763 #define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, hook)  \
 764         static const struct pci_fixup __pci_fixup_##name __attribute_used__ \
 765         __attribute__((__section__(#section))) = { vendor, device, hook };
 766 #define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook)                   \
 767         DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early,                     \
 768                         vendor##device##hook, vendor, device, hook)
 769 #define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook)                  \
 770         DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header,                    \
 771                         vendor##device##hook, vendor, device, hook)
 772 #define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook)                   \
 773         DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final,                     \
 774                         vendor##device##hook, vendor, device, hook)
 775 #define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook)                  \
 776         DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable,                    \
 777                         vendor##device##hook, vendor, device, hook)
 778
 779
 780 void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev);
 781
 782 extern int pci_pci_problems;
 783 #define PCIPCI_FAIL             1
 784 #define PCIPCI_TRITON           2
 785 #define PCIPCI_NATOMA           4
 786 #define PCIPCI_VIAETBF          8
 787 #define PCIPCI_VSFX             16
 788 #define PCIPCI_ALIMAGIK         32
 789
 790 #endif /* __KERNEL__ */
 791 #endif /* LINUX_PCI_H */