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1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3 * Framework and drivers for configuring and reading different PHYs
4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c
5 *
6 * Author: Andy Fleming
7 *
8 * Copyright (c) 2004 Freescale Semiconductor, Inc.
9 */
10
11 #ifndef __PHY_H
12 #define __PHY_H
13
14 #include <linux/compiler.h>
15 #include <linux/spinlock.h>
16 #include <linux/ethtool.h>
17 #include <linux/linkmode.h>
18 #include <linux/mdio.h>
19 #include <linux/mii.h>
20 #include <linux/mii_timestamper.h>
21 #include <linux/module.h>
22 #include <linux/timer.h>
23 #include <linux/workqueue.h>
24 #include <linux/mod_devicetable.h>
25 #include <linux/u64_stats_sync.h>
26
27 #include <linux/atomic.h>
28
29 #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
30 SUPPORTED_TP | \
31 SUPPORTED_MII)
32
33 #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
34 SUPPORTED_10baseT_Full)
35
36 #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
37 SUPPORTED_100baseT_Full)
38
39 #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
40 SUPPORTED_1000baseT_Full)
41
42 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init;
43 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init;
44 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init;
45 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init;
46 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init;
47 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init;
48 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init;
49 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init;
50
51 #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features)
52 #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features)
53 #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features)
54 #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features)
55 #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features)
56 #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features)
57 #define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features)
58 #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features)
59
60 extern const int phy_basic_ports_array[3];
61 extern const int phy_fibre_port_array[1];
62 extern const int phy_all_ports_features_array[7];
63 extern const int phy_10_100_features_array[4];
64 extern const int phy_basic_t1_features_array[2];
65 extern const int phy_gbit_features_array[2];
66 extern const int phy_10gbit_features_array[1];
67
68 /*
69 * Set phydev->irq to PHY_POLL if interrupts are not supported,
70 * or not desired for this PHY. Set to PHY_IGNORE_INTERRUPT if
71 * the attached driver handles the interrupt
72 */
73 #define PHY_POLL -1
74 #define PHY_IGNORE_INTERRUPT -2
75
76 #define PHY_IS_INTERNAL 0x00000001
77 #define PHY_RST_AFTER_CLK_EN 0x00000002
78 #define MDIO_DEVICE_IS_PHY 0x80000000
79
80 /* Interface Mode definitions */
81 typedef enum {
82 PHY_INTERFACE_MODE_NA,
83 PHY_INTERFACE_MODE_INTERNAL,
84 PHY_INTERFACE_MODE_MII,
85 PHY_INTERFACE_MODE_GMII,
86 PHY_INTERFACE_MODE_SGMII,
87 PHY_INTERFACE_MODE_TBI,
88 PHY_INTERFACE_MODE_REVMII,
89 PHY_INTERFACE_MODE_RMII,
90 PHY_INTERFACE_MODE_RGMII,
91 PHY_INTERFACE_MODE_RGMII_ID,
92 PHY_INTERFACE_MODE_RGMII_RXID,
93 PHY_INTERFACE_MODE_RGMII_TXID,
94 PHY_INTERFACE_MODE_RTBI,
95 PHY_INTERFACE_MODE_SMII,
96 PHY_INTERFACE_MODE_XGMII,
97 PHY_INTERFACE_MODE_MOCA,
98 PHY_INTERFACE_MODE_QSGMII,
99 PHY_INTERFACE_MODE_TRGMII,
100 PHY_INTERFACE_MODE_1000BASEX,
101 PHY_INTERFACE_MODE_2500BASEX,
102 PHY_INTERFACE_MODE_RXAUI,
103 PHY_INTERFACE_MODE_XAUI,
104 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */
105 PHY_INTERFACE_MODE_10GBASER,
106 PHY_INTERFACE_MODE_USXGMII,
107 /* 10GBASE-KR - with Clause 73 AN */
108 PHY_INTERFACE_MODE_10GKR,
109 PHY_INTERFACE_MODE_MAX,
110 } phy_interface_t;
111
112 /**
113 * phy_supported_speeds - return all speeds currently supported by a phy device
114 * @phy: The phy device to return supported speeds of.
115 * @speeds: buffer to store supported speeds in.
116 * @size: size of speeds buffer.
117 *
118 * Description: Returns the number of supported speeds, and fills
119 * the speeds buffer with the supported speeds. If speeds buffer is
120 * too small to contain all currently supported speeds, will return as
121 * many speeds as can fit.
122 */
123 unsigned int phy_supported_speeds(struct phy_device *phy,
124 unsigned int *speeds,
125 unsigned int size);
126
127 /**
128 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode
129 * @interface: enum phy_interface_t value
130 *
131 * Description: maps 'enum phy_interface_t' defined in this file
132 * into the device tree binding of 'phy-mode', so that Ethernet
133 * device driver can get phy interface from device tree.
134 */
135 static inline const char *phy_modes(phy_interface_t interface)
136 {
137 switch (interface) {
138 case PHY_INTERFACE_MODE_NA:
139 return "";
140 case PHY_INTERFACE_MODE_INTERNAL:
141 return "internal";
142 case PHY_INTERFACE_MODE_MII:
143 return "mii";
144 case PHY_INTERFACE_MODE_GMII:
145 return "gmii";
146 case PHY_INTERFACE_MODE_SGMII:
147 return "sgmii";
148 case PHY_INTERFACE_MODE_TBI:
149 return "tbi";
150 case PHY_INTERFACE_MODE_REVMII:
151 return "rev-mii";
152 case PHY_INTERFACE_MODE_RMII:
153 return "rmii";
154 case PHY_INTERFACE_MODE_RGMII:
155 return "rgmii";
156 case PHY_INTERFACE_MODE_RGMII_ID:
157 return "rgmii-id";
158 case PHY_INTERFACE_MODE_RGMII_RXID:
159 return "rgmii-rxid";
160 case PHY_INTERFACE_MODE_RGMII_TXID:
161 return "rgmii-txid";
162 case PHY_INTERFACE_MODE_RTBI:
163 return "rtbi";
164 case PHY_INTERFACE_MODE_SMII:
165 return "smii";
166 case PHY_INTERFACE_MODE_XGMII:
167 return "xgmii";
168 case PHY_INTERFACE_MODE_MOCA:
169 return "moca";
170 case PHY_INTERFACE_MODE_QSGMII:
171 return "qsgmii";
172 case PHY_INTERFACE_MODE_TRGMII:
173 return "trgmii";
174 case PHY_INTERFACE_MODE_1000BASEX:
175 return "1000base-x";
176 case PHY_INTERFACE_MODE_2500BASEX:
177 return "2500base-x";
178 case PHY_INTERFACE_MODE_RXAUI:
179 return "rxaui";
180 case PHY_INTERFACE_MODE_XAUI:
181 return "xaui";
182 case PHY_INTERFACE_MODE_10GBASER:
183 return "10gbase-r";
184 case PHY_INTERFACE_MODE_USXGMII:
185 return "usxgmii";
186 case PHY_INTERFACE_MODE_10GKR:
187 return "10gbase-kr";
188 default:
189 return "unknown";
190 }
191 }
192
193
194 #define PHY_INIT_TIMEOUT 100000
195 #define PHY_FORCE_TIMEOUT 10
196
197 #define PHY_MAX_ADDR 32
198
199 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */
200 #define PHY_ID_FMT "%s:%02x"
201
202 #define MII_BUS_ID_SIZE 61
203
204 /* Or MII_ADDR_C45 into regnum for read/write on mii_bus to enable the 21 bit
205 IEEE 802.3ae clause 45 addressing mode used by 10GIGE phy chips. */
206 #define MII_ADDR_C45 (1<<30)
207 #define MII_DEVADDR_C45_SHIFT 16
208 #define MII_REGADDR_C45_MASK GENMASK(15, 0)
209
210 struct device;
211 struct phylink;
212 struct sfp_bus;
213 struct sfp_upstream_ops;
214 struct sk_buff;
215
216 struct mdio_bus_stats {
217 u64_stats_t transfers;
218 u64_stats_t errors;
219 u64_stats_t writes;
220 u64_stats_t reads;
221 /* Must be last, add new statistics above */
222 struct u64_stats_sync syncp;
223 };
224
225 /*
226 * The Bus class for PHYs. Devices which provide access to
227 * PHYs should register using this structure
228 */
229 struct mii_bus {
230 struct module *owner;
231 const char *name;
232 char id[MII_BUS_ID_SIZE];
233 void *priv;
234 int (*read)(struct mii_bus *bus, int addr, int regnum);
235 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val);
236 int (*reset)(struct mii_bus *bus);
237 struct mdio_bus_stats stats[PHY_MAX_ADDR];
238
239 /*
240 * A lock to ensure that only one thing can read/write
241 * the MDIO bus at a time
242 */
243 struct mutex mdio_lock;
244
245 struct device *parent;
246 enum {
247 MDIOBUS_ALLOCATED = 1,
248 MDIOBUS_REGISTERED,
249 MDIOBUS_UNREGISTERED,
250 MDIOBUS_RELEASED,
251 } state;
252 struct device dev;
253
254 /* list of all PHYs on bus */
255 struct mdio_device *mdio_map[PHY_MAX_ADDR];
256
257 /* PHY addresses to be ignored when probing */
258 u32 phy_mask;
259
260 /* PHY addresses to ignore the TA/read failure */
261 u32 phy_ignore_ta_mask;
262
263 /*
264 * An array of interrupts, each PHY's interrupt at the index
265 * matching its address
266 */
267 int irq[PHY_MAX_ADDR];
268
269 /* GPIO reset pulse width in microseconds */
270 int reset_delay_us;
271 /* RESET GPIO descriptor pointer */
272 struct gpio_desc *reset_gpiod;
273 };
274 #define to_mii_bus(d) container_of(d, struct mii_bus, dev)
275
276 struct mii_bus *mdiobus_alloc_size(size_t);
277 static inline struct mii_bus *mdiobus_alloc(void)
278 {
279 return mdiobus_alloc_size(0);
280 }
281
282 int __mdiobus_register(struct mii_bus *bus, struct module *owner);
283 #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE)
284 void mdiobus_unregister(struct mii_bus *bus);
285 void mdiobus_free(struct mii_bus *bus);
286 struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv);
287 static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev)
288 {
289 return devm_mdiobus_alloc_size(dev, 0);
290 }
291
292 void devm_mdiobus_free(struct device *dev, struct mii_bus *bus);
293 struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr);
294
295 #define PHY_INTERRUPT_DISABLED false
296 #define PHY_INTERRUPT_ENABLED true
297
298 /* PHY state machine states:
299 *
300 * DOWN: PHY device and driver are not ready for anything. probe
301 * should be called if and only if the PHY is in this state,
302 * given that the PHY device exists.
303 * - PHY driver probe function will set the state to READY
304 *
305 * READY: PHY is ready to send and receive packets, but the
306 * controller is not. By default, PHYs which do not implement
307 * probe will be set to this state by phy_probe().
308 * - start will set the state to UP
309 *
310 * UP: The PHY and attached device are ready to do work.
311 * Interrupts should be started here.
312 * - timer moves to NOLINK or RUNNING
313 *
314 * NOLINK: PHY is up, but not currently plugged in.
315 * - irq or timer will set RUNNING if link comes back
316 * - phy_stop moves to HALTED
317 *
318 * RUNNING: PHY is currently up, running, and possibly sending
319 * and/or receiving packets
320 * - irq or timer will set NOLINK if link goes down
321 * - phy_stop moves to HALTED
322 *
323 * HALTED: PHY is up, but no polling or interrupts are done. Or
324 * PHY is in an error state.
325 * - phy_start moves to UP
326 */
327 enum phy_state {
328 PHY_DOWN = 0,
329 PHY_READY,
330 PHY_HALTED,
331 PHY_UP,
332 PHY_RUNNING,
333 PHY_NOLINK,
334 };
335
336 /**
337 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers
338 * @devices_in_package: Bit vector of devices present.
339 * @device_ids: The device identifer for each present device.
340 */
341 struct phy_c45_device_ids {
342 u32 devices_in_package;
343 u32 device_ids[8];
344 };
345
346 struct macsec_context;
347 struct macsec_ops;
348
349 /* phy_device: An instance of a PHY
350 *
351 * drv: Pointer to the driver for this PHY instance
352 * phy_id: UID for this device found during discovery
353 * c45_ids: 802.3-c45 Device Identifers if is_c45.
354 * is_c45: Set to true if this phy uses clause 45 addressing.
355 * is_internal: Set to true if this phy is internal to a MAC.
356 * is_pseudo_fixed_link: Set to true if this phy is an Ethernet switch, etc.
357 * is_gigabit_capable: Set to true if PHY supports 1000Mbps
358 * has_fixups: Set to true if this phy has fixups/quirks.
359 * suspended: Set to true if this phy has been suspended successfully.
360 * suspended_by_mdio_bus: Set to true if this phy was suspended by MDIO bus.
361 * sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal.
362 * loopback_enabled: Set true if this phy has been loopbacked successfully.
363 * state: state of the PHY for management purposes
364 * dev_flags: Device-specific flags used by the PHY driver.
365 * irq: IRQ number of the PHY's interrupt (-1 if none)
366 * phy_timer: The timer for handling the state machine
367 * sfp_bus_attached: flag indicating whether the SFP bus has been attached
368 * sfp_bus: SFP bus attached to this PHY's fiber port
369 * attached_dev: The attached enet driver's device instance ptr
370 * adjust_link: Callback for the enet controller to respond to
371 * changes in the link state.
372 * macsec_ops: MACsec offloading ops.
373 *
374 * speed, duplex, pause, supported, advertising, lp_advertising,
375 * and autoneg are used like in mii_if_info
376 *
377 * interrupts currently only supports enabled or disabled,
378 * but could be changed in the future to support enabling
379 * and disabling specific interrupts
380 *
381 * Contains some infrastructure for polling and interrupt
382 * handling, as well as handling shifts in PHY hardware state
383 */
384 struct phy_device {
385 struct mdio_device mdio;
386
387 /* Information about the PHY type */
388 /* And management functions */
389 struct phy_driver *drv;
390
391 u32 phy_id;
392
393 struct phy_c45_device_ids c45_ids;
394 unsigned is_c45:1;
395 unsigned is_internal:1;
396 unsigned is_pseudo_fixed_link:1;
397 unsigned is_gigabit_capable:1;
398 unsigned has_fixups:1;
399 unsigned suspended:1;
400 unsigned suspended_by_mdio_bus:1;
401 unsigned sysfs_links:1;
402 unsigned loopback_enabled:1;
403
404 unsigned autoneg:1;
405 /* The most recently read link state */
406 unsigned link:1;
407 unsigned autoneg_complete:1;
408
409 /* Interrupts are enabled */
410 unsigned interrupts:1;
411
412 enum phy_state state;
413
414 u32 dev_flags;
415
416 phy_interface_t interface;
417
418 /*
419 * forced speed & duplex (no autoneg)
420 * partner speed & duplex & pause (autoneg)
421 */
422 int speed;
423 int duplex;
424 int pause;
425 int asym_pause;
426
427 /* Union of PHY and Attached devices' supported link modes */
428 /* See ethtool.h for more info */
429 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
430 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising);
431 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising);
432 /* used with phy_speed_down */
433 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old);
434
435 /* Energy efficient ethernet modes which should be prohibited */
436 u32 eee_broken_modes;
437
438 #ifdef CONFIG_LED_TRIGGER_PHY
439 struct phy_led_trigger *phy_led_triggers;
440 unsigned int phy_num_led_triggers;
441 struct phy_led_trigger *last_triggered;
442
443 struct phy_led_trigger *led_link_trigger;
444 #endif
445
446 /*
447 * Interrupt number for this PHY
448 * -1 means no interrupt
449 */
450 int irq;
451
452 /* private data pointer */
453 /* For use by PHYs to maintain extra state */
454 void *priv;
455
456 /* Interrupt and Polling infrastructure */
457 struct delayed_work state_queue;
458
459 struct mutex lock;
460
461 /* This may be modified under the rtnl lock */
462 bool sfp_bus_attached;
463 struct sfp_bus *sfp_bus;
464 struct phylink *phylink;
465 struct net_device *attached_dev;
466 struct mii_timestamper *mii_ts;
467
468 u8 mdix;
469 u8 mdix_ctrl;
470
471 void (*phy_link_change)(struct phy_device *, bool up, bool do_carrier);
472 void (*adjust_link)(struct net_device *dev);
473
474 #if IS_ENABLED(CONFIG_MACSEC)
475 /* MACsec management functions */
476 const struct macsec_ops *macsec_ops;
477 #endif
478 };
479 #define to_phy_device(d) container_of(to_mdio_device(d), \
480 struct phy_device, mdio)
481
482 /* struct phy_driver: Driver structure for a particular PHY type
483 *
484 * driver_data: static driver data
485 * phy_id: The result of reading the UID registers of this PHY
486 * type, and ANDing them with the phy_id_mask. This driver
487 * only works for PHYs with IDs which match this field
488 * name: The friendly name of this PHY type
489 * phy_id_mask: Defines the important bits of the phy_id
490 * features: A mandatory list of features (speed, duplex, etc)
491 * supported by this PHY
492 * flags: A bitfield defining certain other features this PHY
493 * supports (like interrupts)
494 *
495 * All functions are optional. If config_aneg or read_status
496 * are not implemented, the phy core uses the genphy versions.
497 * Note that none of these functions should be called from
498 * interrupt time. The goal is for the bus read/write functions
499 * to be able to block when the bus transaction is happening,
500 * and be freed up by an interrupt (The MPC85xx has this ability,
501 * though it is not currently supported in the driver).
502 */
503 struct phy_driver {
504 struct mdio_driver_common mdiodrv;
505 u32 phy_id;
506 char *name;
507 u32 phy_id_mask;
508 const unsigned long * const features;
509 u32 flags;
510 const void *driver_data;
511
512 /*
513 * Called to issue a PHY software reset
514 */
515 int (*soft_reset)(struct phy_device *phydev);
516
517 /*
518 * Called to initialize the PHY,
519 * including after a reset
520 */
521 int (*config_init)(struct phy_device *phydev);
522
523 /*
524 * Called during discovery. Used to set
525 * up device-specific structures, if any
526 */
527 int (*probe)(struct phy_device *phydev);
528
529 /*
530 * Probe the hardware to determine what abilities it has.
531 * Should only set phydev->supported.
532 */
533 int (*get_features)(struct phy_device *phydev);
534
535 /* PHY Power Management */
536 int (*suspend)(struct phy_device *phydev);
537 int (*resume)(struct phy_device *phydev);
538
539 /*
540 * Configures the advertisement and resets
541 * autonegotiation if phydev->autoneg is on,
542 * forces the speed to the current settings in phydev
543 * if phydev->autoneg is off
544 */
545 int (*config_aneg)(struct phy_device *phydev);
546
547 /* Determines the auto negotiation result */
548 int (*aneg_done)(struct phy_device *phydev);
549
550 /* Determines the negotiated speed and duplex */
551 int (*read_status)(struct phy_device *phydev);
552
553 /* Clears any pending interrupts */
554 int (*ack_interrupt)(struct phy_device *phydev);
555
556 /* Enables or disables interrupts */
557 int (*config_intr)(struct phy_device *phydev);
558
559 /*
560 * Checks if the PHY generated an interrupt.
561 * For multi-PHY devices with shared PHY interrupt pin
562 * Set interrupt bits have to be cleared.
563 */
564 int (*did_interrupt)(struct phy_device *phydev);
565
566 /* Override default interrupt handling */
567 int (*handle_interrupt)(struct phy_device *phydev);
568
569 /* Clears up any memory if needed */
570 void (*remove)(struct phy_device *phydev);
571
572 /* Returns true if this is a suitable driver for the given
573 * phydev. If NULL, matching is based on phy_id and
574 * phy_id_mask.
575 */
576 int (*match_phy_device)(struct phy_device *phydev);
577
578 /* Some devices (e.g. qnap TS-119P II) require PHY register changes to
579 * enable Wake on LAN, so set_wol is provided to be called in the
580 * ethernet driver's set_wol function. */
581 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
582
583 /* See set_wol, but for checking whether Wake on LAN is enabled. */
584 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
585
586 /*
587 * Called to inform a PHY device driver when the core is about to
588 * change the link state. This callback is supposed to be used as
589 * fixup hook for drivers that need to take action when the link
590 * state changes. Drivers are by no means allowed to mess with the
591 * PHY device structure in their implementations.
592 */
593 void (*link_change_notify)(struct phy_device *dev);
594
595 /*
596 * Phy specific driver override for reading a MMD register.
597 * This function is optional for PHY specific drivers. When
598 * not provided, the default MMD read function will be used
599 * by phy_read_mmd(), which will use either a direct read for
600 * Clause 45 PHYs or an indirect read for Clause 22 PHYs.
601 * devnum is the MMD device number within the PHY device,
602 * regnum is the register within the selected MMD device.
603 */
604 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum);
605
606 /*
607 * Phy specific driver override for writing a MMD register.
608 * This function is optional for PHY specific drivers. When
609 * not provided, the default MMD write function will be used
610 * by phy_write_mmd(), which will use either a direct write for
611 * Clause 45 PHYs, or an indirect write for Clause 22 PHYs.
612 * devnum is the MMD device number within the PHY device,
613 * regnum is the register within the selected MMD device.
614 * val is the value to be written.
615 */
616 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum,
617 u16 val);
618
619 int (*read_page)(struct phy_device *dev);
620 int (*write_page)(struct phy_device *dev, int page);
621
622 /* Get the size and type of the eeprom contained within a plug-in
623 * module */
624 int (*module_info)(struct phy_device *dev,
625 struct ethtool_modinfo *modinfo);
626
627 /* Get the eeprom information from the plug-in module */
628 int (*module_eeprom)(struct phy_device *dev,
629 struct ethtool_eeprom *ee, u8 *data);
630
631 /* Get statistics from the phy using ethtool */
632 int (*get_sset_count)(struct phy_device *dev);
633 void (*get_strings)(struct phy_device *dev, u8 *data);
634 void (*get_stats)(struct phy_device *dev,
635 struct ethtool_stats *stats, u64 *data);
636
637 /* Get and Set PHY tunables */
638 int (*get_tunable)(struct phy_device *dev,
639 struct ethtool_tunable *tuna, void *data);
640 int (*set_tunable)(struct phy_device *dev,
641 struct ethtool_tunable *tuna,
642 const void *data);
643 int (*set_loopback)(struct phy_device *dev, bool enable);
644 };
645 #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \
646 struct phy_driver, mdiodrv)
647
648 #define PHY_ANY_ID "MATCH ANY PHY"
649 #define PHY_ANY_UID 0xffffffff
650
651 #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0)
652 #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4)
653 #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10)
654
655 /* A Structure for boards to register fixups with the PHY Lib */
656 struct phy_fixup {
657 struct list_head list;
658 char bus_id[MII_BUS_ID_SIZE + 3];
659 u32 phy_uid;
660 u32 phy_uid_mask;
661 int (*run)(struct phy_device *phydev);
662 };
663
664 const char *phy_speed_to_str(int speed);
665 const char *phy_duplex_to_str(unsigned int duplex);
666
667 /* A structure for mapping a particular speed and duplex
668 * combination to a particular SUPPORTED and ADVERTISED value
669 */
670 struct phy_setting {
671 u32 speed;
672 u8 duplex;
673 u8 bit;
674 };
675
676 const struct phy_setting *
677 phy_lookup_setting(int speed, int duplex, const unsigned long *mask,
678 bool exact);
679 size_t phy_speeds(unsigned int *speeds, size_t size,
680 unsigned long *mask);
681 void of_set_phy_supported(struct phy_device *phydev);
682 void of_set_phy_eee_broken(struct phy_device *phydev);
683 int phy_speed_down_core(struct phy_device *phydev);
684
685 /**
686 * phy_is_started - Convenience function to check whether PHY is started
687 * @phydev: The phy_device struct
688 */
689 static inline bool phy_is_started(struct phy_device *phydev)
690 {
691 return phydev->state >= PHY_UP;
692 }
693
694 void phy_resolve_aneg_pause(struct phy_device *phydev);
695 void phy_resolve_aneg_linkmode(struct phy_device *phydev);
696
697 /**
698 * phy_read - Convenience function for reading a given PHY register
699 * @phydev: the phy_device struct
700 * @regnum: register number to read
701 *
702 * NOTE: MUST NOT be called from interrupt context,
703 * because the bus read/write functions may wait for an interrupt
704 * to conclude the operation.
705 */
706 static inline int phy_read(struct phy_device *phydev, u32 regnum)
707 {
708 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
709 }
710
711 /**
712 * __phy_read - convenience function for reading a given PHY register
713 * @phydev: the phy_device struct
714 * @regnum: register number to read
715 *
716 * The caller must have taken the MDIO bus lock.
717 */
718 static inline int __phy_read(struct phy_device *phydev, u32 regnum)
719 {
720 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
721 }
722
723 /**
724 * phy_write - Convenience function for writing a given PHY register
725 * @phydev: the phy_device struct
726 * @regnum: register number to write
727 * @val: value to write to @regnum
728 *
729 * NOTE: MUST NOT be called from interrupt context,
730 * because the bus read/write functions may wait for an interrupt
731 * to conclude the operation.
732 */
733 static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val)
734 {
735 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val);
736 }
737
738 /**
739 * __phy_write - Convenience function for writing a given PHY register
740 * @phydev: the phy_device struct
741 * @regnum: register number to write
742 * @val: value to write to @regnum
743 *
744 * The caller must have taken the MDIO bus lock.
745 */
746 static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val)
747 {
748 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum,
749 val);
750 }
751
752 /**
753 * phy_read_mmd - Convenience function for reading a register
754 * from an MMD on a given PHY.
755 * @phydev: The phy_device struct
756 * @devad: The MMD to read from
757 * @regnum: The register on the MMD to read
758 *
759 * Same rules as for phy_read();
760 */
761 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
762
763 /**
764 * __phy_read_mmd - Convenience function for reading a register
765 * from an MMD on a given PHY.
766 * @phydev: The phy_device struct
767 * @devad: The MMD to read from
768 * @regnum: The register on the MMD to read
769 *
770 * Same rules as for __phy_read();
771 */
772 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
773
774 /**
775 * phy_write_mmd - Convenience function for writing a register
776 * on an MMD on a given PHY.
777 * @phydev: The phy_device struct
778 * @devad: The MMD to write to
779 * @regnum: The register on the MMD to read
780 * @val: value to write to @regnum
781 *
782 * Same rules as for phy_write();
783 */
784 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
785
786 /**
787 * __phy_write_mmd - Convenience function for writing a register
788 * on an MMD on a given PHY.
789 * @phydev: The phy_device struct
790 * @devad: The MMD to write to
791 * @regnum: The register on the MMD to read
792 * @val: value to write to @regnum
793 *
794 * Same rules as for __phy_write();
795 */
796 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
797
798 int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
799 u16 set);
800 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
801 u16 set);
802 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
803 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
804
805 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
806 u16 mask, u16 set);
807 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
808 u16 mask, u16 set);
809 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
810 u16 mask, u16 set);
811 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
812 u16 mask, u16 set);
813
814 /**
815 * __phy_set_bits - Convenience function for setting bits in a PHY register
816 * @phydev: the phy_device struct
817 * @regnum: register number to write
818 * @val: bits to set
819 *
820 * The caller must have taken the MDIO bus lock.
821 */
822 static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
823 {
824 return __phy_modify(phydev, regnum, 0, val);
825 }
826
827 /**
828 * __phy_clear_bits - Convenience function for clearing bits in a PHY register
829 * @phydev: the phy_device struct
830 * @regnum: register number to write
831 * @val: bits to clear
832 *
833 * The caller must have taken the MDIO bus lock.
834 */
835 static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum,
836 u16 val)
837 {
838 return __phy_modify(phydev, regnum, val, 0);
839 }
840
841 /**
842 * phy_set_bits - Convenience function for setting bits in a PHY register
843 * @phydev: the phy_device struct
844 * @regnum: register number to write
845 * @val: bits to set
846 */
847 static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
848 {
849 return phy_modify(phydev, regnum, 0, val);
850 }
851
852 /**
853 * phy_clear_bits - Convenience function for clearing bits in a PHY register
854 * @phydev: the phy_device struct
855 * @regnum: register number to write
856 * @val: bits to clear
857 */
858 static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val)
859 {
860 return phy_modify(phydev, regnum, val, 0);
861 }
862
863 /**
864 * __phy_set_bits_mmd - Convenience function for setting bits in a register
865 * on MMD
866 * @phydev: the phy_device struct
867 * @devad: the MMD containing register to modify
868 * @regnum: register number to modify
869 * @val: bits to set
870 *
871 * The caller must have taken the MDIO bus lock.
872 */
873 static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad,
874 u32 regnum, u16 val)
875 {
876 return __phy_modify_mmd(phydev, devad, regnum, 0, val);
877 }
878
879 /**
880 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register
881 * on MMD
882 * @phydev: the phy_device struct
883 * @devad: the MMD containing register to modify
884 * @regnum: register number to modify
885 * @val: bits to clear
886 *
887 * The caller must have taken the MDIO bus lock.
888 */
889 static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad,
890 u32 regnum, u16 val)
891 {
892 return __phy_modify_mmd(phydev, devad, regnum, val, 0);
893 }
894
895 /**
896 * phy_set_bits_mmd - Convenience function for setting bits in a register
897 * on MMD
898 * @phydev: the phy_device struct
899 * @devad: the MMD containing register to modify
900 * @regnum: register number to modify
901 * @val: bits to set
902 */
903 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad,
904 u32 regnum, u16 val)
905 {
906 return phy_modify_mmd(phydev, devad, regnum, 0, val);
907 }
908
909 /**
910 * phy_clear_bits_mmd - Convenience function for clearing bits in a register
911 * on MMD
912 * @phydev: the phy_device struct
913 * @devad: the MMD containing register to modify
914 * @regnum: register number to modify
915 * @val: bits to clear
916 */
917 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad,
918 u32 regnum, u16 val)
919 {
920 return phy_modify_mmd(phydev, devad, regnum, val, 0);
921 }
922
923 /**
924 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq
925 * @phydev: the phy_device struct
926 *
927 * NOTE: must be kept in sync with addition/removal of PHY_POLL and
928 * PHY_IGNORE_INTERRUPT
929 */
930 static inline bool phy_interrupt_is_valid(struct phy_device *phydev)
931 {
932 return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT;
933 }
934
935 /**
936 * phy_polling_mode - Convenience function for testing whether polling is
937 * used to detect PHY status changes
938 * @phydev: the phy_device struct
939 */
940 static inline bool phy_polling_mode(struct phy_device *phydev)
941 {
942 return phydev->irq == PHY_POLL;
943 }
944
945 /**
946 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration.
947 * @phydev: the phy_device struct
948 */
949 static inline bool phy_has_hwtstamp(struct phy_device *phydev)
950 {
951 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp;
952 }
953
954 /**
955 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping.
956 * @phydev: the phy_device struct
957 */
958 static inline bool phy_has_rxtstamp(struct phy_device *phydev)
959 {
960 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp;
961 }
962
963 /**
964 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or
965 * PTP hardware clock capabilities.
966 * @phydev: the phy_device struct
967 */
968 static inline bool phy_has_tsinfo(struct phy_device *phydev)
969 {
970 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info;
971 }
972
973 /**
974 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping.
975 * @phydev: the phy_device struct
976 */
977 static inline bool phy_has_txtstamp(struct phy_device *phydev)
978 {
979 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp;
980 }
981
982 static inline int phy_hwtstamp(struct phy_device *phydev, struct ifreq *ifr)
983 {
984 return phydev->mii_ts->hwtstamp(phydev->mii_ts, ifr);
985 }
986
987 static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb,
988 int type)
989 {
990 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type);
991 }
992
993 static inline int phy_ts_info(struct phy_device *phydev,
994 struct ethtool_ts_info *tsinfo)
995 {
996 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo);
997 }
998
999 static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb,
1000 int type)
1001 {
1002 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type);
1003 }
1004
1005 /**
1006 * phy_is_internal - Convenience function for testing if a PHY is internal
1007 * @phydev: the phy_device struct
1008 */
1009 static inline bool phy_is_internal(struct phy_device *phydev)
1010 {
1011 return phydev->is_internal;
1012 }
1013
1014 /**
1015 * phy_interface_mode_is_rgmii - Convenience function for testing if a
1016 * PHY interface mode is RGMII (all variants)
1017 * @mode: the phy_interface_t enum
1018 */
1019 static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode)
1020 {
1021 return mode >= PHY_INTERFACE_MODE_RGMII &&
1022 mode <= PHY_INTERFACE_MODE_RGMII_TXID;
1023 };
1024
1025 /**
1026 * phy_interface_mode_is_8023z() - does the phy interface mode use 802.3z
1027 * negotiation
1028 * @mode: one of &enum phy_interface_t
1029 *
1030 * Returns true if the phy interface mode uses the 16-bit negotiation
1031 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding)
1032 */
1033 static inline bool phy_interface_mode_is_8023z(phy_interface_t mode)
1034 {
1035 return mode == PHY_INTERFACE_MODE_1000BASEX ||
1036 mode == PHY_INTERFACE_MODE_2500BASEX;
1037 }
1038
1039 /**
1040 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
1041 * is RGMII (all variants)
1042 * @phydev: the phy_device struct
1043 */
1044 static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
1045 {
1046 return phy_interface_mode_is_rgmii(phydev->interface);
1047 };
1048
1049 /*
1050 * phy_is_pseudo_fixed_link - Convenience function for testing if this
1051 * PHY is the CPU port facing side of an Ethernet switch, or similar.
1052 * @phydev: the phy_device struct
1053 */
1054 static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev)
1055 {
1056 return phydev->is_pseudo_fixed_link;
1057 }
1058
1059 int phy_save_page(struct phy_device *phydev);
1060 int phy_select_page(struct phy_device *phydev, int page);
1061 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret);
1062 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum);
1063 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val);
1064 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum,
1065 u16 mask, u16 set);
1066 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum,
1067 u16 mask, u16 set);
1068
1069 struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id,
1070 bool is_c45,
1071 struct phy_c45_device_ids *c45_ids);
1072 #if IS_ENABLED(CONFIG_PHYLIB)
1073 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45);
1074 int phy_device_register(struct phy_device *phy);
1075 void phy_device_free(struct phy_device *phydev);
1076 #else
1077 static inline
1078 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45)
1079 {
1080 return NULL;
1081 }
1082
1083 static inline int phy_device_register(struct phy_device *phy)
1084 {
1085 return 0;
1086 }
1087
1088 static inline void phy_device_free(struct phy_device *phydev) { }
1089 #endif /* CONFIG_PHYLIB */
1090 void phy_device_remove(struct phy_device *phydev);
1091 int phy_init_hw(struct phy_device *phydev);
1092 int phy_suspend(struct phy_device *phydev);
1093 int phy_resume(struct phy_device *phydev);
1094 int __phy_resume(struct phy_device *phydev);
1095 int phy_loopback(struct phy_device *phydev, bool enable);
1096 void phy_sfp_attach(void *upstream, struct sfp_bus *bus);
1097 void phy_sfp_detach(void *upstream, struct sfp_bus *bus);
1098 int phy_sfp_probe(struct phy_device *phydev,
1099 const struct sfp_upstream_ops *ops);
1100 struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
1101 phy_interface_t interface);
1102 struct phy_device *phy_find_first(struct mii_bus *bus);
1103 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
1104 u32 flags, phy_interface_t interface);
1105 int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
1106 void (*handler)(struct net_device *),
1107 phy_interface_t interface);
1108 struct phy_device *phy_connect(struct net_device *dev, const char *bus_id,
1109 void (*handler)(struct net_device *),
1110 phy_interface_t interface);
1111 void phy_disconnect(struct phy_device *phydev);
1112 void phy_detach(struct phy_device *phydev);
1113 void phy_start(struct phy_device *phydev);
1114 void phy_stop(struct phy_device *phydev);
1115 int phy_start_aneg(struct phy_device *phydev);
1116 int phy_aneg_done(struct phy_device *phydev);
1117 int phy_speed_down(struct phy_device *phydev, bool sync);
1118 int phy_speed_up(struct phy_device *phydev);
1119
1120 int phy_restart_aneg(struct phy_device *phydev);
1121 int phy_reset_after_clk_enable(struct phy_device *phydev);
1122
1123 static inline void phy_device_reset(struct phy_device *phydev, int value)
1124 {
1125 mdio_device_reset(&phydev->mdio, value);
1126 }
1127
1128 #define phydev_err(_phydev, format, args...) \
1129 dev_err(&_phydev->mdio.dev, format, ##args)
1130
1131 #define phydev_info(_phydev, format, args...) \
1132 dev_info(&_phydev->mdio.dev, format, ##args)
1133
1134 #define phydev_warn(_phydev, format, args...) \
1135 dev_warn(&_phydev->mdio.dev, format, ##args)
1136
1137 #define phydev_dbg(_phydev, format, args...) \
1138 dev_dbg(&_phydev->mdio.dev, format, ##args)
1139
1140 static inline const char *phydev_name(const struct phy_device *phydev)
1141 {
1142 return dev_name(&phydev->mdio.dev);
1143 }
1144
1145 static inline void phy_lock_mdio_bus(struct phy_device *phydev)
1146 {
1147 mutex_lock(&phydev->mdio.bus->mdio_lock);
1148 }
1149
1150 static inline void phy_unlock_mdio_bus(struct phy_device *phydev)
1151 {
1152 mutex_unlock(&phydev->mdio.bus->mdio_lock);
1153 }
1154
1155 void phy_attached_print(struct phy_device *phydev, const char *fmt, ...)
1156 __printf(2, 3);
1157 char *phy_attached_info_irq(struct phy_device *phydev)
1158 __malloc;
1159 void phy_attached_info(struct phy_device *phydev);
1160
1161 /* Clause 22 PHY */
1162 int genphy_read_abilities(struct phy_device *phydev);
1163 int genphy_setup_forced(struct phy_device *phydev);
1164 int genphy_restart_aneg(struct phy_device *phydev);
1165 int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart);
1166 int genphy_config_eee_advert(struct phy_device *phydev);
1167 int __genphy_config_aneg(struct phy_device *phydev, bool changed);
1168 int genphy_aneg_done(struct phy_device *phydev);
1169 int genphy_update_link(struct phy_device *phydev);
1170 int genphy_read_lpa(struct phy_device *phydev);
1171 int genphy_read_status_fixed(struct phy_device *phydev);
1172 int genphy_read_status(struct phy_device *phydev);
1173 int genphy_suspend(struct phy_device *phydev);
1174 int genphy_resume(struct phy_device *phydev);
1175 int genphy_loopback(struct phy_device *phydev, bool enable);
1176 int genphy_soft_reset(struct phy_device *phydev);
1177
1178 static inline int genphy_config_aneg(struct phy_device *phydev)
1179 {
1180 return __genphy_config_aneg(phydev, false);
1181 }
1182
1183 static inline int genphy_no_soft_reset(struct phy_device *phydev)
1184 {
1185 return 0;
1186 }
1187 static inline int genphy_no_ack_interrupt(struct phy_device *phydev)
1188 {
1189 return 0;
1190 }
1191 static inline int genphy_no_config_intr(struct phy_device *phydev)
1192 {
1193 return 0;
1194 }
1195 int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad,
1196 u16 regnum);
1197 int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum,
1198 u16 regnum, u16 val);
1199
1200 /* Clause 37 */
1201 int genphy_c37_config_aneg(struct phy_device *phydev);
1202 int genphy_c37_read_status(struct phy_device *phydev);
1203
1204 /* Clause 45 PHY */
1205 int genphy_c45_restart_aneg(struct phy_device *phydev);
1206 int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart);
1207 int genphy_c45_aneg_done(struct phy_device *phydev);
1208 int genphy_c45_read_link(struct phy_device *phydev);
1209 int genphy_c45_read_lpa(struct phy_device *phydev);
1210 int genphy_c45_read_pma(struct phy_device *phydev);
1211 int genphy_c45_pma_setup_forced(struct phy_device *phydev);
1212 int genphy_c45_an_config_aneg(struct phy_device *phydev);
1213 int genphy_c45_an_disable_aneg(struct phy_device *phydev);
1214 int genphy_c45_read_mdix(struct phy_device *phydev);
1215 int genphy_c45_pma_read_abilities(struct phy_device *phydev);
1216 int genphy_c45_read_status(struct phy_device *phydev);
1217 int genphy_c45_config_aneg(struct phy_device *phydev);
1218
1219 /* The gen10g_* functions are the old Clause 45 stub */
1220 int gen10g_config_aneg(struct phy_device *phydev);
1221
1222 static inline int phy_read_status(struct phy_device *phydev)
1223 {
1224 if (!phydev->drv)
1225 return -EIO;
1226
1227 if (phydev->drv->read_status)
1228 return phydev->drv->read_status(phydev);
1229 else
1230 return genphy_read_status(phydev);
1231 }
1232
1233 void phy_driver_unregister(struct phy_driver *drv);
1234 void phy_drivers_unregister(struct phy_driver *drv, int n);
1235 int phy_driver_register(struct phy_driver *new_driver, struct module *owner);
1236 int phy_drivers_register(struct phy_driver *new_driver, int n,
1237 struct module *owner);
1238 void phy_state_machine(struct work_struct *work);
1239 void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies);
1240 void phy_mac_interrupt(struct phy_device *phydev);
1241 void phy_start_machine(struct phy_device *phydev);
1242 void phy_stop_machine(struct phy_device *phydev);
1243 void phy_ethtool_ksettings_get(struct phy_device *phydev,
1244 struct ethtool_link_ksettings *cmd);
1245 int phy_ethtool_ksettings_set(struct phy_device *phydev,
1246 const struct ethtool_link_ksettings *cmd);
1247 int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd);
1248 int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
1249 int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd);
1250 void phy_request_interrupt(struct phy_device *phydev);
1251 void phy_free_interrupt(struct phy_device *phydev);
1252 void phy_print_status(struct phy_device *phydev);
1253 int phy_set_max_speed(struct phy_device *phydev, u32 max_speed);
1254 void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode);
1255 void phy_advertise_supported(struct phy_device *phydev);
1256 void phy_support_sym_pause(struct phy_device *phydev);
1257 void phy_support_asym_pause(struct phy_device *phydev);
1258 void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx,
1259 bool autoneg);
1260 void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx);
1261 bool phy_validate_pause(struct phy_device *phydev,
1262 struct ethtool_pauseparam *pp);
1263
1264 int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
1265 int (*run)(struct phy_device *));
1266 int phy_register_fixup_for_id(const char *bus_id,
1267 int (*run)(struct phy_device *));
1268 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
1269 int (*run)(struct phy_device *));
1270
1271 int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask);
1272 int phy_unregister_fixup_for_id(const char *bus_id);
1273 int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask);
1274
1275 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
1276 int phy_get_eee_err(struct phy_device *phydev);
1277 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data);
1278 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data);
1279 int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol);
1280 void phy_ethtool_get_wol(struct phy_device *phydev,
1281 struct ethtool_wolinfo *wol);
1282 int phy_ethtool_get_link_ksettings(struct net_device *ndev,
1283 struct ethtool_link_ksettings *cmd);
1284 int phy_ethtool_set_link_ksettings(struct net_device *ndev,
1285 const struct ethtool_link_ksettings *cmd);
1286 int phy_ethtool_nway_reset(struct net_device *ndev);
1287
1288 #if IS_ENABLED(CONFIG_PHYLIB)
1289 int __init mdio_bus_init(void);
1290 void mdio_bus_exit(void);
1291 #endif
1292
1293 /* Inline function for use within net/core/ethtool.c (built-in) */
1294 static inline int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data)
1295 {
1296 if (!phydev->drv)
1297 return -EIO;
1298
1299 mutex_lock(&phydev->lock);
1300 phydev->drv->get_strings(phydev, data);
1301 mutex_unlock(&phydev->lock);
1302
1303 return 0;
1304 }
1305
1306 static inline int phy_ethtool_get_sset_count(struct phy_device *phydev)
1307 {
1308 int ret;
1309
1310 if (!phydev->drv)
1311 return -EIO;
1312
1313 if (phydev->drv->get_sset_count &&
1314 phydev->drv->get_strings &&
1315 phydev->drv->get_stats) {
1316 mutex_lock(&phydev->lock);
1317 ret = phydev->drv->get_sset_count(phydev);
1318 mutex_unlock(&phydev->lock);
1319
1320 return ret;
1321 }
1322
1323 return -EOPNOTSUPP;
1324 }
1325
1326 static inline int phy_ethtool_get_stats(struct phy_device *phydev,
1327 struct ethtool_stats *stats, u64 *data)
1328 {
1329 if (!phydev->drv)
1330 return -EIO;
1331
1332 mutex_lock(&phydev->lock);
1333 phydev->drv->get_stats(phydev, stats, data);
1334 mutex_unlock(&phydev->lock);
1335
1336 return 0;
1337 }
1338
1339 extern struct bus_type mdio_bus_type;
1340
1341 struct mdio_board_info {
1342 const char *bus_id;
1343 char modalias[MDIO_NAME_SIZE];
1344 int mdio_addr;
1345 const void *platform_data;
1346 };
1347
1348 #if IS_ENABLED(CONFIG_MDIO_DEVICE)
1349 int mdiobus_register_board_info(const struct mdio_board_info *info,
1350 unsigned int n);
1351 #else
1352 static inline int mdiobus_register_board_info(const struct mdio_board_info *i,
1353 unsigned int n)
1354 {
1355 return 0;
1356 }
1357 #endif
1358
1359
1360 /**
1361 * module_phy_driver() - Helper macro for registering PHY drivers
1362 * @__phy_drivers: array of PHY drivers to register
1363 *
1364 * Helper macro for PHY drivers which do not do anything special in module
1365 * init/exit. Each module may only use this macro once, and calling it
1366 * replaces module_init() and module_exit().
1367 */
1368 #define phy_module_driver(__phy_drivers, __count) \
1369 static int __init phy_module_init(void) \
1370 { \
1371 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \
1372 } \
1373 module_init(phy_module_init); \
1374 static void __exit phy_module_exit(void) \
1375 { \
1376 phy_drivers_unregister(__phy_drivers, __count); \
1377 } \
1378 module_exit(phy_module_exit)
1379
1380 #define module_phy_driver(__phy_drivers) \
1381 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers))
1382
1383 bool phy_driver_is_genphy(struct phy_device *phydev);
1384 bool phy_driver_is_genphy_10g(struct phy_device *phydev);
1385
1386 #endif /* __PHY_H */