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1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3 * Framework and drivers for configuring and reading different PHYs
4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c
5 *
6 * Author: Andy Fleming
7 *
8 * Copyright (c) 2004 Freescale Semiconductor, Inc.
9 */
10
11 #ifndef __PHY_H
12 #define __PHY_H
13
14 #include <linux/compiler.h>
15 #include <linux/spinlock.h>
16 #include <linux/ethtool.h>
17 #include <linux/linkmode.h>
18 #include <linux/mdio.h>
19 #include <linux/mii.h>
20 #include <linux/module.h>
21 #include <linux/timer.h>
22 #include <linux/workqueue.h>
23 #include <linux/mod_devicetable.h>
24
25 #include <linux/atomic.h>
26
27 #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
28 SUPPORTED_TP | \
29 SUPPORTED_MII)
30
31 #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
32 SUPPORTED_10baseT_Full)
33
34 #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
35 SUPPORTED_100baseT_Full)
36
37 #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
38 SUPPORTED_1000baseT_Full)
39
40 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init;
41 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init;
42 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init;
43 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init;
44 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init;
45 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init;
46 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init;
47 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init;
48
49 #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features)
50 #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features)
51 #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features)
52 #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features)
53 #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features)
54 #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features)
55 #define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features)
56 #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features)
57
58 extern const int phy_10_100_features_array[4];
59 extern const int phy_basic_t1_features_array[2];
60 extern const int phy_gbit_features_array[2];
61 extern const int phy_10gbit_features_array[1];
62
63 /*
64 * Set phydev->irq to PHY_POLL if interrupts are not supported,
65 * or not desired for this PHY. Set to PHY_IGNORE_INTERRUPT if
66 * the attached driver handles the interrupt
67 */
68 #define PHY_POLL -1
69 #define PHY_IGNORE_INTERRUPT -2
70
71 #define PHY_IS_INTERNAL 0x00000001
72 #define PHY_RST_AFTER_CLK_EN 0x00000002
73 #define MDIO_DEVICE_IS_PHY 0x80000000
74
75 /* Interface Mode definitions */
76 typedef enum {
77 PHY_INTERFACE_MODE_NA,
78 PHY_INTERFACE_MODE_INTERNAL,
79 PHY_INTERFACE_MODE_MII,
80 PHY_INTERFACE_MODE_GMII,
81 PHY_INTERFACE_MODE_SGMII,
82 PHY_INTERFACE_MODE_TBI,
83 PHY_INTERFACE_MODE_REVMII,
84 PHY_INTERFACE_MODE_RMII,
85 PHY_INTERFACE_MODE_RGMII,
86 PHY_INTERFACE_MODE_RGMII_ID,
87 PHY_INTERFACE_MODE_RGMII_RXID,
88 PHY_INTERFACE_MODE_RGMII_TXID,
89 PHY_INTERFACE_MODE_RTBI,
90 PHY_INTERFACE_MODE_SMII,
91 PHY_INTERFACE_MODE_XGMII,
92 PHY_INTERFACE_MODE_MOCA,
93 PHY_INTERFACE_MODE_QSGMII,
94 PHY_INTERFACE_MODE_TRGMII,
95 PHY_INTERFACE_MODE_1000BASEX,
96 PHY_INTERFACE_MODE_2500BASEX,
97 PHY_INTERFACE_MODE_RXAUI,
98 PHY_INTERFACE_MODE_XAUI,
99 /* 10GBASE-KR, XFI, SFI - single lane 10G Serdes */
100 PHY_INTERFACE_MODE_10GKR,
101 PHY_INTERFACE_MODE_MAX,
102 } phy_interface_t;
103
104 /**
105 * phy_supported_speeds - return all speeds currently supported by a phy device
106 * @phy: The phy device to return supported speeds of.
107 * @speeds: buffer to store supported speeds in.
108 * @size: size of speeds buffer.
109 *
110 * Description: Returns the number of supported speeds, and fills
111 * the speeds buffer with the supported speeds. If speeds buffer is
112 * too small to contain all currently supported speeds, will return as
113 * many speeds as can fit.
114 */
115 unsigned int phy_supported_speeds(struct phy_device *phy,
116 unsigned int *speeds,
117 unsigned int size);
118
119 /**
120 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode
121 * @interface: enum phy_interface_t value
122 *
123 * Description: maps 'enum phy_interface_t' defined in this file
124 * into the device tree binding of 'phy-mode', so that Ethernet
125 * device driver can get phy interface from device tree.
126 */
127 static inline const char *phy_modes(phy_interface_t interface)
128 {
129 switch (interface) {
130 case PHY_INTERFACE_MODE_NA:
131 return "";
132 case PHY_INTERFACE_MODE_INTERNAL:
133 return "internal";
134 case PHY_INTERFACE_MODE_MII:
135 return "mii";
136 case PHY_INTERFACE_MODE_GMII:
137 return "gmii";
138 case PHY_INTERFACE_MODE_SGMII:
139 return "sgmii";
140 case PHY_INTERFACE_MODE_TBI:
141 return "tbi";
142 case PHY_INTERFACE_MODE_REVMII:
143 return "rev-mii";
144 case PHY_INTERFACE_MODE_RMII:
145 return "rmii";
146 case PHY_INTERFACE_MODE_RGMII:
147 return "rgmii";
148 case PHY_INTERFACE_MODE_RGMII_ID:
149 return "rgmii-id";
150 case PHY_INTERFACE_MODE_RGMII_RXID:
151 return "rgmii-rxid";
152 case PHY_INTERFACE_MODE_RGMII_TXID:
153 return "rgmii-txid";
154 case PHY_INTERFACE_MODE_RTBI:
155 return "rtbi";
156 case PHY_INTERFACE_MODE_SMII:
157 return "smii";
158 case PHY_INTERFACE_MODE_XGMII:
159 return "xgmii";
160 case PHY_INTERFACE_MODE_MOCA:
161 return "moca";
162 case PHY_INTERFACE_MODE_QSGMII:
163 return "qsgmii";
164 case PHY_INTERFACE_MODE_TRGMII:
165 return "trgmii";
166 case PHY_INTERFACE_MODE_1000BASEX:
167 return "1000base-x";
168 case PHY_INTERFACE_MODE_2500BASEX:
169 return "2500base-x";
170 case PHY_INTERFACE_MODE_RXAUI:
171 return "rxaui";
172 case PHY_INTERFACE_MODE_XAUI:
173 return "xaui";
174 case PHY_INTERFACE_MODE_10GKR:
175 return "10gbase-kr";
176 default:
177 return "unknown";
178 }
179 }
180
181
182 #define PHY_INIT_TIMEOUT 100000
183 #define PHY_STATE_TIME 1
184 #define PHY_FORCE_TIMEOUT 10
185
186 #define PHY_MAX_ADDR 32
187
188 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */
189 #define PHY_ID_FMT "%s:%02x"
190
191 #define MII_BUS_ID_SIZE 61
192
193 /* Or MII_ADDR_C45 into regnum for read/write on mii_bus to enable the 21 bit
194 IEEE 802.3ae clause 45 addressing mode used by 10GIGE phy chips. */
195 #define MII_ADDR_C45 (1<<30)
196
197 struct device;
198 struct phylink;
199 struct sk_buff;
200
201 /*
202 * The Bus class for PHYs. Devices which provide access to
203 * PHYs should register using this structure
204 */
205 struct mii_bus {
206 struct module *owner;
207 const char *name;
208 char id[MII_BUS_ID_SIZE];
209 void *priv;
210 int (*read)(struct mii_bus *bus, int addr, int regnum);
211 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val);
212 int (*reset)(struct mii_bus *bus);
213
214 /*
215 * A lock to ensure that only one thing can read/write
216 * the MDIO bus at a time
217 */
218 struct mutex mdio_lock;
219
220 struct device *parent;
221 enum {
222 MDIOBUS_ALLOCATED = 1,
223 MDIOBUS_REGISTERED,
224 MDIOBUS_UNREGISTERED,
225 MDIOBUS_RELEASED,
226 } state;
227 struct device dev;
228
229 /* list of all PHYs on bus */
230 struct mdio_device *mdio_map[PHY_MAX_ADDR];
231
232 /* PHY addresses to be ignored when probing */
233 u32 phy_mask;
234
235 /* PHY addresses to ignore the TA/read failure */
236 u32 phy_ignore_ta_mask;
237
238 /*
239 * An array of interrupts, each PHY's interrupt at the index
240 * matching its address
241 */
242 int irq[PHY_MAX_ADDR];
243
244 /* GPIO reset pulse width in microseconds */
245 int reset_delay_us;
246 /* RESET GPIO descriptor pointer */
247 struct gpio_desc *reset_gpiod;
248 };
249 #define to_mii_bus(d) container_of(d, struct mii_bus, dev)
250
251 struct mii_bus *mdiobus_alloc_size(size_t);
252 static inline struct mii_bus *mdiobus_alloc(void)
253 {
254 return mdiobus_alloc_size(0);
255 }
256
257 int __mdiobus_register(struct mii_bus *bus, struct module *owner);
258 #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE)
259 void mdiobus_unregister(struct mii_bus *bus);
260 void mdiobus_free(struct mii_bus *bus);
261 struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv);
262 static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev)
263 {
264 return devm_mdiobus_alloc_size(dev, 0);
265 }
266
267 void devm_mdiobus_free(struct device *dev, struct mii_bus *bus);
268 struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr);
269
270 #define PHY_INTERRUPT_DISABLED false
271 #define PHY_INTERRUPT_ENABLED true
272
273 /* PHY state machine states:
274 *
275 * DOWN: PHY device and driver are not ready for anything. probe
276 * should be called if and only if the PHY is in this state,
277 * given that the PHY device exists.
278 * - PHY driver probe function will set the state to READY
279 *
280 * READY: PHY is ready to send and receive packets, but the
281 * controller is not. By default, PHYs which do not implement
282 * probe will be set to this state by phy_probe().
283 * - start will set the state to UP
284 *
285 * UP: The PHY and attached device are ready to do work.
286 * Interrupts should be started here.
287 * - timer moves to NOLINK or RUNNING
288 *
289 * NOLINK: PHY is up, but not currently plugged in.
290 * - irq or timer will set RUNNING if link comes back
291 * - phy_stop moves to HALTED
292 *
293 * FORCING: PHY is being configured with forced settings
294 * - if link is up, move to RUNNING
295 * - If link is down, we drop to the next highest setting, and
296 * retry (FORCING) after a timeout
297 * - phy_stop moves to HALTED
298 *
299 * RUNNING: PHY is currently up, running, and possibly sending
300 * and/or receiving packets
301 * - irq or timer will set NOLINK if link goes down
302 * - phy_stop moves to HALTED
303 *
304 * HALTED: PHY is up, but no polling or interrupts are done. Or
305 * PHY is in an error state.
306 * - phy_start moves to UP
307 */
308 enum phy_state {
309 PHY_DOWN = 0,
310 PHY_READY,
311 PHY_HALTED,
312 PHY_UP,
313 PHY_RUNNING,
314 PHY_NOLINK,
315 PHY_FORCING,
316 };
317
318 /**
319 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers
320 * @devices_in_package: Bit vector of devices present.
321 * @device_ids: The device identifer for each present device.
322 */
323 struct phy_c45_device_ids {
324 u32 devices_in_package;
325 u32 device_ids[8];
326 };
327
328 /* phy_device: An instance of a PHY
329 *
330 * drv: Pointer to the driver for this PHY instance
331 * phy_id: UID for this device found during discovery
332 * c45_ids: 802.3-c45 Device Identifers if is_c45.
333 * is_c45: Set to true if this phy uses clause 45 addressing.
334 * is_internal: Set to true if this phy is internal to a MAC.
335 * is_pseudo_fixed_link: Set to true if this phy is an Ethernet switch, etc.
336 * is_gigabit_capable: Set to true if PHY supports 1000Mbps
337 * has_fixups: Set to true if this phy has fixups/quirks.
338 * suspended: Set to true if this phy has been suspended successfully.
339 * sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal.
340 * loopback_enabled: Set true if this phy has been loopbacked successfully.
341 * state: state of the PHY for management purposes
342 * dev_flags: Device-specific flags used by the PHY driver.
343 * link_timeout: The number of timer firings to wait before the
344 * giving up on the current attempt at acquiring a link
345 * irq: IRQ number of the PHY's interrupt (-1 if none)
346 * phy_timer: The timer for handling the state machine
347 * attached_dev: The attached enet driver's device instance ptr
348 * adjust_link: Callback for the enet controller to respond to
349 * changes in the link state.
350 *
351 * speed, duplex, pause, supported, advertising, lp_advertising,
352 * and autoneg are used like in mii_if_info
353 *
354 * interrupts currently only supports enabled or disabled,
355 * but could be changed in the future to support enabling
356 * and disabling specific interrupts
357 *
358 * Contains some infrastructure for polling and interrupt
359 * handling, as well as handling shifts in PHY hardware state
360 */
361 struct phy_device {
362 struct mdio_device mdio;
363
364 /* Information about the PHY type */
365 /* And management functions */
366 struct phy_driver *drv;
367
368 u32 phy_id;
369
370 struct phy_c45_device_ids c45_ids;
371 unsigned is_c45:1;
372 unsigned is_internal:1;
373 unsigned is_pseudo_fixed_link:1;
374 unsigned is_gigabit_capable:1;
375 unsigned has_fixups:1;
376 unsigned suspended:1;
377 unsigned sysfs_links:1;
378 unsigned loopback_enabled:1;
379
380 unsigned autoneg:1;
381 /* The most recently read link state */
382 unsigned link:1;
383 unsigned autoneg_complete:1;
384
385 /* Interrupts are enabled */
386 unsigned interrupts:1;
387
388 enum phy_state state;
389
390 u32 dev_flags;
391
392 phy_interface_t interface;
393
394 /*
395 * forced speed & duplex (no autoneg)
396 * partner speed & duplex & pause (autoneg)
397 */
398 int speed;
399 int duplex;
400 int pause;
401 int asym_pause;
402
403 /* Union of PHY and Attached devices' supported link modes */
404 /* See ethtool.h for more info */
405 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
406 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising);
407 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising);
408
409 /* Energy efficient ethernet modes which should be prohibited */
410 u32 eee_broken_modes;
411
412 int link_timeout;
413
414 #ifdef CONFIG_LED_TRIGGER_PHY
415 struct phy_led_trigger *phy_led_triggers;
416 unsigned int phy_num_led_triggers;
417 struct phy_led_trigger *last_triggered;
418
419 struct phy_led_trigger *led_link_trigger;
420 #endif
421
422 /*
423 * Interrupt number for this PHY
424 * -1 means no interrupt
425 */
426 int irq;
427
428 /* private data pointer */
429 /* For use by PHYs to maintain extra state */
430 void *priv;
431
432 /* Interrupt and Polling infrastructure */
433 struct delayed_work state_queue;
434
435 struct mutex lock;
436
437 struct phylink *phylink;
438 struct net_device *attached_dev;
439
440 u8 mdix;
441 u8 mdix_ctrl;
442
443 void (*phy_link_change)(struct phy_device *, bool up, bool do_carrier);
444 void (*adjust_link)(struct net_device *dev);
445 };
446 #define to_phy_device(d) container_of(to_mdio_device(d), \
447 struct phy_device, mdio)
448
449 /* struct phy_driver: Driver structure for a particular PHY type
450 *
451 * driver_data: static driver data
452 * phy_id: The result of reading the UID registers of this PHY
453 * type, and ANDing them with the phy_id_mask. This driver
454 * only works for PHYs with IDs which match this field
455 * name: The friendly name of this PHY type
456 * phy_id_mask: Defines the important bits of the phy_id
457 * features: A mandatory list of features (speed, duplex, etc)
458 * supported by this PHY
459 * flags: A bitfield defining certain other features this PHY
460 * supports (like interrupts)
461 *
462 * All functions are optional. If config_aneg or read_status
463 * are not implemented, the phy core uses the genphy versions.
464 * Note that none of these functions should be called from
465 * interrupt time. The goal is for the bus read/write functions
466 * to be able to block when the bus transaction is happening,
467 * and be freed up by an interrupt (The MPC85xx has this ability,
468 * though it is not currently supported in the driver).
469 */
470 struct phy_driver {
471 struct mdio_driver_common mdiodrv;
472 u32 phy_id;
473 char *name;
474 u32 phy_id_mask;
475 const unsigned long * const features;
476 u32 flags;
477 const void *driver_data;
478
479 /*
480 * Called to issue a PHY software reset
481 */
482 int (*soft_reset)(struct phy_device *phydev);
483
484 /*
485 * Called to initialize the PHY,
486 * including after a reset
487 */
488 int (*config_init)(struct phy_device *phydev);
489
490 /*
491 * Called during discovery. Used to set
492 * up device-specific structures, if any
493 */
494 int (*probe)(struct phy_device *phydev);
495
496 /*
497 * Probe the hardware to determine what abilities it has.
498 * Should only set phydev->supported.
499 */
500 int (*get_features)(struct phy_device *phydev);
501
502 /* PHY Power Management */
503 int (*suspend)(struct phy_device *phydev);
504 int (*resume)(struct phy_device *phydev);
505
506 /*
507 * Configures the advertisement and resets
508 * autonegotiation if phydev->autoneg is on,
509 * forces the speed to the current settings in phydev
510 * if phydev->autoneg is off
511 */
512 int (*config_aneg)(struct phy_device *phydev);
513
514 /* Determines the auto negotiation result */
515 int (*aneg_done)(struct phy_device *phydev);
516
517 /* Determines the negotiated speed and duplex */
518 int (*read_status)(struct phy_device *phydev);
519
520 /* Clears any pending interrupts */
521 int (*ack_interrupt)(struct phy_device *phydev);
522
523 /* Enables or disables interrupts */
524 int (*config_intr)(struct phy_device *phydev);
525
526 /*
527 * Checks if the PHY generated an interrupt.
528 * For multi-PHY devices with shared PHY interrupt pin
529 */
530 int (*did_interrupt)(struct phy_device *phydev);
531
532 /* Clears up any memory if needed */
533 void (*remove)(struct phy_device *phydev);
534
535 /* Returns true if this is a suitable driver for the given
536 * phydev. If NULL, matching is based on phy_id and
537 * phy_id_mask.
538 */
539 int (*match_phy_device)(struct phy_device *phydev);
540
541 /* Handles ethtool queries for hardware time stamping. */
542 int (*ts_info)(struct phy_device *phydev, struct ethtool_ts_info *ti);
543
544 /* Handles SIOCSHWTSTAMP ioctl for hardware time stamping. */
545 int (*hwtstamp)(struct phy_device *phydev, struct ifreq *ifr);
546
547 /*
548 * Requests a Rx timestamp for 'skb'. If the skb is accepted,
549 * the phy driver promises to deliver it using netif_rx() as
550 * soon as a timestamp becomes available. One of the
551 * PTP_CLASS_ values is passed in 'type'. The function must
552 * return true if the skb is accepted for delivery.
553 */
554 bool (*rxtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
555
556 /*
557 * Requests a Tx timestamp for 'skb'. The phy driver promises
558 * to deliver it using skb_complete_tx_timestamp() as soon as a
559 * timestamp becomes available. One of the PTP_CLASS_ values
560 * is passed in 'type'.
561 */
562 void (*txtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
563
564 /* Some devices (e.g. qnap TS-119P II) require PHY register changes to
565 * enable Wake on LAN, so set_wol is provided to be called in the
566 * ethernet driver's set_wol function. */
567 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
568
569 /* See set_wol, but for checking whether Wake on LAN is enabled. */
570 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
571
572 /*
573 * Called to inform a PHY device driver when the core is about to
574 * change the link state. This callback is supposed to be used as
575 * fixup hook for drivers that need to take action when the link
576 * state changes. Drivers are by no means allowed to mess with the
577 * PHY device structure in their implementations.
578 */
579 void (*link_change_notify)(struct phy_device *dev);
580
581 /*
582 * Phy specific driver override for reading a MMD register.
583 * This function is optional for PHY specific drivers. When
584 * not provided, the default MMD read function will be used
585 * by phy_read_mmd(), which will use either a direct read for
586 * Clause 45 PHYs or an indirect read for Clause 22 PHYs.
587 * devnum is the MMD device number within the PHY device,
588 * regnum is the register within the selected MMD device.
589 */
590 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum);
591
592 /*
593 * Phy specific driver override for writing a MMD register.
594 * This function is optional for PHY specific drivers. When
595 * not provided, the default MMD write function will be used
596 * by phy_write_mmd(), which will use either a direct write for
597 * Clause 45 PHYs, or an indirect write for Clause 22 PHYs.
598 * devnum is the MMD device number within the PHY device,
599 * regnum is the register within the selected MMD device.
600 * val is the value to be written.
601 */
602 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum,
603 u16 val);
604
605 int (*read_page)(struct phy_device *dev);
606 int (*write_page)(struct phy_device *dev, int page);
607
608 /* Get the size and type of the eeprom contained within a plug-in
609 * module */
610 int (*module_info)(struct phy_device *dev,
611 struct ethtool_modinfo *modinfo);
612
613 /* Get the eeprom information from the plug-in module */
614 int (*module_eeprom)(struct phy_device *dev,
615 struct ethtool_eeprom *ee, u8 *data);
616
617 /* Get statistics from the phy using ethtool */
618 int (*get_sset_count)(struct phy_device *dev);
619 void (*get_strings)(struct phy_device *dev, u8 *data);
620 void (*get_stats)(struct phy_device *dev,
621 struct ethtool_stats *stats, u64 *data);
622
623 /* Get and Set PHY tunables */
624 int (*get_tunable)(struct phy_device *dev,
625 struct ethtool_tunable *tuna, void *data);
626 int (*set_tunable)(struct phy_device *dev,
627 struct ethtool_tunable *tuna,
628 const void *data);
629 int (*set_loopback)(struct phy_device *dev, bool enable);
630 };
631 #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \
632 struct phy_driver, mdiodrv)
633
634 #define PHY_ANY_ID "MATCH ANY PHY"
635 #define PHY_ANY_UID 0xffffffff
636
637 #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0)
638 #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4)
639 #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10)
640
641 /* A Structure for boards to register fixups with the PHY Lib */
642 struct phy_fixup {
643 struct list_head list;
644 char bus_id[MII_BUS_ID_SIZE + 3];
645 u32 phy_uid;
646 u32 phy_uid_mask;
647 int (*run)(struct phy_device *phydev);
648 };
649
650 const char *phy_speed_to_str(int speed);
651 const char *phy_duplex_to_str(unsigned int duplex);
652
653 /* A structure for mapping a particular speed and duplex
654 * combination to a particular SUPPORTED and ADVERTISED value
655 */
656 struct phy_setting {
657 u32 speed;
658 u8 duplex;
659 u8 bit;
660 };
661
662 const struct phy_setting *
663 phy_lookup_setting(int speed, int duplex, const unsigned long *mask,
664 bool exact);
665 size_t phy_speeds(unsigned int *speeds, size_t size,
666 unsigned long *mask);
667 void of_set_phy_supported(struct phy_device *phydev);
668 void of_set_phy_eee_broken(struct phy_device *phydev);
669
670 /**
671 * phy_is_started - Convenience function to check whether PHY is started
672 * @phydev: The phy_device struct
673 */
674 static inline bool phy_is_started(struct phy_device *phydev)
675 {
676 return phydev->state >= PHY_UP;
677 }
678
679 void phy_resolve_aneg_linkmode(struct phy_device *phydev);
680
681 /**
682 * phy_read - Convenience function for reading a given PHY register
683 * @phydev: the phy_device struct
684 * @regnum: register number to read
685 *
686 * NOTE: MUST NOT be called from interrupt context,
687 * because the bus read/write functions may wait for an interrupt
688 * to conclude the operation.
689 */
690 static inline int phy_read(struct phy_device *phydev, u32 regnum)
691 {
692 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
693 }
694
695 /**
696 * __phy_read - convenience function for reading a given PHY register
697 * @phydev: the phy_device struct
698 * @regnum: register number to read
699 *
700 * The caller must have taken the MDIO bus lock.
701 */
702 static inline int __phy_read(struct phy_device *phydev, u32 regnum)
703 {
704 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
705 }
706
707 /**
708 * phy_write - Convenience function for writing a given PHY register
709 * @phydev: the phy_device struct
710 * @regnum: register number to write
711 * @val: value to write to @regnum
712 *
713 * NOTE: MUST NOT be called from interrupt context,
714 * because the bus read/write functions may wait for an interrupt
715 * to conclude the operation.
716 */
717 static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val)
718 {
719 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val);
720 }
721
722 /**
723 * __phy_write - Convenience function for writing a given PHY register
724 * @phydev: the phy_device struct
725 * @regnum: register number to write
726 * @val: value to write to @regnum
727 *
728 * The caller must have taken the MDIO bus lock.
729 */
730 static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val)
731 {
732 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum,
733 val);
734 }
735
736 /**
737 * phy_read_mmd - Convenience function for reading a register
738 * from an MMD on a given PHY.
739 * @phydev: The phy_device struct
740 * @devad: The MMD to read from
741 * @regnum: The register on the MMD to read
742 *
743 * Same rules as for phy_read();
744 */
745 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
746
747 /**
748 * __phy_read_mmd - Convenience function for reading a register
749 * from an MMD on a given PHY.
750 * @phydev: The phy_device struct
751 * @devad: The MMD to read from
752 * @regnum: The register on the MMD to read
753 *
754 * Same rules as for __phy_read();
755 */
756 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
757
758 /**
759 * phy_write_mmd - Convenience function for writing a register
760 * on an MMD on a given PHY.
761 * @phydev: The phy_device struct
762 * @devad: The MMD to write to
763 * @regnum: The register on the MMD to read
764 * @val: value to write to @regnum
765 *
766 * Same rules as for phy_write();
767 */
768 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
769
770 /**
771 * __phy_write_mmd - Convenience function for writing a register
772 * on an MMD on a given PHY.
773 * @phydev: The phy_device struct
774 * @devad: The MMD to write to
775 * @regnum: The register on the MMD to read
776 * @val: value to write to @regnum
777 *
778 * Same rules as for __phy_write();
779 */
780 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
781
782 int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
783 u16 set);
784 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
785 u16 set);
786 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
787 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
788
789 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
790 u16 mask, u16 set);
791 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
792 u16 mask, u16 set);
793 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
794 u16 mask, u16 set);
795 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
796 u16 mask, u16 set);
797
798 /**
799 * __phy_set_bits - Convenience function for setting bits in a PHY register
800 * @phydev: the phy_device struct
801 * @regnum: register number to write
802 * @val: bits to set
803 *
804 * The caller must have taken the MDIO bus lock.
805 */
806 static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
807 {
808 return __phy_modify(phydev, regnum, 0, val);
809 }
810
811 /**
812 * __phy_clear_bits - Convenience function for clearing bits in a PHY register
813 * @phydev: the phy_device struct
814 * @regnum: register number to write
815 * @val: bits to clear
816 *
817 * The caller must have taken the MDIO bus lock.
818 */
819 static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum,
820 u16 val)
821 {
822 return __phy_modify(phydev, regnum, val, 0);
823 }
824
825 /**
826 * phy_set_bits - Convenience function for setting bits in a PHY register
827 * @phydev: the phy_device struct
828 * @regnum: register number to write
829 * @val: bits to set
830 */
831 static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
832 {
833 return phy_modify(phydev, regnum, 0, val);
834 }
835
836 /**
837 * phy_clear_bits - Convenience function for clearing bits in a PHY register
838 * @phydev: the phy_device struct
839 * @regnum: register number to write
840 * @val: bits to clear
841 */
842 static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val)
843 {
844 return phy_modify(phydev, regnum, val, 0);
845 }
846
847 /**
848 * __phy_set_bits_mmd - Convenience function for setting bits in a register
849 * on MMD
850 * @phydev: the phy_device struct
851 * @devad: the MMD containing register to modify
852 * @regnum: register number to modify
853 * @val: bits to set
854 *
855 * The caller must have taken the MDIO bus lock.
856 */
857 static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad,
858 u32 regnum, u16 val)
859 {
860 return __phy_modify_mmd(phydev, devad, regnum, 0, val);
861 }
862
863 /**
864 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register
865 * on MMD
866 * @phydev: the phy_device struct
867 * @devad: the MMD containing register to modify
868 * @regnum: register number to modify
869 * @val: bits to clear
870 *
871 * The caller must have taken the MDIO bus lock.
872 */
873 static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad,
874 u32 regnum, u16 val)
875 {
876 return __phy_modify_mmd(phydev, devad, regnum, val, 0);
877 }
878
879 /**
880 * phy_set_bits_mmd - Convenience function for setting bits in a register
881 * on MMD
882 * @phydev: the phy_device struct
883 * @devad: the MMD containing register to modify
884 * @regnum: register number to modify
885 * @val: bits to set
886 */
887 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad,
888 u32 regnum, u16 val)
889 {
890 return phy_modify_mmd(phydev, devad, regnum, 0, val);
891 }
892
893 /**
894 * phy_clear_bits_mmd - Convenience function for clearing bits in a register
895 * on MMD
896 * @phydev: the phy_device struct
897 * @devad: the MMD containing register to modify
898 * @regnum: register number to modify
899 * @val: bits to clear
900 */
901 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad,
902 u32 regnum, u16 val)
903 {
904 return phy_modify_mmd(phydev, devad, regnum, val, 0);
905 }
906
907 /**
908 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq
909 * @phydev: the phy_device struct
910 *
911 * NOTE: must be kept in sync with addition/removal of PHY_POLL and
912 * PHY_IGNORE_INTERRUPT
913 */
914 static inline bool phy_interrupt_is_valid(struct phy_device *phydev)
915 {
916 return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT;
917 }
918
919 /**
920 * phy_polling_mode - Convenience function for testing whether polling is
921 * used to detect PHY status changes
922 * @phydev: the phy_device struct
923 */
924 static inline bool phy_polling_mode(struct phy_device *phydev)
925 {
926 return phydev->irq == PHY_POLL;
927 }
928
929 /**
930 * phy_is_internal - Convenience function for testing if a PHY is internal
931 * @phydev: the phy_device struct
932 */
933 static inline bool phy_is_internal(struct phy_device *phydev)
934 {
935 return phydev->is_internal;
936 }
937
938 /**
939 * phy_interface_mode_is_rgmii - Convenience function for testing if a
940 * PHY interface mode is RGMII (all variants)
941 * @mode: the phy_interface_t enum
942 */
943 static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode)
944 {
945 return mode >= PHY_INTERFACE_MODE_RGMII &&
946 mode <= PHY_INTERFACE_MODE_RGMII_TXID;
947 };
948
949 /**
950 * phy_interface_mode_is_8023z() - does the phy interface mode use 802.3z
951 * negotiation
952 * @mode: one of &enum phy_interface_t
953 *
954 * Returns true if the phy interface mode uses the 16-bit negotiation
955 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding)
956 */
957 static inline bool phy_interface_mode_is_8023z(phy_interface_t mode)
958 {
959 return mode == PHY_INTERFACE_MODE_1000BASEX ||
960 mode == PHY_INTERFACE_MODE_2500BASEX;
961 }
962
963 /**
964 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
965 * is RGMII (all variants)
966 * @phydev: the phy_device struct
967 */
968 static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
969 {
970 return phy_interface_mode_is_rgmii(phydev->interface);
971 };
972
973 /*
974 * phy_is_pseudo_fixed_link - Convenience function for testing if this
975 * PHY is the CPU port facing side of an Ethernet switch, or similar.
976 * @phydev: the phy_device struct
977 */
978 static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev)
979 {
980 return phydev->is_pseudo_fixed_link;
981 }
982
983 int phy_save_page(struct phy_device *phydev);
984 int phy_select_page(struct phy_device *phydev, int page);
985 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret);
986 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum);
987 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val);
988 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum,
989 u16 mask, u16 set);
990
991 struct phy_device *phy_device_create(struct mii_bus *bus, int addr, int phy_id,
992 bool is_c45,
993 struct phy_c45_device_ids *c45_ids);
994 #if IS_ENABLED(CONFIG_PHYLIB)
995 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45);
996 int phy_device_register(struct phy_device *phy);
997 void phy_device_free(struct phy_device *phydev);
998 #else
999 static inline
1000 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45)
1001 {
1002 return NULL;
1003 }
1004
1005 static inline int phy_device_register(struct phy_device *phy)
1006 {
1007 return 0;
1008 }
1009
1010 static inline void phy_device_free(struct phy_device *phydev) { }
1011 #endif /* CONFIG_PHYLIB */
1012 void phy_device_remove(struct phy_device *phydev);
1013 int phy_init_hw(struct phy_device *phydev);
1014 int phy_suspend(struct phy_device *phydev);
1015 int phy_resume(struct phy_device *phydev);
1016 int __phy_resume(struct phy_device *phydev);
1017 int phy_loopback(struct phy_device *phydev, bool enable);
1018 struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
1019 phy_interface_t interface);
1020 struct phy_device *phy_find_first(struct mii_bus *bus);
1021 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
1022 u32 flags, phy_interface_t interface);
1023 int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
1024 void (*handler)(struct net_device *),
1025 phy_interface_t interface);
1026 struct phy_device *phy_connect(struct net_device *dev, const char *bus_id,
1027 void (*handler)(struct net_device *),
1028 phy_interface_t interface);
1029 void phy_disconnect(struct phy_device *phydev);
1030 void phy_detach(struct phy_device *phydev);
1031 void phy_start(struct phy_device *phydev);
1032 void phy_stop(struct phy_device *phydev);
1033 int phy_start_aneg(struct phy_device *phydev);
1034 int phy_aneg_done(struct phy_device *phydev);
1035 int phy_speed_down(struct phy_device *phydev, bool sync);
1036 int phy_speed_up(struct phy_device *phydev);
1037
1038 int phy_restart_aneg(struct phy_device *phydev);
1039 int phy_reset_after_clk_enable(struct phy_device *phydev);
1040
1041 static inline void phy_device_reset(struct phy_device *phydev, int value)
1042 {
1043 mdio_device_reset(&phydev->mdio, value);
1044 }
1045
1046 #define phydev_err(_phydev, format, args...) \
1047 dev_err(&_phydev->mdio.dev, format, ##args)
1048
1049 #define phydev_info(_phydev, format, args...) \
1050 dev_info(&_phydev->mdio.dev, format, ##args)
1051
1052 #define phydev_warn(_phydev, format, args...) \
1053 dev_warn(&_phydev->mdio.dev, format, ##args)
1054
1055 #define phydev_dbg(_phydev, format, args...) \
1056 dev_dbg(&_phydev->mdio.dev, format, ##args)
1057
1058 static inline const char *phydev_name(const struct phy_device *phydev)
1059 {
1060 return dev_name(&phydev->mdio.dev);
1061 }
1062
1063 void phy_attached_print(struct phy_device *phydev, const char *fmt, ...)
1064 __printf(2, 3);
1065 void phy_attached_info(struct phy_device *phydev);
1066
1067 /* Clause 22 PHY */
1068 int genphy_config_init(struct phy_device *phydev);
1069 int genphy_read_abilities(struct phy_device *phydev);
1070 int genphy_setup_forced(struct phy_device *phydev);
1071 int genphy_restart_aneg(struct phy_device *phydev);
1072 int genphy_config_eee_advert(struct phy_device *phydev);
1073 int genphy_config_aneg(struct phy_device *phydev);
1074 int genphy_aneg_done(struct phy_device *phydev);
1075 int genphy_update_link(struct phy_device *phydev);
1076 int genphy_read_status(struct phy_device *phydev);
1077 int genphy_suspend(struct phy_device *phydev);
1078 int genphy_resume(struct phy_device *phydev);
1079 int genphy_loopback(struct phy_device *phydev, bool enable);
1080 int genphy_soft_reset(struct phy_device *phydev);
1081 static inline int genphy_no_soft_reset(struct phy_device *phydev)
1082 {
1083 return 0;
1084 }
1085 static inline int genphy_no_ack_interrupt(struct phy_device *phydev)
1086 {
1087 return 0;
1088 }
1089 static inline int genphy_no_config_intr(struct phy_device *phydev)
1090 {
1091 return 0;
1092 }
1093 int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad,
1094 u16 regnum);
1095 int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum,
1096 u16 regnum, u16 val);
1097
1098 /* Clause 45 PHY */
1099 int genphy_c45_restart_aneg(struct phy_device *phydev);
1100 int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart);
1101 int genphy_c45_aneg_done(struct phy_device *phydev);
1102 int genphy_c45_read_link(struct phy_device *phydev);
1103 int genphy_c45_read_lpa(struct phy_device *phydev);
1104 int genphy_c45_read_pma(struct phy_device *phydev);
1105 int genphy_c45_pma_setup_forced(struct phy_device *phydev);
1106 int genphy_c45_an_config_aneg(struct phy_device *phydev);
1107 int genphy_c45_an_disable_aneg(struct phy_device *phydev);
1108 int genphy_c45_read_mdix(struct phy_device *phydev);
1109 int genphy_c45_pma_read_abilities(struct phy_device *phydev);
1110 int genphy_c45_read_status(struct phy_device *phydev);
1111
1112 /* The gen10g_* functions are the old Clause 45 stub */
1113 int gen10g_config_aneg(struct phy_device *phydev);
1114
1115 static inline int phy_read_status(struct phy_device *phydev)
1116 {
1117 if (!phydev->drv)
1118 return -EIO;
1119
1120 if (phydev->drv->read_status)
1121 return phydev->drv->read_status(phydev);
1122 else
1123 return genphy_read_status(phydev);
1124 }
1125
1126 void phy_driver_unregister(struct phy_driver *drv);
1127 void phy_drivers_unregister(struct phy_driver *drv, int n);
1128 int phy_driver_register(struct phy_driver *new_driver, struct module *owner);
1129 int phy_drivers_register(struct phy_driver *new_driver, int n,
1130 struct module *owner);
1131 void phy_state_machine(struct work_struct *work);
1132 void phy_mac_interrupt(struct phy_device *phydev);
1133 void phy_start_machine(struct phy_device *phydev);
1134 void phy_stop_machine(struct phy_device *phydev);
1135 int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd);
1136 void phy_ethtool_ksettings_get(struct phy_device *phydev,
1137 struct ethtool_link_ksettings *cmd);
1138 int phy_ethtool_ksettings_set(struct phy_device *phydev,
1139 const struct ethtool_link_ksettings *cmd);
1140 int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd);
1141 void phy_request_interrupt(struct phy_device *phydev);
1142 void phy_print_status(struct phy_device *phydev);
1143 int phy_set_max_speed(struct phy_device *phydev, u32 max_speed);
1144 void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode);
1145 void phy_advertise_supported(struct phy_device *phydev);
1146 void phy_support_sym_pause(struct phy_device *phydev);
1147 void phy_support_asym_pause(struct phy_device *phydev);
1148 void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx,
1149 bool autoneg);
1150 void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx);
1151 bool phy_validate_pause(struct phy_device *phydev,
1152 struct ethtool_pauseparam *pp);
1153
1154 int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
1155 int (*run)(struct phy_device *));
1156 int phy_register_fixup_for_id(const char *bus_id,
1157 int (*run)(struct phy_device *));
1158 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
1159 int (*run)(struct phy_device *));
1160
1161 int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask);
1162 int phy_unregister_fixup_for_id(const char *bus_id);
1163 int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask);
1164
1165 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
1166 int phy_get_eee_err(struct phy_device *phydev);
1167 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data);
1168 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data);
1169 int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol);
1170 void phy_ethtool_get_wol(struct phy_device *phydev,
1171 struct ethtool_wolinfo *wol);
1172 int phy_ethtool_get_link_ksettings(struct net_device *ndev,
1173 struct ethtool_link_ksettings *cmd);
1174 int phy_ethtool_set_link_ksettings(struct net_device *ndev,
1175 const struct ethtool_link_ksettings *cmd);
1176 int phy_ethtool_nway_reset(struct net_device *ndev);
1177
1178 #if IS_ENABLED(CONFIG_PHYLIB)
1179 int __init mdio_bus_init(void);
1180 void mdio_bus_exit(void);
1181 #endif
1182
1183 /* Inline function for use within net/core/ethtool.c (built-in) */
1184 static inline int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data)
1185 {
1186 if (!phydev->drv)
1187 return -EIO;
1188
1189 mutex_lock(&phydev->lock);
1190 phydev->drv->get_strings(phydev, data);
1191 mutex_unlock(&phydev->lock);
1192
1193 return 0;
1194 }
1195
1196 static inline int phy_ethtool_get_sset_count(struct phy_device *phydev)
1197 {
1198 int ret;
1199
1200 if (!phydev->drv)
1201 return -EIO;
1202
1203 if (phydev->drv->get_sset_count &&
1204 phydev->drv->get_strings &&
1205 phydev->drv->get_stats) {
1206 mutex_lock(&phydev->lock);
1207 ret = phydev->drv->get_sset_count(phydev);
1208 mutex_unlock(&phydev->lock);
1209
1210 return ret;
1211 }
1212
1213 return -EOPNOTSUPP;
1214 }
1215
1216 static inline int phy_ethtool_get_stats(struct phy_device *phydev,
1217 struct ethtool_stats *stats, u64 *data)
1218 {
1219 if (!phydev->drv)
1220 return -EIO;
1221
1222 mutex_lock(&phydev->lock);
1223 phydev->drv->get_stats(phydev, stats, data);
1224 mutex_unlock(&phydev->lock);
1225
1226 return 0;
1227 }
1228
1229 extern struct bus_type mdio_bus_type;
1230
1231 struct mdio_board_info {
1232 const char *bus_id;
1233 char modalias[MDIO_NAME_SIZE];
1234 int mdio_addr;
1235 const void *platform_data;
1236 };
1237
1238 #if IS_ENABLED(CONFIG_MDIO_DEVICE)
1239 int mdiobus_register_board_info(const struct mdio_board_info *info,
1240 unsigned int n);
1241 #else
1242 static inline int mdiobus_register_board_info(const struct mdio_board_info *i,
1243 unsigned int n)
1244 {
1245 return 0;
1246 }
1247 #endif
1248
1249
1250 /**
1251 * module_phy_driver() - Helper macro for registering PHY drivers
1252 * @__phy_drivers: array of PHY drivers to register
1253 *
1254 * Helper macro for PHY drivers which do not do anything special in module
1255 * init/exit. Each module may only use this macro once, and calling it
1256 * replaces module_init() and module_exit().
1257 */
1258 #define phy_module_driver(__phy_drivers, __count) \
1259 static int __init phy_module_init(void) \
1260 { \
1261 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \
1262 } \
1263 module_init(phy_module_init); \
1264 static void __exit phy_module_exit(void) \
1265 { \
1266 phy_drivers_unregister(__phy_drivers, __count); \
1267 } \
1268 module_exit(phy_module_exit)
1269
1270 #define module_phy_driver(__phy_drivers) \
1271 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers))
1272
1273 bool phy_driver_is_genphy(struct phy_device *phydev);
1274 bool phy_driver_is_genphy_10g(struct phy_device *phydev);
1275
1276 #endif /* __PHY_H */