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1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3 * Framework and drivers for configuring and reading different PHYs
4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c
5 *
6 * Author: Andy Fleming
7 *
8 * Copyright (c) 2004 Freescale Semiconductor, Inc.
9 */
10
11 #ifndef __PHY_H
12 #define __PHY_H
13
14 #include <linux/compiler.h>
15 #include <linux/spinlock.h>
16 #include <linux/ethtool.h>
17 #include <linux/linkmode.h>
18 #include <linux/mdio.h>
19 #include <linux/mii.h>
20 #include <linux/module.h>
21 #include <linux/timer.h>
22 #include <linux/workqueue.h>
23 #include <linux/mod_devicetable.h>
24
25 #include <linux/atomic.h>
26
27 #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
28 SUPPORTED_TP | \
29 SUPPORTED_MII)
30
31 #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
32 SUPPORTED_10baseT_Full)
33
34 #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
35 SUPPORTED_100baseT_Full)
36
37 #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
38 SUPPORTED_1000baseT_Full)
39
40 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init;
41 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init;
42 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init;
43 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init;
44 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init;
45 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init;
46 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init;
47 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init;
48
49 #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features)
50 #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features)
51 #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features)
52 #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features)
53 #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features)
54 #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features)
55 #define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features)
56 #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features)
57
58 extern const int phy_basic_ports_array[3];
59 extern const int phy_fibre_port_array[1];
60 extern const int phy_all_ports_features_array[7];
61 extern const int phy_10_100_features_array[4];
62 extern const int phy_basic_t1_features_array[2];
63 extern const int phy_gbit_features_array[2];
64 extern const int phy_10gbit_features_array[1];
65
66 /*
67 * Set phydev->irq to PHY_POLL if interrupts are not supported,
68 * or not desired for this PHY. Set to PHY_IGNORE_INTERRUPT if
69 * the attached driver handles the interrupt
70 */
71 #define PHY_POLL -1
72 #define PHY_IGNORE_INTERRUPT -2
73
74 #define PHY_IS_INTERNAL 0x00000001
75 #define PHY_RST_AFTER_CLK_EN 0x00000002
76 #define MDIO_DEVICE_IS_PHY 0x80000000
77
78 /* Interface Mode definitions */
79 typedef enum {
80 PHY_INTERFACE_MODE_NA,
81 PHY_INTERFACE_MODE_INTERNAL,
82 PHY_INTERFACE_MODE_MII,
83 PHY_INTERFACE_MODE_GMII,
84 PHY_INTERFACE_MODE_SGMII,
85 PHY_INTERFACE_MODE_TBI,
86 PHY_INTERFACE_MODE_REVMII,
87 PHY_INTERFACE_MODE_RMII,
88 PHY_INTERFACE_MODE_RGMII,
89 PHY_INTERFACE_MODE_RGMII_ID,
90 PHY_INTERFACE_MODE_RGMII_RXID,
91 PHY_INTERFACE_MODE_RGMII_TXID,
92 PHY_INTERFACE_MODE_RTBI,
93 PHY_INTERFACE_MODE_SMII,
94 PHY_INTERFACE_MODE_XGMII,
95 PHY_INTERFACE_MODE_MOCA,
96 PHY_INTERFACE_MODE_QSGMII,
97 PHY_INTERFACE_MODE_TRGMII,
98 PHY_INTERFACE_MODE_1000BASEX,
99 PHY_INTERFACE_MODE_2500BASEX,
100 PHY_INTERFACE_MODE_RXAUI,
101 PHY_INTERFACE_MODE_XAUI,
102 /* 10GBASE-KR, XFI, SFI - single lane 10G Serdes */
103 PHY_INTERFACE_MODE_10GKR,
104 PHY_INTERFACE_MODE_USXGMII,
105 PHY_INTERFACE_MODE_MAX,
106 } phy_interface_t;
107
108 /**
109 * phy_supported_speeds - return all speeds currently supported by a phy device
110 * @phy: The phy device to return supported speeds of.
111 * @speeds: buffer to store supported speeds in.
112 * @size: size of speeds buffer.
113 *
114 * Description: Returns the number of supported speeds, and fills
115 * the speeds buffer with the supported speeds. If speeds buffer is
116 * too small to contain all currently supported speeds, will return as
117 * many speeds as can fit.
118 */
119 unsigned int phy_supported_speeds(struct phy_device *phy,
120 unsigned int *speeds,
121 unsigned int size);
122
123 /**
124 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode
125 * @interface: enum phy_interface_t value
126 *
127 * Description: maps 'enum phy_interface_t' defined in this file
128 * into the device tree binding of 'phy-mode', so that Ethernet
129 * device driver can get phy interface from device tree.
130 */
131 static inline const char *phy_modes(phy_interface_t interface)
132 {
133 switch (interface) {
134 case PHY_INTERFACE_MODE_NA:
135 return "";
136 case PHY_INTERFACE_MODE_INTERNAL:
137 return "internal";
138 case PHY_INTERFACE_MODE_MII:
139 return "mii";
140 case PHY_INTERFACE_MODE_GMII:
141 return "gmii";
142 case PHY_INTERFACE_MODE_SGMII:
143 return "sgmii";
144 case PHY_INTERFACE_MODE_TBI:
145 return "tbi";
146 case PHY_INTERFACE_MODE_REVMII:
147 return "rev-mii";
148 case PHY_INTERFACE_MODE_RMII:
149 return "rmii";
150 case PHY_INTERFACE_MODE_RGMII:
151 return "rgmii";
152 case PHY_INTERFACE_MODE_RGMII_ID:
153 return "rgmii-id";
154 case PHY_INTERFACE_MODE_RGMII_RXID:
155 return "rgmii-rxid";
156 case PHY_INTERFACE_MODE_RGMII_TXID:
157 return "rgmii-txid";
158 case PHY_INTERFACE_MODE_RTBI:
159 return "rtbi";
160 case PHY_INTERFACE_MODE_SMII:
161 return "smii";
162 case PHY_INTERFACE_MODE_XGMII:
163 return "xgmii";
164 case PHY_INTERFACE_MODE_MOCA:
165 return "moca";
166 case PHY_INTERFACE_MODE_QSGMII:
167 return "qsgmii";
168 case PHY_INTERFACE_MODE_TRGMII:
169 return "trgmii";
170 case PHY_INTERFACE_MODE_1000BASEX:
171 return "1000base-x";
172 case PHY_INTERFACE_MODE_2500BASEX:
173 return "2500base-x";
174 case PHY_INTERFACE_MODE_RXAUI:
175 return "rxaui";
176 case PHY_INTERFACE_MODE_XAUI:
177 return "xaui";
178 case PHY_INTERFACE_MODE_10GKR:
179 return "10gbase-kr";
180 case PHY_INTERFACE_MODE_USXGMII:
181 return "usxgmii";
182 default:
183 return "unknown";
184 }
185 }
186
187
188 #define PHY_INIT_TIMEOUT 100000
189 #define PHY_FORCE_TIMEOUT 10
190
191 #define PHY_MAX_ADDR 32
192
193 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */
194 #define PHY_ID_FMT "%s:%02x"
195
196 #define MII_BUS_ID_SIZE 61
197
198 /* Or MII_ADDR_C45 into regnum for read/write on mii_bus to enable the 21 bit
199 IEEE 802.3ae clause 45 addressing mode used by 10GIGE phy chips. */
200 #define MII_ADDR_C45 (1<<30)
201 #define MII_DEVADDR_C45_SHIFT 16
202 #define MII_REGADDR_C45_MASK GENMASK(15, 0)
203
204 struct device;
205 struct phylink;
206 struct sk_buff;
207
208 /*
209 * The Bus class for PHYs. Devices which provide access to
210 * PHYs should register using this structure
211 */
212 struct mii_bus {
213 struct module *owner;
214 const char *name;
215 char id[MII_BUS_ID_SIZE];
216 void *priv;
217 int (*read)(struct mii_bus *bus, int addr, int regnum);
218 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val);
219 int (*reset)(struct mii_bus *bus);
220
221 /*
222 * A lock to ensure that only one thing can read/write
223 * the MDIO bus at a time
224 */
225 struct mutex mdio_lock;
226
227 struct device *parent;
228 enum {
229 MDIOBUS_ALLOCATED = 1,
230 MDIOBUS_REGISTERED,
231 MDIOBUS_UNREGISTERED,
232 MDIOBUS_RELEASED,
233 } state;
234 struct device dev;
235
236 /* list of all PHYs on bus */
237 struct mdio_device *mdio_map[PHY_MAX_ADDR];
238
239 /* PHY addresses to be ignored when probing */
240 u32 phy_mask;
241
242 /* PHY addresses to ignore the TA/read failure */
243 u32 phy_ignore_ta_mask;
244
245 /*
246 * An array of interrupts, each PHY's interrupt at the index
247 * matching its address
248 */
249 int irq[PHY_MAX_ADDR];
250
251 /* GPIO reset pulse width in microseconds */
252 int reset_delay_us;
253 /* RESET GPIO descriptor pointer */
254 struct gpio_desc *reset_gpiod;
255 };
256 #define to_mii_bus(d) container_of(d, struct mii_bus, dev)
257
258 struct mii_bus *mdiobus_alloc_size(size_t);
259 static inline struct mii_bus *mdiobus_alloc(void)
260 {
261 return mdiobus_alloc_size(0);
262 }
263
264 int __mdiobus_register(struct mii_bus *bus, struct module *owner);
265 #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE)
266 void mdiobus_unregister(struct mii_bus *bus);
267 void mdiobus_free(struct mii_bus *bus);
268 struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv);
269 static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev)
270 {
271 return devm_mdiobus_alloc_size(dev, 0);
272 }
273
274 void devm_mdiobus_free(struct device *dev, struct mii_bus *bus);
275 struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr);
276
277 #define PHY_INTERRUPT_DISABLED false
278 #define PHY_INTERRUPT_ENABLED true
279
280 /* PHY state machine states:
281 *
282 * DOWN: PHY device and driver are not ready for anything. probe
283 * should be called if and only if the PHY is in this state,
284 * given that the PHY device exists.
285 * - PHY driver probe function will set the state to READY
286 *
287 * READY: PHY is ready to send and receive packets, but the
288 * controller is not. By default, PHYs which do not implement
289 * probe will be set to this state by phy_probe().
290 * - start will set the state to UP
291 *
292 * UP: The PHY and attached device are ready to do work.
293 * Interrupts should be started here.
294 * - timer moves to NOLINK or RUNNING
295 *
296 * NOLINK: PHY is up, but not currently plugged in.
297 * - irq or timer will set RUNNING if link comes back
298 * - phy_stop moves to HALTED
299 *
300 * RUNNING: PHY is currently up, running, and possibly sending
301 * and/or receiving packets
302 * - irq or timer will set NOLINK if link goes down
303 * - phy_stop moves to HALTED
304 *
305 * HALTED: PHY is up, but no polling or interrupts are done. Or
306 * PHY is in an error state.
307 * - phy_start moves to UP
308 */
309 enum phy_state {
310 PHY_DOWN = 0,
311 PHY_READY,
312 PHY_HALTED,
313 PHY_UP,
314 PHY_RUNNING,
315 PHY_NOLINK,
316 };
317
318 /**
319 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers
320 * @devices_in_package: Bit vector of devices present.
321 * @device_ids: The device identifer for each present device.
322 */
323 struct phy_c45_device_ids {
324 u32 devices_in_package;
325 u32 device_ids[8];
326 };
327
328 /* phy_device: An instance of a PHY
329 *
330 * drv: Pointer to the driver for this PHY instance
331 * phy_id: UID for this device found during discovery
332 * c45_ids: 802.3-c45 Device Identifers if is_c45.
333 * is_c45: Set to true if this phy uses clause 45 addressing.
334 * is_internal: Set to true if this phy is internal to a MAC.
335 * is_pseudo_fixed_link: Set to true if this phy is an Ethernet switch, etc.
336 * is_gigabit_capable: Set to true if PHY supports 1000Mbps
337 * has_fixups: Set to true if this phy has fixups/quirks.
338 * suspended: Set to true if this phy has been suspended successfully.
339 * suspended_by_mdio_bus: Set to true if this phy was suspended by MDIO bus.
340 * sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal.
341 * loopback_enabled: Set true if this phy has been loopbacked successfully.
342 * state: state of the PHY for management purposes
343 * dev_flags: Device-specific flags used by the PHY driver.
344 * irq: IRQ number of the PHY's interrupt (-1 if none)
345 * phy_timer: The timer for handling the state machine
346 * attached_dev: The attached enet driver's device instance ptr
347 * adjust_link: Callback for the enet controller to respond to
348 * changes in the link state.
349 *
350 * speed, duplex, pause, supported, advertising, lp_advertising,
351 * and autoneg are used like in mii_if_info
352 *
353 * interrupts currently only supports enabled or disabled,
354 * but could be changed in the future to support enabling
355 * and disabling specific interrupts
356 *
357 * Contains some infrastructure for polling and interrupt
358 * handling, as well as handling shifts in PHY hardware state
359 */
360 struct phy_device {
361 struct mdio_device mdio;
362
363 /* Information about the PHY type */
364 /* And management functions */
365 struct phy_driver *drv;
366
367 u32 phy_id;
368
369 struct phy_c45_device_ids c45_ids;
370 unsigned is_c45:1;
371 unsigned is_internal:1;
372 unsigned is_pseudo_fixed_link:1;
373 unsigned is_gigabit_capable:1;
374 unsigned has_fixups:1;
375 unsigned suspended:1;
376 unsigned suspended_by_mdio_bus:1;
377 unsigned sysfs_links:1;
378 unsigned loopback_enabled:1;
379
380 unsigned autoneg:1;
381 /* The most recently read link state */
382 unsigned link:1;
383 unsigned autoneg_complete:1;
384
385 /* Interrupts are enabled */
386 unsigned interrupts:1;
387
388 enum phy_state state;
389
390 u32 dev_flags;
391
392 phy_interface_t interface;
393
394 /*
395 * forced speed & duplex (no autoneg)
396 * partner speed & duplex & pause (autoneg)
397 */
398 int speed;
399 int duplex;
400 int pause;
401 int asym_pause;
402
403 /* Union of PHY and Attached devices' supported link modes */
404 /* See ethtool.h for more info */
405 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
406 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising);
407 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising);
408 /* used with phy_speed_down */
409 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old);
410
411 /* Energy efficient ethernet modes which should be prohibited */
412 u32 eee_broken_modes;
413
414 #ifdef CONFIG_LED_TRIGGER_PHY
415 struct phy_led_trigger *phy_led_triggers;
416 unsigned int phy_num_led_triggers;
417 struct phy_led_trigger *last_triggered;
418
419 struct phy_led_trigger *led_link_trigger;
420 #endif
421
422 /*
423 * Interrupt number for this PHY
424 * -1 means no interrupt
425 */
426 int irq;
427
428 /* private data pointer */
429 /* For use by PHYs to maintain extra state */
430 void *priv;
431
432 /* Interrupt and Polling infrastructure */
433 struct delayed_work state_queue;
434
435 struct mutex lock;
436
437 struct phylink *phylink;
438 struct net_device *attached_dev;
439
440 u8 mdix;
441 u8 mdix_ctrl;
442
443 void (*phy_link_change)(struct phy_device *, bool up, bool do_carrier);
444 void (*adjust_link)(struct net_device *dev);
445 };
446 #define to_phy_device(d) container_of(to_mdio_device(d), \
447 struct phy_device, mdio)
448
449 /* struct phy_driver: Driver structure for a particular PHY type
450 *
451 * driver_data: static driver data
452 * phy_id: The result of reading the UID registers of this PHY
453 * type, and ANDing them with the phy_id_mask. This driver
454 * only works for PHYs with IDs which match this field
455 * name: The friendly name of this PHY type
456 * phy_id_mask: Defines the important bits of the phy_id
457 * features: A mandatory list of features (speed, duplex, etc)
458 * supported by this PHY
459 * flags: A bitfield defining certain other features this PHY
460 * supports (like interrupts)
461 *
462 * All functions are optional. If config_aneg or read_status
463 * are not implemented, the phy core uses the genphy versions.
464 * Note that none of these functions should be called from
465 * interrupt time. The goal is for the bus read/write functions
466 * to be able to block when the bus transaction is happening,
467 * and be freed up by an interrupt (The MPC85xx has this ability,
468 * though it is not currently supported in the driver).
469 */
470 struct phy_driver {
471 struct mdio_driver_common mdiodrv;
472 u32 phy_id;
473 char *name;
474 u32 phy_id_mask;
475 const unsigned long * const features;
476 u32 flags;
477 const void *driver_data;
478
479 /*
480 * Called to issue a PHY software reset
481 */
482 int (*soft_reset)(struct phy_device *phydev);
483
484 /*
485 * Called to initialize the PHY,
486 * including after a reset
487 */
488 int (*config_init)(struct phy_device *phydev);
489
490 /*
491 * Called during discovery. Used to set
492 * up device-specific structures, if any
493 */
494 int (*probe)(struct phy_device *phydev);
495
496 /*
497 * Probe the hardware to determine what abilities it has.
498 * Should only set phydev->supported.
499 */
500 int (*get_features)(struct phy_device *phydev);
501
502 /* PHY Power Management */
503 int (*suspend)(struct phy_device *phydev);
504 int (*resume)(struct phy_device *phydev);
505
506 /*
507 * Configures the advertisement and resets
508 * autonegotiation if phydev->autoneg is on,
509 * forces the speed to the current settings in phydev
510 * if phydev->autoneg is off
511 */
512 int (*config_aneg)(struct phy_device *phydev);
513
514 /* Determines the auto negotiation result */
515 int (*aneg_done)(struct phy_device *phydev);
516
517 /* Determines the negotiated speed and duplex */
518 int (*read_status)(struct phy_device *phydev);
519
520 /* Clears any pending interrupts */
521 int (*ack_interrupt)(struct phy_device *phydev);
522
523 /* Enables or disables interrupts */
524 int (*config_intr)(struct phy_device *phydev);
525
526 /*
527 * Checks if the PHY generated an interrupt.
528 * For multi-PHY devices with shared PHY interrupt pin
529 * Set interrupt bits have to be cleared.
530 */
531 int (*did_interrupt)(struct phy_device *phydev);
532
533 /* Override default interrupt handling */
534 int (*handle_interrupt)(struct phy_device *phydev);
535
536 /* Clears up any memory if needed */
537 void (*remove)(struct phy_device *phydev);
538
539 /* Returns true if this is a suitable driver for the given
540 * phydev. If NULL, matching is based on phy_id and
541 * phy_id_mask.
542 */
543 int (*match_phy_device)(struct phy_device *phydev);
544
545 /* Handles ethtool queries for hardware time stamping. */
546 int (*ts_info)(struct phy_device *phydev, struct ethtool_ts_info *ti);
547
548 /* Handles SIOCSHWTSTAMP ioctl for hardware time stamping. */
549 int (*hwtstamp)(struct phy_device *phydev, struct ifreq *ifr);
550
551 /*
552 * Requests a Rx timestamp for 'skb'. If the skb is accepted,
553 * the phy driver promises to deliver it using netif_rx() as
554 * soon as a timestamp becomes available. One of the
555 * PTP_CLASS_ values is passed in 'type'. The function must
556 * return true if the skb is accepted for delivery.
557 */
558 bool (*rxtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
559
560 /*
561 * Requests a Tx timestamp for 'skb'. The phy driver promises
562 * to deliver it using skb_complete_tx_timestamp() as soon as a
563 * timestamp becomes available. One of the PTP_CLASS_ values
564 * is passed in 'type'.
565 */
566 void (*txtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
567
568 /* Some devices (e.g. qnap TS-119P II) require PHY register changes to
569 * enable Wake on LAN, so set_wol is provided to be called in the
570 * ethernet driver's set_wol function. */
571 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
572
573 /* See set_wol, but for checking whether Wake on LAN is enabled. */
574 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
575
576 /*
577 * Called to inform a PHY device driver when the core is about to
578 * change the link state. This callback is supposed to be used as
579 * fixup hook for drivers that need to take action when the link
580 * state changes. Drivers are by no means allowed to mess with the
581 * PHY device structure in their implementations.
582 */
583 void (*link_change_notify)(struct phy_device *dev);
584
585 /*
586 * Phy specific driver override for reading a MMD register.
587 * This function is optional for PHY specific drivers. When
588 * not provided, the default MMD read function will be used
589 * by phy_read_mmd(), which will use either a direct read for
590 * Clause 45 PHYs or an indirect read for Clause 22 PHYs.
591 * devnum is the MMD device number within the PHY device,
592 * regnum is the register within the selected MMD device.
593 */
594 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum);
595
596 /*
597 * Phy specific driver override for writing a MMD register.
598 * This function is optional for PHY specific drivers. When
599 * not provided, the default MMD write function will be used
600 * by phy_write_mmd(), which will use either a direct write for
601 * Clause 45 PHYs, or an indirect write for Clause 22 PHYs.
602 * devnum is the MMD device number within the PHY device,
603 * regnum is the register within the selected MMD device.
604 * val is the value to be written.
605 */
606 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum,
607 u16 val);
608
609 int (*read_page)(struct phy_device *dev);
610 int (*write_page)(struct phy_device *dev, int page);
611
612 /* Get the size and type of the eeprom contained within a plug-in
613 * module */
614 int (*module_info)(struct phy_device *dev,
615 struct ethtool_modinfo *modinfo);
616
617 /* Get the eeprom information from the plug-in module */
618 int (*module_eeprom)(struct phy_device *dev,
619 struct ethtool_eeprom *ee, u8 *data);
620
621 /* Get statistics from the phy using ethtool */
622 int (*get_sset_count)(struct phy_device *dev);
623 void (*get_strings)(struct phy_device *dev, u8 *data);
624 void (*get_stats)(struct phy_device *dev,
625 struct ethtool_stats *stats, u64 *data);
626
627 /* Get and Set PHY tunables */
628 int (*get_tunable)(struct phy_device *dev,
629 struct ethtool_tunable *tuna, void *data);
630 int (*set_tunable)(struct phy_device *dev,
631 struct ethtool_tunable *tuna,
632 const void *data);
633 int (*set_loopback)(struct phy_device *dev, bool enable);
634 };
635 #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \
636 struct phy_driver, mdiodrv)
637
638 #define PHY_ANY_ID "MATCH ANY PHY"
639 #define PHY_ANY_UID 0xffffffff
640
641 #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0)
642 #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4)
643 #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10)
644
645 /* A Structure for boards to register fixups with the PHY Lib */
646 struct phy_fixup {
647 struct list_head list;
648 char bus_id[MII_BUS_ID_SIZE + 3];
649 u32 phy_uid;
650 u32 phy_uid_mask;
651 int (*run)(struct phy_device *phydev);
652 };
653
654 const char *phy_speed_to_str(int speed);
655 const char *phy_duplex_to_str(unsigned int duplex);
656
657 /* A structure for mapping a particular speed and duplex
658 * combination to a particular SUPPORTED and ADVERTISED value
659 */
660 struct phy_setting {
661 u32 speed;
662 u8 duplex;
663 u8 bit;
664 };
665
666 const struct phy_setting *
667 phy_lookup_setting(int speed, int duplex, const unsigned long *mask,
668 bool exact);
669 size_t phy_speeds(unsigned int *speeds, size_t size,
670 unsigned long *mask);
671 void of_set_phy_supported(struct phy_device *phydev);
672 void of_set_phy_eee_broken(struct phy_device *phydev);
673 int phy_speed_down_core(struct phy_device *phydev);
674
675 /**
676 * phy_is_started - Convenience function to check whether PHY is started
677 * @phydev: The phy_device struct
678 */
679 static inline bool phy_is_started(struct phy_device *phydev)
680 {
681 return phydev->state >= PHY_UP;
682 }
683
684 void phy_resolve_aneg_pause(struct phy_device *phydev);
685 void phy_resolve_aneg_linkmode(struct phy_device *phydev);
686
687 /**
688 * phy_read - Convenience function for reading a given PHY register
689 * @phydev: the phy_device struct
690 * @regnum: register number to read
691 *
692 * NOTE: MUST NOT be called from interrupt context,
693 * because the bus read/write functions may wait for an interrupt
694 * to conclude the operation.
695 */
696 static inline int phy_read(struct phy_device *phydev, u32 regnum)
697 {
698 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
699 }
700
701 /**
702 * __phy_read - convenience function for reading a given PHY register
703 * @phydev: the phy_device struct
704 * @regnum: register number to read
705 *
706 * The caller must have taken the MDIO bus lock.
707 */
708 static inline int __phy_read(struct phy_device *phydev, u32 regnum)
709 {
710 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
711 }
712
713 /**
714 * phy_write - Convenience function for writing a given PHY register
715 * @phydev: the phy_device struct
716 * @regnum: register number to write
717 * @val: value to write to @regnum
718 *
719 * NOTE: MUST NOT be called from interrupt context,
720 * because the bus read/write functions may wait for an interrupt
721 * to conclude the operation.
722 */
723 static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val)
724 {
725 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val);
726 }
727
728 /**
729 * __phy_write - Convenience function for writing a given PHY register
730 * @phydev: the phy_device struct
731 * @regnum: register number to write
732 * @val: value to write to @regnum
733 *
734 * The caller must have taken the MDIO bus lock.
735 */
736 static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val)
737 {
738 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum,
739 val);
740 }
741
742 /**
743 * phy_read_mmd - Convenience function for reading a register
744 * from an MMD on a given PHY.
745 * @phydev: The phy_device struct
746 * @devad: The MMD to read from
747 * @regnum: The register on the MMD to read
748 *
749 * Same rules as for phy_read();
750 */
751 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
752
753 /**
754 * __phy_read_mmd - Convenience function for reading a register
755 * from an MMD on a given PHY.
756 * @phydev: The phy_device struct
757 * @devad: The MMD to read from
758 * @regnum: The register on the MMD to read
759 *
760 * Same rules as for __phy_read();
761 */
762 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
763
764 /**
765 * phy_write_mmd - Convenience function for writing a register
766 * on an MMD on a given PHY.
767 * @phydev: The phy_device struct
768 * @devad: The MMD to write to
769 * @regnum: The register on the MMD to read
770 * @val: value to write to @regnum
771 *
772 * Same rules as for phy_write();
773 */
774 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
775
776 /**
777 * __phy_write_mmd - Convenience function for writing a register
778 * on an MMD on a given PHY.
779 * @phydev: The phy_device struct
780 * @devad: The MMD to write to
781 * @regnum: The register on the MMD to read
782 * @val: value to write to @regnum
783 *
784 * Same rules as for __phy_write();
785 */
786 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
787
788 int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
789 u16 set);
790 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
791 u16 set);
792 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
793 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
794
795 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
796 u16 mask, u16 set);
797 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
798 u16 mask, u16 set);
799 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
800 u16 mask, u16 set);
801 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
802 u16 mask, u16 set);
803
804 /**
805 * __phy_set_bits - Convenience function for setting bits in a PHY register
806 * @phydev: the phy_device struct
807 * @regnum: register number to write
808 * @val: bits to set
809 *
810 * The caller must have taken the MDIO bus lock.
811 */
812 static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
813 {
814 return __phy_modify(phydev, regnum, 0, val);
815 }
816
817 /**
818 * __phy_clear_bits - Convenience function for clearing bits in a PHY register
819 * @phydev: the phy_device struct
820 * @regnum: register number to write
821 * @val: bits to clear
822 *
823 * The caller must have taken the MDIO bus lock.
824 */
825 static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum,
826 u16 val)
827 {
828 return __phy_modify(phydev, regnum, val, 0);
829 }
830
831 /**
832 * phy_set_bits - Convenience function for setting bits in a PHY register
833 * @phydev: the phy_device struct
834 * @regnum: register number to write
835 * @val: bits to set
836 */
837 static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
838 {
839 return phy_modify(phydev, regnum, 0, val);
840 }
841
842 /**
843 * phy_clear_bits - Convenience function for clearing bits in a PHY register
844 * @phydev: the phy_device struct
845 * @regnum: register number to write
846 * @val: bits to clear
847 */
848 static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val)
849 {
850 return phy_modify(phydev, regnum, val, 0);
851 }
852
853 /**
854 * __phy_set_bits_mmd - Convenience function for setting bits in a register
855 * on MMD
856 * @phydev: the phy_device struct
857 * @devad: the MMD containing register to modify
858 * @regnum: register number to modify
859 * @val: bits to set
860 *
861 * The caller must have taken the MDIO bus lock.
862 */
863 static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad,
864 u32 regnum, u16 val)
865 {
866 return __phy_modify_mmd(phydev, devad, regnum, 0, val);
867 }
868
869 /**
870 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register
871 * on MMD
872 * @phydev: the phy_device struct
873 * @devad: the MMD containing register to modify
874 * @regnum: register number to modify
875 * @val: bits to clear
876 *
877 * The caller must have taken the MDIO bus lock.
878 */
879 static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad,
880 u32 regnum, u16 val)
881 {
882 return __phy_modify_mmd(phydev, devad, regnum, val, 0);
883 }
884
885 /**
886 * phy_set_bits_mmd - Convenience function for setting bits in a register
887 * on MMD
888 * @phydev: the phy_device struct
889 * @devad: the MMD containing register to modify
890 * @regnum: register number to modify
891 * @val: bits to set
892 */
893 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad,
894 u32 regnum, u16 val)
895 {
896 return phy_modify_mmd(phydev, devad, regnum, 0, val);
897 }
898
899 /**
900 * phy_clear_bits_mmd - Convenience function for clearing bits in a register
901 * on MMD
902 * @phydev: the phy_device struct
903 * @devad: the MMD containing register to modify
904 * @regnum: register number to modify
905 * @val: bits to clear
906 */
907 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad,
908 u32 regnum, u16 val)
909 {
910 return phy_modify_mmd(phydev, devad, regnum, val, 0);
911 }
912
913 /**
914 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq
915 * @phydev: the phy_device struct
916 *
917 * NOTE: must be kept in sync with addition/removal of PHY_POLL and
918 * PHY_IGNORE_INTERRUPT
919 */
920 static inline bool phy_interrupt_is_valid(struct phy_device *phydev)
921 {
922 return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT;
923 }
924
925 /**
926 * phy_polling_mode - Convenience function for testing whether polling is
927 * used to detect PHY status changes
928 * @phydev: the phy_device struct
929 */
930 static inline bool phy_polling_mode(struct phy_device *phydev)
931 {
932 return phydev->irq == PHY_POLL;
933 }
934
935 /**
936 * phy_is_internal - Convenience function for testing if a PHY is internal
937 * @phydev: the phy_device struct
938 */
939 static inline bool phy_is_internal(struct phy_device *phydev)
940 {
941 return phydev->is_internal;
942 }
943
944 /**
945 * phy_interface_mode_is_rgmii - Convenience function for testing if a
946 * PHY interface mode is RGMII (all variants)
947 * @mode: the phy_interface_t enum
948 */
949 static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode)
950 {
951 return mode >= PHY_INTERFACE_MODE_RGMII &&
952 mode <= PHY_INTERFACE_MODE_RGMII_TXID;
953 };
954
955 /**
956 * phy_interface_mode_is_8023z() - does the phy interface mode use 802.3z
957 * negotiation
958 * @mode: one of &enum phy_interface_t
959 *
960 * Returns true if the phy interface mode uses the 16-bit negotiation
961 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding)
962 */
963 static inline bool phy_interface_mode_is_8023z(phy_interface_t mode)
964 {
965 return mode == PHY_INTERFACE_MODE_1000BASEX ||
966 mode == PHY_INTERFACE_MODE_2500BASEX;
967 }
968
969 /**
970 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
971 * is RGMII (all variants)
972 * @phydev: the phy_device struct
973 */
974 static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
975 {
976 return phy_interface_mode_is_rgmii(phydev->interface);
977 };
978
979 /*
980 * phy_is_pseudo_fixed_link - Convenience function for testing if this
981 * PHY is the CPU port facing side of an Ethernet switch, or similar.
982 * @phydev: the phy_device struct
983 */
984 static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev)
985 {
986 return phydev->is_pseudo_fixed_link;
987 }
988
989 int phy_save_page(struct phy_device *phydev);
990 int phy_select_page(struct phy_device *phydev, int page);
991 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret);
992 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum);
993 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val);
994 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum,
995 u16 mask, u16 set);
996 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum,
997 u16 mask, u16 set);
998
999 struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id,
1000 bool is_c45,
1001 struct phy_c45_device_ids *c45_ids);
1002 #if IS_ENABLED(CONFIG_PHYLIB)
1003 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45);
1004 int phy_device_register(struct phy_device *phy);
1005 void phy_device_free(struct phy_device *phydev);
1006 #else
1007 static inline
1008 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45)
1009 {
1010 return NULL;
1011 }
1012
1013 static inline int phy_device_register(struct phy_device *phy)
1014 {
1015 return 0;
1016 }
1017
1018 static inline void phy_device_free(struct phy_device *phydev) { }
1019 #endif /* CONFIG_PHYLIB */
1020 void phy_device_remove(struct phy_device *phydev);
1021 int phy_init_hw(struct phy_device *phydev);
1022 int phy_suspend(struct phy_device *phydev);
1023 int phy_resume(struct phy_device *phydev);
1024 int __phy_resume(struct phy_device *phydev);
1025 int phy_loopback(struct phy_device *phydev, bool enable);
1026 struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
1027 phy_interface_t interface);
1028 struct phy_device *phy_find_first(struct mii_bus *bus);
1029 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
1030 u32 flags, phy_interface_t interface);
1031 int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
1032 void (*handler)(struct net_device *),
1033 phy_interface_t interface);
1034 struct phy_device *phy_connect(struct net_device *dev, const char *bus_id,
1035 void (*handler)(struct net_device *),
1036 phy_interface_t interface);
1037 void phy_disconnect(struct phy_device *phydev);
1038 void phy_detach(struct phy_device *phydev);
1039 void phy_start(struct phy_device *phydev);
1040 void phy_stop(struct phy_device *phydev);
1041 int phy_start_aneg(struct phy_device *phydev);
1042 int phy_aneg_done(struct phy_device *phydev);
1043 int phy_speed_down(struct phy_device *phydev, bool sync);
1044 int phy_speed_up(struct phy_device *phydev);
1045
1046 int phy_restart_aneg(struct phy_device *phydev);
1047 int phy_reset_after_clk_enable(struct phy_device *phydev);
1048
1049 static inline void phy_device_reset(struct phy_device *phydev, int value)
1050 {
1051 mdio_device_reset(&phydev->mdio, value);
1052 }
1053
1054 #define phydev_err(_phydev, format, args...) \
1055 dev_err(&_phydev->mdio.dev, format, ##args)
1056
1057 #define phydev_info(_phydev, format, args...) \
1058 dev_info(&_phydev->mdio.dev, format, ##args)
1059
1060 #define phydev_warn(_phydev, format, args...) \
1061 dev_warn(&_phydev->mdio.dev, format, ##args)
1062
1063 #define phydev_dbg(_phydev, format, args...) \
1064 dev_dbg(&_phydev->mdio.dev, format, ##args)
1065
1066 static inline const char *phydev_name(const struct phy_device *phydev)
1067 {
1068 return dev_name(&phydev->mdio.dev);
1069 }
1070
1071 void phy_attached_print(struct phy_device *phydev, const char *fmt, ...)
1072 __printf(2, 3);
1073 void phy_attached_info(struct phy_device *phydev);
1074
1075 /* Clause 22 PHY */
1076 int genphy_read_abilities(struct phy_device *phydev);
1077 int genphy_setup_forced(struct phy_device *phydev);
1078 int genphy_restart_aneg(struct phy_device *phydev);
1079 int genphy_config_eee_advert(struct phy_device *phydev);
1080 int __genphy_config_aneg(struct phy_device *phydev, bool changed);
1081 int genphy_aneg_done(struct phy_device *phydev);
1082 int genphy_update_link(struct phy_device *phydev);
1083 int genphy_read_lpa(struct phy_device *phydev);
1084 int genphy_read_status(struct phy_device *phydev);
1085 int genphy_suspend(struct phy_device *phydev);
1086 int genphy_resume(struct phy_device *phydev);
1087 int genphy_loopback(struct phy_device *phydev, bool enable);
1088 int genphy_soft_reset(struct phy_device *phydev);
1089
1090 static inline int genphy_config_aneg(struct phy_device *phydev)
1091 {
1092 return __genphy_config_aneg(phydev, false);
1093 }
1094
1095 static inline int genphy_no_soft_reset(struct phy_device *phydev)
1096 {
1097 return 0;
1098 }
1099 static inline int genphy_no_ack_interrupt(struct phy_device *phydev)
1100 {
1101 return 0;
1102 }
1103 static inline int genphy_no_config_intr(struct phy_device *phydev)
1104 {
1105 return 0;
1106 }
1107 int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad,
1108 u16 regnum);
1109 int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum,
1110 u16 regnum, u16 val);
1111
1112 /* Clause 45 PHY */
1113 int genphy_c45_restart_aneg(struct phy_device *phydev);
1114 int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart);
1115 int genphy_c45_aneg_done(struct phy_device *phydev);
1116 int genphy_c45_read_link(struct phy_device *phydev);
1117 int genphy_c45_read_lpa(struct phy_device *phydev);
1118 int genphy_c45_read_pma(struct phy_device *phydev);
1119 int genphy_c45_pma_setup_forced(struct phy_device *phydev);
1120 int genphy_c45_an_config_aneg(struct phy_device *phydev);
1121 int genphy_c45_an_disable_aneg(struct phy_device *phydev);
1122 int genphy_c45_read_mdix(struct phy_device *phydev);
1123 int genphy_c45_pma_read_abilities(struct phy_device *phydev);
1124 int genphy_c45_read_status(struct phy_device *phydev);
1125 int genphy_c45_config_aneg(struct phy_device *phydev);
1126
1127 /* The gen10g_* functions are the old Clause 45 stub */
1128 int gen10g_config_aneg(struct phy_device *phydev);
1129
1130 static inline int phy_read_status(struct phy_device *phydev)
1131 {
1132 if (!phydev->drv)
1133 return -EIO;
1134
1135 if (phydev->drv->read_status)
1136 return phydev->drv->read_status(phydev);
1137 else
1138 return genphy_read_status(phydev);
1139 }
1140
1141 void phy_driver_unregister(struct phy_driver *drv);
1142 void phy_drivers_unregister(struct phy_driver *drv, int n);
1143 int phy_driver_register(struct phy_driver *new_driver, struct module *owner);
1144 int phy_drivers_register(struct phy_driver *new_driver, int n,
1145 struct module *owner);
1146 void phy_state_machine(struct work_struct *work);
1147 void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies);
1148 void phy_mac_interrupt(struct phy_device *phydev);
1149 void phy_start_machine(struct phy_device *phydev);
1150 void phy_stop_machine(struct phy_device *phydev);
1151 int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd);
1152 void phy_ethtool_ksettings_get(struct phy_device *phydev,
1153 struct ethtool_link_ksettings *cmd);
1154 int phy_ethtool_ksettings_set(struct phy_device *phydev,
1155 const struct ethtool_link_ksettings *cmd);
1156 int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd);
1157 void phy_request_interrupt(struct phy_device *phydev);
1158 void phy_free_interrupt(struct phy_device *phydev);
1159 void phy_print_status(struct phy_device *phydev);
1160 int phy_set_max_speed(struct phy_device *phydev, u32 max_speed);
1161 void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode);
1162 void phy_advertise_supported(struct phy_device *phydev);
1163 void phy_support_sym_pause(struct phy_device *phydev);
1164 void phy_support_asym_pause(struct phy_device *phydev);
1165 void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx,
1166 bool autoneg);
1167 void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx);
1168 bool phy_validate_pause(struct phy_device *phydev,
1169 struct ethtool_pauseparam *pp);
1170
1171 int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
1172 int (*run)(struct phy_device *));
1173 int phy_register_fixup_for_id(const char *bus_id,
1174 int (*run)(struct phy_device *));
1175 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
1176 int (*run)(struct phy_device *));
1177
1178 int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask);
1179 int phy_unregister_fixup_for_id(const char *bus_id);
1180 int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask);
1181
1182 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
1183 int phy_get_eee_err(struct phy_device *phydev);
1184 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data);
1185 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data);
1186 int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol);
1187 void phy_ethtool_get_wol(struct phy_device *phydev,
1188 struct ethtool_wolinfo *wol);
1189 int phy_ethtool_get_link_ksettings(struct net_device *ndev,
1190 struct ethtool_link_ksettings *cmd);
1191 int phy_ethtool_set_link_ksettings(struct net_device *ndev,
1192 const struct ethtool_link_ksettings *cmd);
1193 int phy_ethtool_nway_reset(struct net_device *ndev);
1194
1195 #if IS_ENABLED(CONFIG_PHYLIB)
1196 int __init mdio_bus_init(void);
1197 void mdio_bus_exit(void);
1198 #endif
1199
1200 /* Inline function for use within net/core/ethtool.c (built-in) */
1201 static inline int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data)
1202 {
1203 if (!phydev->drv)
1204 return -EIO;
1205
1206 mutex_lock(&phydev->lock);
1207 phydev->drv->get_strings(phydev, data);
1208 mutex_unlock(&phydev->lock);
1209
1210 return 0;
1211 }
1212
1213 static inline int phy_ethtool_get_sset_count(struct phy_device *phydev)
1214 {
1215 int ret;
1216
1217 if (!phydev->drv)
1218 return -EIO;
1219
1220 if (phydev->drv->get_sset_count &&
1221 phydev->drv->get_strings &&
1222 phydev->drv->get_stats) {
1223 mutex_lock(&phydev->lock);
1224 ret = phydev->drv->get_sset_count(phydev);
1225 mutex_unlock(&phydev->lock);
1226
1227 return ret;
1228 }
1229
1230 return -EOPNOTSUPP;
1231 }
1232
1233 static inline int phy_ethtool_get_stats(struct phy_device *phydev,
1234 struct ethtool_stats *stats, u64 *data)
1235 {
1236 if (!phydev->drv)
1237 return -EIO;
1238
1239 mutex_lock(&phydev->lock);
1240 phydev->drv->get_stats(phydev, stats, data);
1241 mutex_unlock(&phydev->lock);
1242
1243 return 0;
1244 }
1245
1246 extern struct bus_type mdio_bus_type;
1247
1248 struct mdio_board_info {
1249 const char *bus_id;
1250 char modalias[MDIO_NAME_SIZE];
1251 int mdio_addr;
1252 const void *platform_data;
1253 };
1254
1255 #if IS_ENABLED(CONFIG_MDIO_DEVICE)
1256 int mdiobus_register_board_info(const struct mdio_board_info *info,
1257 unsigned int n);
1258 #else
1259 static inline int mdiobus_register_board_info(const struct mdio_board_info *i,
1260 unsigned int n)
1261 {
1262 return 0;
1263 }
1264 #endif
1265
1266
1267 /**
1268 * module_phy_driver() - Helper macro for registering PHY drivers
1269 * @__phy_drivers: array of PHY drivers to register
1270 *
1271 * Helper macro for PHY drivers which do not do anything special in module
1272 * init/exit. Each module may only use this macro once, and calling it
1273 * replaces module_init() and module_exit().
1274 */
1275 #define phy_module_driver(__phy_drivers, __count) \
1276 static int __init phy_module_init(void) \
1277 { \
1278 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \
1279 } \
1280 module_init(phy_module_init); \
1281 static void __exit phy_module_exit(void) \
1282 { \
1283 phy_drivers_unregister(__phy_drivers, __count); \
1284 } \
1285 module_exit(phy_module_exit)
1286
1287 #define module_phy_driver(__phy_drivers) \
1288 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers))
1289
1290 bool phy_driver_is_genphy(struct phy_device *phydev);
1291 bool phy_driver_is_genphy_10g(struct phy_device *phydev);
1292
1293 #endif /* __PHY_H */