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1 /* Copyright (c) 2010-2015, 2018, The Linux Foundation. All rights reserved.
2 * Copyright (C) 2015 Linaro Ltd.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
16 #include <linux/types.h>
17 #include <linux/cpumask.h>
19 #define QCOM_SCM_VERSION(major, minor) (((major) << 16) | ((minor) & 0xFF))
20 #define QCOM_SCM_CPU_PWR_DOWN_L2_ON 0x0
21 #define QCOM_SCM_CPU_PWR_DOWN_L2_OFF 0x1
22 #define QCOM_SCM_HDCP_MAX_REQ_CNT 5
24 struct qcom_scm_hdcp_req
{
29 struct qcom_scm_vmperm
{
34 #define QCOM_SCM_VMID_HLOS 0x3
35 #define QCOM_SCM_VMID_MSS_MSA 0xF
36 #define QCOM_SCM_VMID_WLAN 0x18
37 #define QCOM_SCM_VMID_WLAN_CE 0x19
38 #define QCOM_SCM_PERM_READ 0x4
39 #define QCOM_SCM_PERM_WRITE 0x2
40 #define QCOM_SCM_PERM_EXEC 0x1
41 #define QCOM_SCM_PERM_RW (QCOM_SCM_PERM_READ | QCOM_SCM_PERM_WRITE)
42 #define QCOM_SCM_PERM_RWX (QCOM_SCM_PERM_RW | QCOM_SCM_PERM_EXEC)
44 #if IS_ENABLED(CONFIG_QCOM_SCM)
45 extern int qcom_scm_set_cold_boot_addr(void *entry
, const cpumask_t
*cpus
);
46 extern int qcom_scm_set_warm_boot_addr(void *entry
, const cpumask_t
*cpus
);
47 extern bool qcom_scm_is_available(void);
48 extern bool qcom_scm_hdcp_available(void);
49 extern int qcom_scm_hdcp_req(struct qcom_scm_hdcp_req
*req
, u32 req_cnt
,
51 extern bool qcom_scm_pas_supported(u32 peripheral
);
52 extern int qcom_scm_pas_init_image(u32 peripheral
, const void *metadata
,
54 extern int qcom_scm_pas_mem_setup(u32 peripheral
, phys_addr_t addr
,
56 extern int qcom_scm_pas_auth_and_reset(u32 peripheral
);
57 extern int qcom_scm_pas_shutdown(u32 peripheral
);
58 extern int qcom_scm_assign_mem(phys_addr_t mem_addr
, size_t mem_sz
,
59 unsigned int *src
, struct qcom_scm_vmperm
*newvm
,
61 extern void qcom_scm_cpu_power_down(u32 flags
);
62 extern u32
qcom_scm_get_version(void);
63 extern int qcom_scm_set_remote_state(u32 state
, u32 id
);
64 extern int qcom_scm_restore_sec_cfg(u32 device_id
, u32 spare
);
65 extern int qcom_scm_iommu_secure_ptbl_size(u32 spare
, size_t *size
);
66 extern int qcom_scm_iommu_secure_ptbl_init(u64 addr
, u32 size
, u32 spare
);
67 extern int qcom_scm_io_readl(phys_addr_t addr
, unsigned int *val
);
68 extern int qcom_scm_io_writel(phys_addr_t addr
, unsigned int val
);
71 int qcom_scm_set_cold_boot_addr(void *entry
, const cpumask_t
*cpus
)
76 int qcom_scm_set_warm_boot_addr(void *entry
, const cpumask_t
*cpus
)
80 static inline bool qcom_scm_is_available(void) { return false; }
81 static inline bool qcom_scm_hdcp_available(void) { return false; }
82 static inline int qcom_scm_hdcp_req(struct qcom_scm_hdcp_req
*req
, u32 req_cnt
,
83 u32
*resp
) { return -ENODEV
; }
84 static inline bool qcom_scm_pas_supported(u32 peripheral
) { return false; }
85 static inline int qcom_scm_pas_init_image(u32 peripheral
, const void *metadata
,
86 size_t size
) { return -ENODEV
; }
87 static inline int qcom_scm_pas_mem_setup(u32 peripheral
, phys_addr_t addr
,
88 phys_addr_t size
) { return -ENODEV
; }
90 qcom_scm_pas_auth_and_reset(u32 peripheral
) { return -ENODEV
; }
91 static inline int qcom_scm_pas_shutdown(u32 peripheral
) { return -ENODEV
; }
92 static inline int qcom_scm_assign_mem(phys_addr_t mem_addr
, size_t mem_sz
,
94 struct qcom_scm_vmperm
*newvm
,
95 int dest_cnt
) { return -ENODEV
; }
96 static inline void qcom_scm_cpu_power_down(u32 flags
) {}
97 static inline u32
qcom_scm_get_version(void) { return 0; }
99 qcom_scm_set_remote_state(u32 state
,u32 id
) { return -ENODEV
; }
100 static inline int qcom_scm_restore_sec_cfg(u32 device_id
, u32 spare
) { return -ENODEV
; }
101 static inline int qcom_scm_iommu_secure_ptbl_size(u32 spare
, size_t *size
) { return -ENODEV
; }
102 static inline int qcom_scm_iommu_secure_ptbl_init(u64 addr
, u32 size
, u32 spare
) { return -ENODEV
; }
103 static inline int qcom_scm_io_readl(phys_addr_t addr
, unsigned int *val
) { return -ENODEV
; }
104 static inline int qcom_scm_io_writel(phys_addr_t addr
, unsigned int val
) { return -ENODEV
; }