1 /* QLogic qed NIC Driver
2 * Copyright (c) 2015-2017 QLogic Corporation
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and /or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
36 #include <linux/types.h>
37 #include <linux/interrupt.h>
38 #include <linux/netdevice.h>
39 #include <linux/pci.h>
40 #include <linux/skbuff.h>
41 #include <linux/types.h>
42 #include <asm/byteorder.h>
44 #include <linux/compiler.h>
45 #include <linux/kernel.h>
46 #include <linux/list.h>
47 #include <linux/slab.h>
48 #include <linux/qed/common_hsi.h>
49 #include <linux/qed/qed_chain.h>
51 enum dcbx_protocol_type
{
55 DCBX_PROTOCOL_ROCE_V2
,
57 DCBX_MAX_PROTOCOL_TYPE
60 #define QED_ROCE_PROTOCOL_INDEX (3)
62 #define QED_LLDP_CHASSIS_ID_STAT_LEN 4
63 #define QED_LLDP_PORT_ID_STAT_LEN 4
64 #define QED_DCBX_MAX_APP_PROTOCOL 32
65 #define QED_MAX_PFC_PRIORITIES 8
66 #define QED_DCBX_DSCP_SIZE 64
68 struct qed_dcbx_lldp_remote
{
69 u32 peer_chassis_id
[QED_LLDP_CHASSIS_ID_STAT_LEN
];
70 u32 peer_port_id
[QED_LLDP_PORT_ID_STAT_LEN
];
77 struct qed_dcbx_lldp_local
{
78 u32 local_chassis_id
[QED_LLDP_CHASSIS_ID_STAT_LEN
];
79 u32 local_port_id
[QED_LLDP_PORT_ID_STAT_LEN
];
82 struct qed_dcbx_app_prio
{
90 struct qed_dbcx_pfc_params
{
93 u8 prio
[QED_MAX_PFC_PRIORITIES
];
97 enum qed_dcbx_sf_ieee_type
{
98 QED_DCBX_SF_IEEE_ETHTYPE
,
99 QED_DCBX_SF_IEEE_TCP_PORT
,
100 QED_DCBX_SF_IEEE_UDP_PORT
,
101 QED_DCBX_SF_IEEE_TCP_UDP_PORT
104 struct qed_app_entry
{
106 enum qed_dcbx_sf_ieee_type sf_ieee
;
110 enum dcbx_protocol_type proto_type
;
113 struct qed_dcbx_params
{
114 struct qed_app_entry app_entry
[QED_DCBX_MAX_APP_PROTOCOL
];
123 u8 ets_pri_tc_tbl
[QED_MAX_PFC_PRIORITIES
];
124 u8 ets_tc_bw_tbl
[QED_MAX_PFC_PRIORITIES
];
125 u8 ets_tc_tsa_tbl
[QED_MAX_PFC_PRIORITIES
];
126 struct qed_dbcx_pfc_params pfc
;
130 struct qed_dcbx_admin_params
{
131 struct qed_dcbx_params params
;
135 struct qed_dcbx_remote_params
{
136 struct qed_dcbx_params params
;
140 struct qed_dcbx_operational_params
{
141 struct qed_dcbx_app_prio app_prio
;
142 struct qed_dcbx_params params
;
151 struct qed_dcbx_get
{
152 struct qed_dcbx_operational_params operational
;
153 struct qed_dcbx_lldp_remote lldp_remote
;
154 struct qed_dcbx_lldp_local lldp_local
;
155 struct qed_dcbx_remote_params remote
;
156 struct qed_dcbx_admin_params local
;
159 enum qed_nvm_images
{
160 QED_NVM_IMAGE_ISCSI_CFG
,
161 QED_NVM_IMAGE_FCOE_CFG
,
164 struct qed_link_eee_params
{
166 #define QED_EEE_1G_ADV BIT(0)
167 #define QED_EEE_10G_ADV BIT(1)
169 /* Capabilities are represented using QED_EEE_*_ADV values */
182 #define DIRECT_REG_WR(reg_addr, val) writel((u32)val, \
183 (void __iomem *)(reg_addr))
185 #define DIRECT_REG_RD(reg_addr) readl((void __iomem *)(reg_addr))
187 #define QED_COALESCE_MAX 0x1FF
188 #define QED_DEFAULT_RX_USECS 12
189 #define QED_DEFAULT_TX_USECS 48
194 struct qed_eth_pf_params
{
195 /* The following parameters are used during HW-init
196 * and these parameters need to be passed as arguments
197 * to update_pf_params routine invoked before slowpath start
201 /* per-VF number of CIDs */
203 #define ETH_PF_PARAMS_VF_CONS_DEFAULT (32)
205 /* To enable arfs, previous to HW-init a positive number needs to be
206 * set [as filters require allocated searcher ILT memory].
207 * This will set the maximal number of configured steering-filters.
209 u32 num_arfs_filters
;
212 struct qed_fcoe_pf_params
{
213 /* The following parameters are used during protocol-init */
214 u64 glbl_q_params_addr
;
215 u64 bdq_pbl_base_addr
[2];
217 /* The following parameters are used during HW-init
218 * and these parameters need to be passed as arguments
219 * to update_pf_params routine invoked before slowpath start
224 /* The following parameters are used during protocol-init */
225 u16 sq_num_pbl_pages
;
228 u16 cmdq_num_entries
;
229 u16 rq_buffer_log_size
;
232 u16 bdq_xoff_threshold
[2];
233 u16 bdq_xon_threshold
[2];
235 u8 num_cqs
; /* num of global CQs */
241 u8 bdq_pbl_num_entries
[2];
244 /* Most of the the parameters below are described in the FW iSCSI / TCP HSI */
245 struct qed_iscsi_pf_params
{
246 u64 glbl_q_params_addr
;
247 u64 bdq_pbl_base_addr
[2];
250 u16 cmdq_num_entries
;
252 u16 dup_ack_threshold
;
258 /* The following parameters are used during HW-init
259 * and these parameters need to be passed as arguments
260 * to update_pf_params routine invoked before slowpath start
265 /* The following parameters are used during protocol-init */
266 u16 half_way_close_timeout
;
267 u16 bdq_xoff_threshold
[2];
268 u16 bdq_xon_threshold
[2];
269 u16 cmdq_xoff_threshold
;
270 u16 cmdq_xon_threshold
;
273 u8 num_sq_pages_in_ring
;
274 u8 num_r2tq_pages_in_ring
;
275 u8 num_uhq_pages_in_ring
;
287 u8 bdq_pbl_num_entries
[2];
290 struct qed_rdma_pf_params
{
291 /* Supplied to QED during resource allocation (may affect the ILT and
294 u32 min_dpis
; /* number of requested DPIs */
295 u32 num_qps
; /* number of requested Queue Pairs */
296 u32 num_srqs
; /* number of requested SRQ */
297 u8 roce_edpm_mode
; /* see QED_ROCE_EDPM_MODE_ENABLE */
298 u8 gl_pi
; /* protocol index */
300 /* Will allocate rate limiters to be used with QPs */
304 struct qed_pf_params
{
305 struct qed_eth_pf_params eth_pf_params
;
306 struct qed_fcoe_pf_params fcoe_pf_params
;
307 struct qed_iscsi_pf_params iscsi_pf_params
;
308 struct qed_rdma_pf_params rdma_pf_params
;
319 struct status_block
*sb_virt
;
321 u32 sb_ack
; /* Last given ack */
323 void __iomem
*igu_addr
;
325 #define QED_SB_INFO_INIT 0x1
326 #define QED_SB_INFO_SETUP 0x2
328 struct qed_dev
*cdev
;
336 struct qed_dev_info
{
337 unsigned long pci_mem_start
;
338 unsigned long pci_mem_end
;
339 unsigned int pci_irq
;
353 #define QED_MFW_VERSION_0_MASK 0x000000FF
354 #define QED_MFW_VERSION_0_OFFSET 0
355 #define QED_MFW_VERSION_1_MASK 0x0000FF00
356 #define QED_MFW_VERSION_1_OFFSET 8
357 #define QED_MFW_VERSION_2_MASK 0x00FF0000
358 #define QED_MFW_VERSION_2_OFFSET 16
359 #define QED_MFW_VERSION_3_MASK 0xFF000000
360 #define QED_MFW_VERSION_3_OFFSET 24
372 #define QED_MBI_VERSION_0_MASK 0x000000FF
373 #define QED_MBI_VERSION_0_OFFSET 0
374 #define QED_MBI_VERSION_1_MASK 0x0000FF00
375 #define QED_MBI_VERSION_1_OFFSET 8
376 #define QED_MBI_VERSION_2_MASK 0x00FF0000
377 #define QED_MBI_VERSION_2_OFFSET 16
379 enum qed_dev_type dev_type
;
381 /* Output parameters for qede */
390 QED_SB_TYPE_L2_QUEUE
,
401 enum qed_link_mode_bits
{
402 QED_LM_FIBRE_BIT
= BIT(0),
403 QED_LM_Autoneg_BIT
= BIT(1),
404 QED_LM_Asym_Pause_BIT
= BIT(2),
405 QED_LM_Pause_BIT
= BIT(3),
406 QED_LM_1000baseT_Half_BIT
= BIT(4),
407 QED_LM_1000baseT_Full_BIT
= BIT(5),
408 QED_LM_10000baseKR_Full_BIT
= BIT(6),
409 QED_LM_25000baseKR_Full_BIT
= BIT(7),
410 QED_LM_40000baseLR4_Full_BIT
= BIT(8),
411 QED_LM_50000baseKR2_Full_BIT
= BIT(9),
412 QED_LM_100000baseKR4_Full_BIT
= BIT(10),
416 struct qed_link_params
{
419 #define QED_LINK_OVERRIDE_SPEED_AUTONEG BIT(0)
420 #define QED_LINK_OVERRIDE_SPEED_ADV_SPEEDS BIT(1)
421 #define QED_LINK_OVERRIDE_SPEED_FORCED_SPEED BIT(2)
422 #define QED_LINK_OVERRIDE_PAUSE_CONFIG BIT(3)
423 #define QED_LINK_OVERRIDE_LOOPBACK_MODE BIT(4)
424 #define QED_LINK_OVERRIDE_EEE_CONFIG BIT(5)
429 #define QED_LINK_PAUSE_AUTONEG_ENABLE BIT(0)
430 #define QED_LINK_PAUSE_RX_ENABLE BIT(1)
431 #define QED_LINK_PAUSE_TX_ENABLE BIT(2)
433 #define QED_LINK_LOOPBACK_NONE BIT(0)
434 #define QED_LINK_LOOPBACK_INT_PHY BIT(1)
435 #define QED_LINK_LOOPBACK_EXT_PHY BIT(2)
436 #define QED_LINK_LOOPBACK_EXT BIT(3)
437 #define QED_LINK_LOOPBACK_MAC BIT(4)
439 struct qed_link_eee_params eee
;
442 struct qed_link_output
{
445 /* In QED_LM_* defs */
450 u32 speed
; /* In Mb/s */
451 u8 duplex
; /* In DUPLEX defs */
452 u8 port
; /* In PORT defs */
456 /* EEE - capability & param */
460 struct qed_link_eee_params eee
;
463 struct qed_probe_params
{
464 enum qed_protocol protocol
;
470 #define QED_DRV_VER_STR_SIZE 12
471 struct qed_slowpath_params
{
477 u8 name
[QED_DRV_VER_STR_SIZE
];
480 #define ILT_PAGE_SIZE_TCFC 0x8000 /* 32KB */
482 struct qed_int_info
{
483 struct msix_entry
*msix
;
486 /* This should be updated by the protocol driver */
490 struct qed_common_cb_ops
{
491 void (*arfs_filter_op
)(void *dev
, void *fltr
, u8 fw_rc
);
492 void (*link_update
)(void *dev
,
493 struct qed_link_output
*link
);
494 void (*dcbx_aen
)(void *dev
, struct qed_dcbx_get
*get
, u32 mib_type
);
497 struct qed_selftest_ops
{
499 * @brief selftest_interrupt - Perform interrupt test
503 * @return 0 on success, error otherwise.
505 int (*selftest_interrupt
)(struct qed_dev
*cdev
);
508 * @brief selftest_memory - Perform memory test
512 * @return 0 on success, error otherwise.
514 int (*selftest_memory
)(struct qed_dev
*cdev
);
517 * @brief selftest_register - Perform register test
521 * @return 0 on success, error otherwise.
523 int (*selftest_register
)(struct qed_dev
*cdev
);
526 * @brief selftest_clock - Perform clock test
530 * @return 0 on success, error otherwise.
532 int (*selftest_clock
)(struct qed_dev
*cdev
);
535 * @brief selftest_nvram - Perform nvram test
539 * @return 0 on success, error otherwise.
541 int (*selftest_nvram
) (struct qed_dev
*cdev
);
544 struct qed_common_ops
{
545 struct qed_selftest_ops
*selftest
;
547 struct qed_dev
* (*probe
)(struct pci_dev
*dev
,
548 struct qed_probe_params
*params
);
550 void (*remove
)(struct qed_dev
*cdev
);
552 int (*set_power_state
)(struct qed_dev
*cdev
,
555 void (*set_name
) (struct qed_dev
*cdev
, char name
[]);
557 /* Client drivers need to make this call before slowpath_start.
558 * PF params required for the call before slowpath_start is
559 * documented within the qed_pf_params structure definition.
561 void (*update_pf_params
)(struct qed_dev
*cdev
,
562 struct qed_pf_params
*params
);
563 int (*slowpath_start
)(struct qed_dev
*cdev
,
564 struct qed_slowpath_params
*params
);
566 int (*slowpath_stop
)(struct qed_dev
*cdev
);
568 /* Requests to use `cnt' interrupts for fastpath.
569 * upon success, returns number of interrupts allocated for fastpath.
571 int (*set_fp_int
)(struct qed_dev
*cdev
,
574 /* Fills `info' with pointers required for utilizing interrupts */
575 int (*get_fp_int
)(struct qed_dev
*cdev
,
576 struct qed_int_info
*info
);
578 u32 (*sb_init
)(struct qed_dev
*cdev
,
579 struct qed_sb_info
*sb_info
,
581 dma_addr_t sb_phy_addr
,
583 enum qed_sb_type type
);
585 u32 (*sb_release
)(struct qed_dev
*cdev
,
586 struct qed_sb_info
*sb_info
,
589 void (*simd_handler_config
)(struct qed_dev
*cdev
,
592 void (*handler
)(void *));
594 void (*simd_handler_clean
)(struct qed_dev
*cdev
,
596 int (*dbg_grc
)(struct qed_dev
*cdev
,
597 void *buffer
, u32
*num_dumped_bytes
);
599 int (*dbg_grc_size
)(struct qed_dev
*cdev
);
601 int (*dbg_all_data
) (struct qed_dev
*cdev
, void *buffer
);
603 int (*dbg_all_data_size
) (struct qed_dev
*cdev
);
606 * @brief can_link_change - can the instance change the link or not
610 * @return true if link-change is allowed, false otherwise.
612 bool (*can_link_change
)(struct qed_dev
*cdev
);
615 * @brief set_link - set links according to params
618 * @param params - values used to override the default link configuration
620 * @return 0 on success, error otherwise.
622 int (*set_link
)(struct qed_dev
*cdev
,
623 struct qed_link_params
*params
);
626 * @brief get_link - returns the current link state.
629 * @param if_link - structure to be filled with current link configuration.
631 void (*get_link
)(struct qed_dev
*cdev
,
632 struct qed_link_output
*if_link
);
635 * @brief - drains chip in case Tx completions fail to arrive due to pause.
639 int (*drain
)(struct qed_dev
*cdev
);
642 * @brief update_msglvl - update module debug level
648 void (*update_msglvl
)(struct qed_dev
*cdev
,
652 int (*chain_alloc
)(struct qed_dev
*cdev
,
653 enum qed_chain_use_mode intended_use
,
654 enum qed_chain_mode mode
,
655 enum qed_chain_cnt_type cnt_type
,
658 struct qed_chain
*p_chain
,
659 struct qed_chain_ext_pbl
*ext_pbl
);
661 void (*chain_free
)(struct qed_dev
*cdev
,
662 struct qed_chain
*p_chain
);
665 * @brief nvm_get_image - reads an entire image from nvram
668 * @param type - type of the request nvram image
669 * @param buf - preallocated buffer to fill with the image
670 * @param len - length of the allocated buffer
672 * @return 0 on success, error otherwise
674 int (*nvm_get_image
)(struct qed_dev
*cdev
,
675 enum qed_nvm_images type
, u8
*buf
, u16 len
);
678 * @brief set_coalesce - Configure Rx coalesce value in usec
681 * @param rx_coal - Rx coalesce value in usec
682 * @param tx_coal - Tx coalesce value in usec
683 * @param qid - Queue index
684 * @param sb_id - Status Block Id
686 * @return 0 on success, error otherwise.
688 int (*set_coalesce
)(struct qed_dev
*cdev
,
689 u16 rx_coal
, u16 tx_coal
, void *handle
);
692 * @brief set_led - Configure LED mode
695 * @param mode - LED mode
697 * @return 0 on success, error otherwise.
699 int (*set_led
)(struct qed_dev
*cdev
,
700 enum qed_led_mode mode
);
703 * @brief update_drv_state - API to inform the change in the driver state.
709 int (*update_drv_state
)(struct qed_dev
*cdev
, bool active
);
712 * @brief update_mac - API to inform the change in the mac address
718 int (*update_mac
)(struct qed_dev
*cdev
, u8
*mac
);
721 * @brief update_mtu - API to inform the change in the mtu
727 int (*update_mtu
)(struct qed_dev
*cdev
, u16 mtu
);
730 * @brief update_wol - update of changes in the WoL configuration
733 * @param enabled - true iff WoL should be enabled.
735 int (*update_wol
) (struct qed_dev
*cdev
, bool enabled
);
738 #define MASK_FIELD(_name, _value) \
739 ((_value) &= (_name ## _MASK))
741 #define FIELD_VALUE(_name, _value) \
742 ((_value & _name ## _MASK) << _name ## _SHIFT)
744 #define SET_FIELD(value, name, flag) \
746 (value) &= ~(name ## _MASK << name ## _SHIFT); \
747 (value) |= (((u64)flag) << (name ## _SHIFT)); \
750 #define GET_FIELD(value, name) \
751 (((value) >> (name ## _SHIFT)) & name ## _MASK)
753 /* Debug print definitions */
754 #define DP_ERR(cdev, fmt, ...) \
756 pr_err("[%s:%d(%s)]" fmt, \
757 __func__, __LINE__, \
758 DP_NAME(cdev) ? DP_NAME(cdev) : "", \
762 #define DP_NOTICE(cdev, fmt, ...) \
764 if (unlikely((cdev)->dp_level <= QED_LEVEL_NOTICE)) { \
765 pr_notice("[%s:%d(%s)]" fmt, \
766 __func__, __LINE__, \
767 DP_NAME(cdev) ? DP_NAME(cdev) : "", \
773 #define DP_INFO(cdev, fmt, ...) \
775 if (unlikely((cdev)->dp_level <= QED_LEVEL_INFO)) { \
776 pr_notice("[%s:%d(%s)]" fmt, \
777 __func__, __LINE__, \
778 DP_NAME(cdev) ? DP_NAME(cdev) : "", \
783 #define DP_VERBOSE(cdev, module, fmt, ...) \
785 if (unlikely(((cdev)->dp_level <= QED_LEVEL_VERBOSE) && \
786 ((cdev)->dp_module & module))) { \
787 pr_notice("[%s:%d(%s)]" fmt, \
788 __func__, __LINE__, \
789 DP_NAME(cdev) ? DP_NAME(cdev) : "", \
795 QED_LEVEL_VERBOSE
= 0x0,
796 QED_LEVEL_INFO
= 0x1,
797 QED_LEVEL_NOTICE
= 0x2,
801 #define QED_LOG_LEVEL_SHIFT (30)
802 #define QED_LOG_VERBOSE_MASK (0x3fffffff)
803 #define QED_LOG_INFO_MASK (0x40000000)
804 #define QED_LOG_NOTICE_MASK (0x80000000)
807 QED_MSG_SPQ
= 0x10000,
808 QED_MSG_STATS
= 0x20000,
809 QED_MSG_DCB
= 0x40000,
810 QED_MSG_IOV
= 0x80000,
811 QED_MSG_SP
= 0x100000,
812 QED_MSG_STORAGE
= 0x200000,
813 QED_MSG_CXT
= 0x800000,
814 QED_MSG_LL2
= 0x1000000,
815 QED_MSG_ILT
= 0x2000000,
816 QED_MSG_RDMA
= 0x4000000,
817 QED_MSG_DEBUG
= 0x8000000,
818 /* to be added...up to 0x8000000 */
827 struct qed_eth_stats_common
{
828 u64 no_buff_discards
;
829 u64 packet_too_big_discard
;
837 u64 mftag_filter_discards
;
838 u64 mac_filter_discards
;
845 u64 tx_err_drop_pkts
;
846 u64 tpa_coalesced_pkts
;
847 u64 tpa_coalesced_events
;
849 u64 tpa_not_coalesced_pkts
;
850 u64 tpa_coalesced_bytes
;
853 u64 rx_64_byte_packets
;
854 u64 rx_65_to_127_byte_packets
;
855 u64 rx_128_to_255_byte_packets
;
856 u64 rx_256_to_511_byte_packets
;
857 u64 rx_512_to_1023_byte_packets
;
858 u64 rx_1024_to_1518_byte_packets
;
860 u64 rx_mac_crtl_frames
;
864 u64 rx_carrier_errors
;
865 u64 rx_oversize_packets
;
867 u64 rx_undersize_packets
;
869 u64 tx_64_byte_packets
;
870 u64 tx_65_to_127_byte_packets
;
871 u64 tx_128_to_255_byte_packets
;
872 u64 tx_256_to_511_byte_packets
;
873 u64 tx_512_to_1023_byte_packets
;
874 u64 tx_1024_to_1518_byte_packets
;
880 u64 rx_mac_uc_packets
;
881 u64 rx_mac_mc_packets
;
882 u64 rx_mac_bc_packets
;
883 u64 rx_mac_frames_ok
;
885 u64 tx_mac_uc_packets
;
886 u64 tx_mac_mc_packets
;
887 u64 tx_mac_bc_packets
;
888 u64 tx_mac_ctrl_frames
;
891 struct qed_eth_stats_bb
{
892 u64 rx_1519_to_1522_byte_packets
;
893 u64 rx_1519_to_2047_byte_packets
;
894 u64 rx_2048_to_4095_byte_packets
;
895 u64 rx_4096_to_9216_byte_packets
;
896 u64 rx_9217_to_16383_byte_packets
;
897 u64 tx_1519_to_2047_byte_packets
;
898 u64 tx_2048_to_4095_byte_packets
;
899 u64 tx_4096_to_9216_byte_packets
;
900 u64 tx_9217_to_16383_byte_packets
;
901 u64 tx_lpi_entry_count
;
902 u64 tx_total_collisions
;
905 struct qed_eth_stats_ah
{
906 u64 rx_1519_to_max_byte_packets
;
907 u64 tx_1519_to_max_byte_packets
;
910 struct qed_eth_stats
{
911 struct qed_eth_stats_common common
;
914 struct qed_eth_stats_bb bb
;
915 struct qed_eth_stats_ah ah
;
919 #define QED_SB_IDX 0x0002
922 #define TX_PI(tc) (RX_PI + 1 + tc)
924 struct qed_sb_cnt_info
{
925 /* Original, current, and free SBs for PF */
930 /* Original, current and free SBS for child VFs */
936 static inline u16
qed_sb_update_sb_idx(struct qed_sb_info
*sb_info
)
941 prod
= le32_to_cpu(sb_info
->sb_virt
->prod_index
) &
942 STATUS_BLOCK_PROD_INDEX_MASK
;
943 if (sb_info
->sb_ack
!= prod
) {
944 sb_info
->sb_ack
= prod
;
955 * @brief This function creates an update command for interrupts that is
956 * written to the IGU.
958 * @param sb_info - This is the structure allocated and
959 * initialized per status block. Assumption is
960 * that it was initialized using qed_sb_init
961 * @param int_cmd - Enable/Disable/Nop
962 * @param upd_flg - whether igu consumer should be
965 * @return inline void
967 static inline void qed_sb_ack(struct qed_sb_info
*sb_info
,
968 enum igu_int_cmd int_cmd
,
971 struct igu_prod_cons_update igu_ack
= { 0 };
973 igu_ack
.sb_id_and_flags
=
974 ((sb_info
->sb_ack
<< IGU_PROD_CONS_UPDATE_SB_INDEX_SHIFT
) |
975 (upd_flg
<< IGU_PROD_CONS_UPDATE_UPDATE_FLAG_SHIFT
) |
976 (int_cmd
<< IGU_PROD_CONS_UPDATE_ENABLE_INT_SHIFT
) |
977 (IGU_SEG_ACCESS_REG
<<
978 IGU_PROD_CONS_UPDATE_SEGMENT_ACCESS_SHIFT
));
980 DIRECT_REG_WR(sb_info
->igu_addr
, igu_ack
.sb_id_and_flags
);
982 /* Both segments (interrupts & acks) are written to same place address;
983 * Need to guarantee all commands will be received (in-order) by HW.
989 static inline void __internal_ram_wr(void *p_hwfn
,
997 for (i
= 0; i
< size
/ sizeof(*data
); i
++)
998 DIRECT_REG_WR(&((u32 __iomem
*)addr
)[i
], data
[i
]);
1001 static inline void internal_ram_wr(void __iomem
*addr
,
1005 __internal_ram_wr(NULL
, addr
, size
, data
);
1011 QED_RSS_IPV4_TCP
= 0x4,
1012 QED_RSS_IPV6_TCP
= 0x8,
1013 QED_RSS_IPV4_UDP
= 0x10,
1014 QED_RSS_IPV6_UDP
= 0x20,
1017 #define QED_RSS_IND_TABLE_SIZE 128
1018 #define QED_RSS_KEY_SIZE 10 /* size in 32b chunks */