include/linux/serial_core.h

   1 /*
   2  *  linux/drivers/char/serial_core.h
   3  *
   4  *  Copyright (C) 2000 Deep Blue Solutions Ltd.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  19  */
  20 #ifndef LINUX_SERIAL_CORE_H
  21 #define LINUX_SERIAL_CORE_H
  22
  23 #include <linux/serial.h>
  24
  25 /*
  26  * The type definitions.  These are from Ted Ts'o's serial.h
  27  */
  28 #define PORT_UNKNOWN    0
  29 #define PORT_8250       1
  30 #define PORT_16450      2
  31 #define PORT_16550      3
  32 #define PORT_16550A     4
  33 #define PORT_CIRRUS     5
  34 #define PORT_16650      6
  35 #define PORT_16650V2    7
  36 #define PORT_16750      8
  37 #define PORT_STARTECH   9
  38 #define PORT_16C950     10
  39 #define PORT_16654      11
  40 #define PORT_16850      12
  41 #define PORT_RSA        13
  42 #define PORT_NS16550A   14
  43 #define PORT_XSCALE     15
  44 #define PORT_RM9000     16      /* PMC-Sierra RM9xxx internal UART */
  45 #define PORT_OCTEON     17      /* Cavium OCTEON internal UART */
  46 #define PORT_AR7        18      /* Texas Instruments AR7 internal UART */
  47 #define PORT_U6_16550A  19      /* ST-Ericsson U6xxx internal UART */
  48 #define PORT_TEGRA      20      /* NVIDIA Tegra internal UART */
  49 #define PORT_XR17D15X   21      /* Exar XR17D15x UART */
  50 #define PORT_MAX_8250   21      /* max port ID */
  51
  52 /*
  53  * ARM specific type numbers.  These are not currently guaranteed
  54  * to be implemented, and will change in the future.  These are
  55  * separate so any additions to the old serial.c that occur before
  56  * we are merged can be easily merged here.
  57  */
  58 #define PORT_PXA        31
  59 #define PORT_AMBA       32
  60 #define PORT_CLPS711X   33
  61 #define PORT_SA1100     34
  62 #define PORT_UART00     35
  63 #define PORT_21285      37
  64
  65 /* Sparc type numbers.  */
  66 #define PORT_SUNZILOG   38
  67 #define PORT_SUNSAB     39
  68
  69 /* DEC */
  70 #define PORT_DZ         46
  71 #define PORT_ZS         47
  72
  73 /* Parisc type numbers. */
  74 #define PORT_MUX        48
  75
  76 /* Atmel AT91 / AT32 SoC */
  77 #define PORT_ATMEL      49
  78
  79 /* Macintosh Zilog type numbers */
  80 #define PORT_MAC_ZILOG  50      /* m68k : not yet implemented */
  81 #define PORT_PMAC_ZILOG 51
  82
  83 /* SH-SCI */
  84 #define PORT_SCI        52
  85 #define PORT_SCIF       53
  86 #define PORT_IRDA       54
  87
  88 /* Samsung S3C2410 SoC and derivatives thereof */
  89 #define PORT_S3C2410    55
  90
  91 /* SGI IP22 aka Indy / Challenge S / Indigo 2 */
  92 #define PORT_IP22ZILOG  56
  93
  94 /* Sharp LH7a40x -- an ARM9 SoC series */
  95 #define PORT_LH7A40X    57
  96
  97 /* PPC CPM type number */
  98 #define PORT_CPM        58
  99
 100 /* MPC52xx (and MPC512x) type numbers */
 101 #define PORT_MPC52xx    59
 102
 103 /* IBM icom */
 104 #define PORT_ICOM       60
 105
 106 /* Samsung S3C2440 SoC */
 107 #define PORT_S3C2440    61
 108
 109 /* Motorola i.MX SoC */
 110 #define PORT_IMX        62
 111
 112 /* Marvell MPSC */
 113 #define PORT_MPSC       63
 114
 115 /* TXX9 type number */
 116 #define PORT_TXX9       64
 117
 118 /* NEC VR4100 series SIU/DSIU */
 119 #define PORT_VR41XX_SIU         65
 120 #define PORT_VR41XX_DSIU        66
 121
 122 /* Samsung S3C2400 SoC */
 123 #define PORT_S3C2400    67
 124
 125 /* M32R SIO */
 126 #define PORT_M32R_SIO   68
 127
 128 /*Digi jsm */
 129 #define PORT_JSM        69
 130
 131 #define PORT_PNX8XXX    70
 132
 133 /* Hilscher netx */
 134 #define PORT_NETX       71
 135
 136 /* SUN4V Hypervisor Console */
 137 #define PORT_SUNHV      72
 138
 139 #define PORT_S3C2412    73
 140
 141 /* Xilinx uartlite */
 142 #define PORT_UARTLITE   74
 143
 144 /* Blackfin bf5xx */
 145 #define PORT_BFIN       75
 146
 147 /* Micrel KS8695 */
 148 #define PORT_KS8695     76
 149
 150 /* Broadcom SB1250, etc. SOC */
 151 #define PORT_SB1250_DUART       77
 152
 153 /* Freescale ColdFire */
 154 #define PORT_MCF        78
 155
 156 /* Blackfin SPORT */
 157 #define PORT_BFIN_SPORT         79
 158
 159 /* MN10300 on-chip UART numbers */
 160 #define PORT_MN10300            80
 161 #define PORT_MN10300_CTS        81
 162
 163 #define PORT_SC26XX     82
 164
 165 /* SH-SCI */
 166 #define PORT_SCIFA      83
 167
 168 #define PORT_S3C6400    84
 169
 170 /* NWPSERIAL */
 171 #define PORT_NWPSERIAL  85
 172
 173 /* MAX3100 */
 174 #define PORT_MAX3100    86
 175
 176 /* Timberdale UART */
 177 #define PORT_TIMBUART   87
 178
 179 /* Qualcomm MSM SoCs */
 180 #define PORT_MSM        88
 181
 182 /* BCM63xx family SoCs */
 183 #define PORT_BCM63XX    89
 184
 185 /* Aeroflex Gaisler GRLIB APBUART */
 186 #define PORT_APBUART    90
 187
 188 /* Altera UARTs */
 189 #define PORT_ALTERA_JTAGUART    91
 190 #define PORT_ALTERA_UART        92
 191
 192 /* SH-SCI */
 193 #define PORT_SCIFB      93
 194
 195 /* MAX3107 */
 196 #define PORT_MAX3107    94
 197
 198 /* High Speed UART for Medfield */
 199 #define PORT_MFD        95
 200
 201 /* TI OMAP-UART */
 202 #define PORT_OMAP       96
 203
 204 /* VIA VT8500 SoC */
 205 #define PORT_VT8500     97
 206
 207 /* Xilinx PSS UART */
 208 #define PORT_XUARTPS    98
 209
 210 /* Atheros AR933X SoC */
 211 #define PORT_AR933X     99
 212
 213 /* Energy Micro efm32 SoC */
 214 #define PORT_EFMUART   100
 215
 216 #ifdef __KERNEL__
 217
 218 #include <linux/compiler.h>
 219 #include <linux/interrupt.h>
 220 #include <linux/circ_buf.h>
 221 #include <linux/spinlock.h>
 222 #include <linux/sched.h>
 223 #include <linux/tty.h>
 224 #include <linux/mutex.h>
 225 #include <linux/sysrq.h>
 226 #include <linux/pps_kernel.h>
 227
 228 struct uart_port;
 229 struct serial_struct;
 230 struct device;
 231
 232 /*
 233  * This structure describes all the operations that can be
 234  * done on the physical hardware.
 235  */
 236 struct uart_ops {
 237         unsigned int    (*tx_empty)(struct uart_port *);
 238         void            (*set_mctrl)(struct uart_port *, unsigned int mctrl);
 239         unsigned int    (*get_mctrl)(struct uart_port *);
 240         void            (*stop_tx)(struct uart_port *);
 241         void            (*start_tx)(struct uart_port *);
 242         void            (*send_xchar)(struct uart_port *, char ch);
 243         void            (*stop_rx)(struct uart_port *);
 244         void            (*enable_ms)(struct uart_port *);
 245         void            (*break_ctl)(struct uart_port *, int ctl);
 246         int             (*startup)(struct uart_port *);
 247         void            (*shutdown)(struct uart_port *);
 248         void            (*flush_buffer)(struct uart_port *);
 249         void            (*set_termios)(struct uart_port *, struct ktermios *new,
 250                                        struct ktermios *old);
 251         void            (*set_ldisc)(struct uart_port *, int new);
 252         void            (*pm)(struct uart_port *, unsigned int state,
 253                               unsigned int oldstate);
 254         int             (*set_wake)(struct uart_port *, unsigned int state);
 255
 256         /*
 257          * Return a string describing the type of the port
 258          */
 259         const char *(*type)(struct uart_port *);
 260
 261         /*
 262          * Release IO and memory resources used by the port.
 263          * This includes iounmap if necessary.
 264          */
 265         void            (*release_port)(struct uart_port *);
 266
 267         /*
 268          * Request IO and memory resources used by the port.
 269          * This includes iomapping the port if necessary.
 270          */
 271         int             (*request_port)(struct uart_port *);
 272         void            (*config_port)(struct uart_port *, int);
 273         int             (*verify_port)(struct uart_port *, struct serial_struct *);
 274         int             (*ioctl)(struct uart_port *, unsigned int, unsigned long);
 275 #ifdef CONFIG_CONSOLE_POLL
 276         void    (*poll_put_char)(struct uart_port *, unsigned char);
 277         int             (*poll_get_char)(struct uart_port *);
 278 #endif
 279 };
 280
 281 #define NO_POLL_CHAR            0x00ff0000
 282 #define UART_CONFIG_TYPE        (1 << 0)
 283 #define UART_CONFIG_IRQ         (1 << 1)
 284
 285 struct uart_icount {
 286         __u32   cts;
 287         __u32   dsr;
 288         __u32   rng;
 289         __u32   dcd;
 290         __u32   rx;
 291         __u32   tx;
 292         __u32   frame;
 293         __u32   overrun;
 294         __u32   parity;
 295         __u32   brk;
 296         __u32   buf_overrun;
 297 };
 298
 299 typedef unsigned int __bitwise__ upf_t;
 300
 301 struct uart_port {
 302         spinlock_t              lock;                   /* port lock */
 303         unsigned long           iobase;                 /* in/out[bwl] */
 304         unsigned char __iomem   *membase;               /* read/write[bwl] */
 305         unsigned int            (*serial_in)(struct uart_port *, int);
 306         void                    (*serial_out)(struct uart_port *, int, int);
 307         void                    (*set_termios)(struct uart_port *,
 308                                                struct ktermios *new,
 309                                                struct ktermios *old);
 310         int                     (*handle_irq)(struct uart_port *);
 311         void                    (*pm)(struct uart_port *, unsigned int state,
 312                                       unsigned int old);
 313         void                    (*handle_break)(struct uart_port *);
 314         unsigned int            irq;                    /* irq number */
 315         unsigned long           irqflags;               /* irq flags  */
 316         unsigned int            uartclk;                /* base uart clock */
 317         unsigned int            fifosize;               /* tx fifo size */
 318         unsigned char           x_char;                 /* xon/xoff char */
 319         unsigned char           regshift;               /* reg offset shift */
 320         unsigned char           iotype;                 /* io access style */
 321         unsigned char           unused1;
 322
 323 #define UPIO_PORT               (0)
 324 #define UPIO_HUB6               (1)
 325 #define UPIO_MEM                (2)
 326 #define UPIO_MEM32              (3)
 327 #define UPIO_AU                 (4)                     /* Au1x00 type IO */
 328 #define UPIO_TSI                (5)                     /* Tsi108/109 type IO */
 329 #define UPIO_RM9000             (6)                     /* RM9000 type IO */
 330
 331         unsigned int            read_status_mask;       /* driver specific */
 332         unsigned int            ignore_status_mask;     /* driver specific */
 333         struct uart_state       *state;                 /* pointer to parent state */
 334         struct uart_icount      icount;                 /* statistics */
 335
 336         struct console          *cons;                  /* struct console, if any */
 337 #if defined(CONFIG_SERIAL_CORE_CONSOLE) || defined(SUPPORT_SYSRQ)
 338         unsigned long           sysrq;                  /* sysrq timeout */
 339 #endif
 340
 341         upf_t                   flags;
 342
 343 #define UPF_FOURPORT            ((__force upf_t) (1 << 1))
 344 #define UPF_SAK                 ((__force upf_t) (1 << 2))
 345 #define UPF_SPD_MASK            ((__force upf_t) (0x1030))
 346 #define UPF_SPD_HI              ((__force upf_t) (0x0010))
 347 #define UPF_SPD_VHI             ((__force upf_t) (0x0020))
 348 #define UPF_SPD_CUST            ((__force upf_t) (0x0030))
 349 #define UPF_SPD_SHI             ((__force upf_t) (0x1000))
 350 #define UPF_SPD_WARP            ((__force upf_t) (0x1010))
 351 #define UPF_SKIP_TEST           ((__force upf_t) (1 << 6))
 352 #define UPF_AUTO_IRQ            ((__force upf_t) (1 << 7))
 353 #define UPF_HARDPPS_CD          ((__force upf_t) (1 << 11))
 354 #define UPF_LOW_LATENCY         ((__force upf_t) (1 << 13))
 355 #define UPF_BUGGY_UART          ((__force upf_t) (1 << 14))
 356 #define UPF_NO_TXEN_TEST        ((__force upf_t) (1 << 15))
 357 #define UPF_MAGIC_MULTIPLIER    ((__force upf_t) (1 << 16))
 358 #define UPF_CONS_FLOW           ((__force upf_t) (1 << 23))
 359 #define UPF_SHARE_IRQ           ((__force upf_t) (1 << 24))
 360 #define UPF_EXAR_EFR            ((__force upf_t) (1 << 25))
 361 #define UPF_BUG_THRE            ((__force upf_t) (1 << 26))
 362 /* The exact UART type is known and should not be probed.  */
 363 #define UPF_FIXED_TYPE          ((__force upf_t) (1 << 27))
 364 #define UPF_BOOT_AUTOCONF       ((__force upf_t) (1 << 28))
 365 #define UPF_FIXED_PORT          ((__force upf_t) (1 << 29))
 366 #define UPF_DEAD                ((__force upf_t) (1 << 30))
 367 #define UPF_IOREMAP             ((__force upf_t) (1 << 31))
 368
 369 #define UPF_CHANGE_MASK         ((__force upf_t) (0x17fff))
 370 #define UPF_USR_MASK            ((__force upf_t) (UPF_SPD_MASK|UPF_LOW_LATENCY))
 371
 372         unsigned int            mctrl;                  /* current modem ctrl settings */
 373         unsigned int            timeout;                /* character-based timeout */
 374         unsigned int            type;                   /* port type */
 375         const struct uart_ops   *ops;
 376         unsigned int            custom_divisor;
 377         unsigned int            line;                   /* port index */
 378         resource_size_t         mapbase;                /* for ioremap */
 379         struct device           *dev;                   /* parent device */
 380         unsigned char           hub6;                   /* this should be in the 8250 driver */
 381         unsigned char           suspended;
 382         unsigned char           irq_wake;
 383         unsigned char           unused[2];
 384         void                    *private_data;          /* generic platform data pointer */
 385 };
 386
 387 static inline int serial_port_in(struct uart_port *up, int offset)
 388 {
 389         return up->serial_in(up, offset);
 390 }
 391
 392 static inline void serial_port_out(struct uart_port *up, int offset, int value)
 393 {
 394         up->serial_out(up, offset, value);
 395 }
 396
 397 /*
 398  * This is the state information which is persistent across opens.
 399  */
 400 struct uart_state {
 401         struct tty_port         port;
 402
 403         int                     pm_state;
 404         struct circ_buf         xmit;
 405
 406         struct uart_port        *uart_port;
 407 };
 408
 409 #define UART_XMIT_SIZE  PAGE_SIZE
 410
 411
 412 /* number of characters left in xmit buffer before we ask for more */
 413 #define WAKEUP_CHARS            256
 414
 415 struct module;
 416 struct tty_driver;
 417
 418 struct uart_driver {
 419         struct module           *owner;
 420         const char              *driver_name;
 421         const char              *dev_name;
 422         int                      major;
 423         int                      minor;
 424         int                      nr;
 425         struct console          *cons;
 426
 427         /*
 428          * these are private; the low level driver should not
 429          * touch these; they should be initialised to NULL
 430          */
 431         struct uart_state       *state;
 432         struct tty_driver       *tty_driver;
 433 };
 434
 435 void uart_write_wakeup(struct uart_port *port);
 436
 437 /*
 438  * Baud rate helpers.
 439  */
 440 void uart_update_timeout(struct uart_port *port, unsigned int cflag,
 441                          unsigned int baud);
 442 unsigned int uart_get_baud_rate(struct uart_port *port, struct ktermios *termios,
 443                                 struct ktermios *old, unsigned int min,
 444                                 unsigned int max);
 445 unsigned int uart_get_divisor(struct uart_port *port, unsigned int baud);
 446
 447 /* Base timer interval for polling */
 448 static inline int uart_poll_timeout(struct uart_port *port)
 449 {
 450         int timeout = port->timeout;
 451
 452         return timeout > 6 ? (timeout / 2 - 2) : 1;
 453 }
 454
 455 /*
 456  * Console helpers.
 457  */
 458 struct uart_port *uart_get_console(struct uart_port *ports, int nr,
 459                                    struct console *c);
 460 void uart_parse_options(char *options, int *baud, int *parity, int *bits,
 461                         int *flow);
 462 int uart_set_options(struct uart_port *port, struct console *co, int baud,
 463                      int parity, int bits, int flow);
 464 struct tty_driver *uart_console_device(struct console *co, int *index);
 465 void uart_console_write(struct uart_port *port, const char *s,
 466                         unsigned int count,
 467                         void (*putchar)(struct uart_port *, int));
 468
 469 /*
 470  * Port/driver registration/removal
 471  */
 472 int uart_register_driver(struct uart_driver *uart);
 473 void uart_unregister_driver(struct uart_driver *uart);
 474 int uart_add_one_port(struct uart_driver *reg, struct uart_port *port);
 475 int uart_remove_one_port(struct uart_driver *reg, struct uart_port *port);
 476 int uart_match_port(struct uart_port *port1, struct uart_port *port2);
 477
 478 /*
 479  * Power Management
 480  */
 481 int uart_suspend_port(struct uart_driver *reg, struct uart_port *port);
 482 int uart_resume_port(struct uart_driver *reg, struct uart_port *port);
 483
 484 #define uart_circ_empty(circ)           ((circ)->head == (circ)->tail)
 485 #define uart_circ_clear(circ)           ((circ)->head = (circ)->tail = 0)
 486
 487 #define uart_circ_chars_pending(circ)   \
 488         (CIRC_CNT((circ)->head, (circ)->tail, UART_XMIT_SIZE))
 489
 490 #define uart_circ_chars_free(circ)      \
 491         (CIRC_SPACE((circ)->head, (circ)->tail, UART_XMIT_SIZE))
 492
 493 static inline int uart_tx_stopped(struct uart_port *port)
 494 {
 495         struct tty_struct *tty = port->state->port.tty;
 496         if(tty->stopped || tty->hw_stopped)
 497                 return 1;
 498         return 0;
 499 }
 500
 501 /*
 502  * The following are helper functions for the low level drivers.
 503  */
 504
 505 extern void uart_handle_dcd_change(struct uart_port *uport,
 506                 unsigned int status);
 507 extern void uart_handle_cts_change(struct uart_port *uport,
 508                 unsigned int status);
 509
 510 extern void uart_insert_char(struct uart_port *port, unsigned int status,
 511                  unsigned int overrun, unsigned int ch, unsigned int flag);
 512
 513 #ifdef SUPPORT_SYSRQ
 514 static inline int
 515 uart_handle_sysrq_char(struct uart_port *port, unsigned int ch)
 516 {
 517         if (port->sysrq) {
 518                 if (ch && time_before(jiffies, port->sysrq)) {
 519                         handle_sysrq(ch);
 520                         port->sysrq = 0;
 521                         return 1;
 522                 }
 523                 port->sysrq = 0;
 524         }
 525         return 0;
 526 }
 527 #else
 528 #define uart_handle_sysrq_char(port,ch) ({ (void)port; 0; })
 529 #endif
 530
 531 /*
 532  * We do the SysRQ and SAK checking like this...
 533  */
 534 static inline int uart_handle_break(struct uart_port *port)
 535 {
 536         struct uart_state *state = port->state;
 537
 538         if (port->handle_break)
 539                 port->handle_break(port);
 540
 541 #ifdef SUPPORT_SYSRQ
 542         if (port->cons && port->cons->index == port->line) {
 543                 if (!port->sysrq) {
 544                         port->sysrq = jiffies + HZ*5;
 545                         return 1;
 546                 }
 547                 port->sysrq = 0;
 548         }
 549 #endif
 550         if (port->flags & UPF_SAK)
 551                 do_SAK(state->port.tty);
 552         return 0;
 553 }
 554
 555 /*
 556  *      UART_ENABLE_MS - determine if port should enable modem status irqs
 557  */
 558 #define UART_ENABLE_MS(port,cflag)      ((port)->flags & UPF_HARDPPS_CD || \
 559                                          (cflag) & CRTSCTS || \
 560                                          !((cflag) & CLOCAL))
 561
 562 #endif
 563
 564 #endif /* LINUX_SERIAL_CORE_H */