2 * Copyright (C) 2005 David Brownell
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
18 #include <linux/device.h>
19 #include <linux/mod_devicetable.h>
20 #include <linux/slab.h>
21 #include <linux/kthread.h>
22 #include <linux/completion.h>
23 #include <linux/scatterlist.h>
26 struct property_entry
;
29 struct spi_flash_read_message
;
32 * INTERFACES between SPI master-side drivers and SPI infrastructure.
33 * (There's no SPI slave support for Linux yet...)
35 extern struct bus_type spi_bus_type
;
38 * struct spi_statistics - statistics for spi transfers
39 * @lock: lock protecting this structure
41 * @messages: number of spi-messages handled
42 * @transfers: number of spi_transfers handled
43 * @errors: number of errors during spi_transfer
44 * @timedout: number of timeouts during spi_transfer
46 * @spi_sync: number of times spi_sync is used
47 * @spi_sync_immediate:
48 * number of times spi_sync is executed immediately
49 * in calling context without queuing and scheduling
50 * @spi_async: number of times spi_async is used
52 * @bytes: number of bytes transferred to/from device
53 * @bytes_tx: number of bytes sent to device
54 * @bytes_rx: number of bytes received from device
56 * @transfer_bytes_histo:
57 * transfer bytes histogramm
59 * @transfers_split_maxsize:
60 * number of transfers that have been split because of
63 struct spi_statistics
{
64 spinlock_t lock
; /* lock for the whole structure */
66 unsigned long messages
;
67 unsigned long transfers
;
69 unsigned long timedout
;
71 unsigned long spi_sync
;
72 unsigned long spi_sync_immediate
;
73 unsigned long spi_async
;
75 unsigned long long bytes
;
76 unsigned long long bytes_rx
;
77 unsigned long long bytes_tx
;
79 #define SPI_STATISTICS_HISTO_SIZE 17
80 unsigned long transfer_bytes_histo
[SPI_STATISTICS_HISTO_SIZE
];
82 unsigned long transfers_split_maxsize
;
85 void spi_statistics_add_transfer_stats(struct spi_statistics
*stats
,
86 struct spi_transfer
*xfer
,
87 struct spi_master
*master
);
89 #define SPI_STATISTICS_ADD_TO_FIELD(stats, field, count) \
91 unsigned long flags; \
92 spin_lock_irqsave(&(stats)->lock, flags); \
93 (stats)->field += count; \
94 spin_unlock_irqrestore(&(stats)->lock, flags); \
97 #define SPI_STATISTICS_INCREMENT_FIELD(stats, field) \
98 SPI_STATISTICS_ADD_TO_FIELD(stats, field, 1)
101 * struct spi_device - Master side proxy for an SPI slave device
102 * @dev: Driver model representation of the device.
103 * @master: SPI controller used with the device.
104 * @max_speed_hz: Maximum clock rate to be used with this chip
105 * (on this board); may be changed by the device's driver.
106 * The spi_transfer.speed_hz can override this for each transfer.
107 * @chip_select: Chipselect, distinguishing chips handled by @master.
108 * @mode: The spi mode defines how data is clocked out and in.
109 * This may be changed by the device's driver.
110 * The "active low" default for chipselect mode can be overridden
111 * (by specifying SPI_CS_HIGH) as can the "MSB first" default for
112 * each word in a transfer (by specifying SPI_LSB_FIRST).
113 * @bits_per_word: Data transfers involve one or more words; word sizes
114 * like eight or 12 bits are common. In-memory wordsizes are
115 * powers of two bytes (e.g. 20 bit samples use 32 bits).
116 * This may be changed by the device's driver, or left at the
117 * default (0) indicating protocol words are eight bit bytes.
118 * The spi_transfer.bits_per_word can override this for each transfer.
119 * @irq: Negative, or the number passed to request_irq() to receive
120 * interrupts from this device.
121 * @controller_state: Controller's runtime state
122 * @controller_data: Board-specific definitions for controller, such as
123 * FIFO initialization parameters; from board_info.controller_data
124 * @modalias: Name of the driver to use with this device, or an alias
125 * for that name. This appears in the sysfs "modalias" attribute
126 * for driver coldplugging, and in uevents used for hotplugging
127 * @cs_gpio: gpio number of the chipselect line (optional, -ENOENT when
128 * when not using a GPIO line)
130 * @statistics: statistics for the spi_device
132 * A @spi_device is used to interchange data between an SPI slave
133 * (usually a discrete chip) and CPU memory.
135 * In @dev, the platform_data is used to hold information about this
136 * device that's meaningful to the device's protocol driver, but not
137 * to its controller. One example might be an identifier for a chip
138 * variant with slightly different functionality; another might be
139 * information about how this particular board wires the chip's pins.
143 struct spi_master
*master
;
148 #define SPI_CPHA 0x01 /* clock phase */
149 #define SPI_CPOL 0x02 /* clock polarity */
150 #define SPI_MODE_0 (0|0) /* (original MicroWire) */
151 #define SPI_MODE_1 (0|SPI_CPHA)
152 #define SPI_MODE_2 (SPI_CPOL|0)
153 #define SPI_MODE_3 (SPI_CPOL|SPI_CPHA)
154 #define SPI_CS_HIGH 0x04 /* chipselect active high? */
155 #define SPI_LSB_FIRST 0x08 /* per-word bits-on-wire */
156 #define SPI_3WIRE 0x10 /* SI/SO signals shared */
157 #define SPI_LOOP 0x20 /* loopback mode */
158 #define SPI_NO_CS 0x40 /* 1 dev/bus, no chipselect */
159 #define SPI_READY 0x80 /* slave pulls low to pause */
160 #define SPI_TX_DUAL 0x100 /* transmit with 2 wires */
161 #define SPI_TX_QUAD 0x200 /* transmit with 4 wires */
162 #define SPI_RX_DUAL 0x400 /* receive with 2 wires */
163 #define SPI_RX_QUAD 0x800 /* receive with 4 wires */
165 void *controller_state
;
166 void *controller_data
;
167 char modalias
[SPI_NAME_SIZE
];
168 int cs_gpio
; /* chip select gpio */
171 struct spi_statistics statistics
;
174 * likely need more hooks for more protocol options affecting how
175 * the controller talks to each chip, like:
176 * - memory packing (12 bit samples into low bits, others zeroed)
178 * - drop chipselect after each word
179 * - chipselect delays
184 static inline struct spi_device
*to_spi_device(struct device
*dev
)
186 return dev
? container_of(dev
, struct spi_device
, dev
) : NULL
;
189 /* most drivers won't need to care about device refcounting */
190 static inline struct spi_device
*spi_dev_get(struct spi_device
*spi
)
192 return (spi
&& get_device(&spi
->dev
)) ? spi
: NULL
;
195 static inline void spi_dev_put(struct spi_device
*spi
)
198 put_device(&spi
->dev
);
201 /* ctldata is for the bus_master driver's runtime state */
202 static inline void *spi_get_ctldata(struct spi_device
*spi
)
204 return spi
->controller_state
;
207 static inline void spi_set_ctldata(struct spi_device
*spi
, void *state
)
209 spi
->controller_state
= state
;
212 /* device driver data */
214 static inline void spi_set_drvdata(struct spi_device
*spi
, void *data
)
216 dev_set_drvdata(&spi
->dev
, data
);
219 static inline void *spi_get_drvdata(struct spi_device
*spi
)
221 return dev_get_drvdata(&spi
->dev
);
228 * struct spi_driver - Host side "protocol" driver
229 * @id_table: List of SPI devices supported by this driver
230 * @probe: Binds this driver to the spi device. Drivers can verify
231 * that the device is actually present, and may need to configure
232 * characteristics (such as bits_per_word) which weren't needed for
233 * the initial configuration done during system setup.
234 * @remove: Unbinds this driver from the spi device
235 * @shutdown: Standard shutdown callback used during system state
236 * transitions such as powerdown/halt and kexec
237 * @driver: SPI device drivers should initialize the name and owner
238 * field of this structure.
240 * This represents the kind of device driver that uses SPI messages to
241 * interact with the hardware at the other end of a SPI link. It's called
242 * a "protocol" driver because it works through messages rather than talking
243 * directly to SPI hardware (which is what the underlying SPI controller
244 * driver does to pass those messages). These protocols are defined in the
245 * specification for the device(s) supported by the driver.
247 * As a rule, those device protocols represent the lowest level interface
248 * supported by a driver, and it will support upper level interfaces too.
249 * Examples of such upper levels include frameworks like MTD, networking,
250 * MMC, RTC, filesystem character device nodes, and hardware monitoring.
253 const struct spi_device_id
*id_table
;
254 int (*probe
)(struct spi_device
*spi
);
255 int (*remove
)(struct spi_device
*spi
);
256 void (*shutdown
)(struct spi_device
*spi
);
257 struct device_driver driver
;
260 static inline struct spi_driver
*to_spi_driver(struct device_driver
*drv
)
262 return drv
? container_of(drv
, struct spi_driver
, driver
) : NULL
;
265 extern int __spi_register_driver(struct module
*owner
, struct spi_driver
*sdrv
);
268 * spi_unregister_driver - reverse effect of spi_register_driver
269 * @sdrv: the driver to unregister
272 static inline void spi_unregister_driver(struct spi_driver
*sdrv
)
275 driver_unregister(&sdrv
->driver
);
278 /* use a define to avoid include chaining to get THIS_MODULE */
279 #define spi_register_driver(driver) \
280 __spi_register_driver(THIS_MODULE, driver)
283 * module_spi_driver() - Helper macro for registering a SPI driver
284 * @__spi_driver: spi_driver struct
286 * Helper macro for SPI drivers which do not do anything special in module
287 * init/exit. This eliminates a lot of boilerplate. Each module may only
288 * use this macro once, and calling it replaces module_init() and module_exit()
290 #define module_spi_driver(__spi_driver) \
291 module_driver(__spi_driver, spi_register_driver, \
292 spi_unregister_driver)
295 * struct spi_master - interface to SPI master controller
296 * @dev: device interface to this driver
297 * @list: link with the global spi_master list
298 * @bus_num: board-specific (and often SOC-specific) identifier for a
299 * given SPI controller.
300 * @num_chipselect: chipselects are used to distinguish individual
301 * SPI slaves, and are numbered from zero to num_chipselects.
302 * each slave has a chipselect signal, but it's common that not
303 * every chipselect is connected to a slave.
304 * @dma_alignment: SPI controller constraint on DMA buffers alignment.
305 * @mode_bits: flags understood by this controller driver
306 * @bits_per_word_mask: A mask indicating which values of bits_per_word are
307 * supported by the driver. Bit n indicates that a bits_per_word n+1 is
308 * supported. If set, the SPI core will reject any transfer with an
309 * unsupported bits_per_word. If not set, this value is simply ignored,
310 * and it's up to the individual driver to perform any validation.
311 * @min_speed_hz: Lowest supported transfer speed
312 * @max_speed_hz: Highest supported transfer speed
313 * @flags: other constraints relevant to this driver
314 * @max_transfer_size: function that returns the max transfer size for
315 * a &spi_device; may be %NULL, so the default %SIZE_MAX will be used.
316 * @max_message_size: function that returns the max message size for
317 * a &spi_device; may be %NULL, so the default %SIZE_MAX will be used.
318 * @io_mutex: mutex for physical bus access
319 * @bus_lock_spinlock: spinlock for SPI bus locking
320 * @bus_lock_mutex: mutex for exclusion of multiple callers
321 * @bus_lock_flag: indicates that the SPI bus is locked for exclusive use
322 * @setup: updates the device mode and clocking records used by a
323 * device's SPI controller; protocol code may call this. This
324 * must fail if an unrecognized or unsupported mode is requested.
325 * It's always safe to call this unless transfers are pending on
326 * the device whose settings are being modified.
327 * @transfer: adds a message to the controller's transfer queue.
328 * @cleanup: frees controller-specific state
329 * @can_dma: determine whether this master supports DMA
330 * @queued: whether this master is providing an internal message queue
331 * @kworker: thread struct for message pump
332 * @kworker_task: pointer to task for message pump kworker thread
333 * @pump_messages: work struct for scheduling work to the message pump
334 * @queue_lock: spinlock to syncronise access to message queue
335 * @queue: message queue
336 * @idling: the device is entering idle state
337 * @cur_msg: the currently in-flight message
338 * @cur_msg_prepared: spi_prepare_message was called for the currently
340 * @cur_msg_mapped: message has been mapped for DMA
341 * @xfer_completion: used by core transfer_one_message()
342 * @busy: message pump is busy
343 * @running: message pump is running
344 * @rt: whether this queue is set to run as a realtime task
345 * @auto_runtime_pm: the core should ensure a runtime PM reference is held
346 * while the hardware is prepared, using the parent
347 * device for the spidev
348 * @max_dma_len: Maximum length of a DMA transfer for the device.
349 * @prepare_transfer_hardware: a message will soon arrive from the queue
350 * so the subsystem requests the driver to prepare the transfer hardware
351 * by issuing this call
352 * @transfer_one_message: the subsystem calls the driver to transfer a single
353 * message while queuing transfers that arrive in the meantime. When the
354 * driver is finished with this message, it must call
355 * spi_finalize_current_message() so the subsystem can issue the next
357 * @unprepare_transfer_hardware: there are currently no more messages on the
358 * queue so the subsystem notifies the driver that it may relax the
359 * hardware by issuing this call
360 * @set_cs: set the logic level of the chip select line. May be called
361 * from interrupt context.
362 * @prepare_message: set up the controller to transfer a single message,
363 * for example doing DMA mapping. Called from threaded
365 * @transfer_one: transfer a single spi_transfer.
366 * - return 0 if the transfer is finished,
367 * - return 1 if the transfer is still in progress. When
368 * the driver is finished with this transfer it must
369 * call spi_finalize_current_transfer() so the subsystem
370 * can issue the next transfer. Note: transfer_one and
371 * transfer_one_message are mutually exclusive; when both
372 * are set, the generic subsystem does not call your
373 * transfer_one callback.
374 * @handle_err: the subsystem calls the driver to handle an error that occurs
375 * in the generic implementation of transfer_one_message().
376 * @unprepare_message: undo any work done by prepare_message().
377 * @spi_flash_read: to support spi-controller hardwares that provide
378 * accelerated interface to read from flash devices.
379 * @flash_read_supported: spi device supports flash read
380 * @cs_gpios: Array of GPIOs to use as chip select lines; one per CS
381 * number. Any individual value may be -ENOENT for CS lines that
382 * are not GPIOs (driven by the SPI controller itself).
383 * @statistics: statistics for the spi_master
384 * @dma_tx: DMA transmit channel
385 * @dma_rx: DMA receive channel
386 * @dummy_rx: dummy receive buffer for full-duplex devices
387 * @dummy_tx: dummy transmit buffer for full-duplex devices
388 * @fw_translate_cs: If the boot firmware uses different numbering scheme
389 * what Linux expects, this optional hook can be used to translate
392 * Each SPI master controller can communicate with one or more @spi_device
393 * children. These make a small bus, sharing MOSI, MISO and SCK signals
394 * but not chip select signals. Each device may be configured to use a
395 * different clock rate, since those shared signals are ignored unless
396 * the chip is selected.
398 * The driver for an SPI controller manages access to those devices through
399 * a queue of spi_message transactions, copying data between CPU memory and
400 * an SPI slave device. For each such message it queues, it calls the
401 * message's completion function when the transaction completes.
406 struct list_head list
;
408 /* other than negative (== assign one dynamically), bus_num is fully
409 * board-specific. usually that simplifies to being SOC-specific.
410 * example: one SOC has three SPI controllers, numbered 0..2,
411 * and one board's schematics might show it using SPI-2. software
412 * would normally use bus_num=2 for that controller.
416 /* chipselects will be integral to many controllers; some others
417 * might use board-specific GPIOs.
421 /* some SPI controllers pose alignment requirements on DMAable
422 * buffers; let protocol drivers know about these requirements.
426 /* spi_device.mode flags understood by this controller driver */
429 /* bitmask of supported bits_per_word for transfers */
430 u32 bits_per_word_mask
;
431 #define SPI_BPW_MASK(bits) BIT((bits) - 1)
432 #define SPI_BIT_MASK(bits) (((bits) == 32) ? ~0U : (BIT(bits) - 1))
433 #define SPI_BPW_RANGE_MASK(min, max) (SPI_BIT_MASK(max) - SPI_BIT_MASK(min - 1))
435 /* limits on transfer speed */
439 /* other constraints relevant to this driver */
441 #define SPI_MASTER_HALF_DUPLEX BIT(0) /* can't do full duplex */
442 #define SPI_MASTER_NO_RX BIT(1) /* can't do buffer read */
443 #define SPI_MASTER_NO_TX BIT(2) /* can't do buffer write */
444 #define SPI_MASTER_MUST_RX BIT(3) /* requires rx */
445 #define SPI_MASTER_MUST_TX BIT(4) /* requires tx */
446 #define SPI_MASTER_GPIO_SS BIT(5) /* GPIO CS must select slave */
449 * on some hardware transfer / message size may be constrained
450 * the limit may depend on device transfer settings
452 size_t (*max_transfer_size
)(struct spi_device
*spi
);
453 size_t (*max_message_size
)(struct spi_device
*spi
);
456 struct mutex io_mutex
;
458 /* lock and mutex for SPI bus locking */
459 spinlock_t bus_lock_spinlock
;
460 struct mutex bus_lock_mutex
;
462 /* flag indicating that the SPI bus is locked for exclusive use */
465 /* Setup mode and clock, etc (spi driver may call many times).
467 * IMPORTANT: this may be called when transfers to another
468 * device are active. DO NOT UPDATE SHARED REGISTERS in ways
469 * which could break those transfers.
471 int (*setup
)(struct spi_device
*spi
);
473 /* bidirectional bulk transfers
475 * + The transfer() method may not sleep; its main role is
476 * just to add the message to the queue.
477 * + For now there's no remove-from-queue operation, or
478 * any other request management
479 * + To a given spi_device, message queueing is pure fifo
481 * + The master's main job is to process its message queue,
482 * selecting a chip then transferring data
483 * + If there are multiple spi_device children, the i/o queue
484 * arbitration algorithm is unspecified (round robin, fifo,
485 * priority, reservations, preemption, etc)
487 * + Chipselect stays active during the entire message
488 * (unless modified by spi_transfer.cs_change != 0).
489 * + The message transfers use clock and SPI mode parameters
490 * previously established by setup() for this device
492 int (*transfer
)(struct spi_device
*spi
,
493 struct spi_message
*mesg
);
495 /* called on release() to free memory provided by spi_master */
496 void (*cleanup
)(struct spi_device
*spi
);
499 * Used to enable core support for DMA handling, if can_dma()
500 * exists and returns true then the transfer will be mapped
501 * prior to transfer_one() being called. The driver should
502 * not modify or store xfer and dma_tx and dma_rx must be set
503 * while the device is prepared.
505 bool (*can_dma
)(struct spi_master
*master
,
506 struct spi_device
*spi
,
507 struct spi_transfer
*xfer
);
510 * These hooks are for drivers that want to use the generic
511 * master transfer queueing mechanism. If these are used, the
512 * transfer() function above must NOT be specified by the driver.
513 * Over time we expect SPI drivers to be phased over to this API.
516 struct kthread_worker kworker
;
517 struct task_struct
*kworker_task
;
518 struct kthread_work pump_messages
;
519 spinlock_t queue_lock
;
520 struct list_head queue
;
521 struct spi_message
*cur_msg
;
526 bool auto_runtime_pm
;
527 bool cur_msg_prepared
;
529 struct completion xfer_completion
;
532 int (*prepare_transfer_hardware
)(struct spi_master
*master
);
533 int (*transfer_one_message
)(struct spi_master
*master
,
534 struct spi_message
*mesg
);
535 int (*unprepare_transfer_hardware
)(struct spi_master
*master
);
536 int (*prepare_message
)(struct spi_master
*master
,
537 struct spi_message
*message
);
538 int (*unprepare_message
)(struct spi_master
*master
,
539 struct spi_message
*message
);
540 int (*spi_flash_read
)(struct spi_device
*spi
,
541 struct spi_flash_read_message
*msg
);
542 bool (*flash_read_supported
)(struct spi_device
*spi
);
545 * These hooks are for drivers that use a generic implementation
546 * of transfer_one_message() provied by the core.
548 void (*set_cs
)(struct spi_device
*spi
, bool enable
);
549 int (*transfer_one
)(struct spi_master
*master
, struct spi_device
*spi
,
550 struct spi_transfer
*transfer
);
551 void (*handle_err
)(struct spi_master
*master
,
552 struct spi_message
*message
);
554 /* gpio chip select */
558 struct spi_statistics statistics
;
560 /* DMA channels for use with core dmaengine helpers */
561 struct dma_chan
*dma_tx
;
562 struct dma_chan
*dma_rx
;
564 /* dummy data for full duplex devices */
568 int (*fw_translate_cs
)(struct spi_master
*master
, unsigned cs
);
571 static inline void *spi_master_get_devdata(struct spi_master
*master
)
573 return dev_get_drvdata(&master
->dev
);
576 static inline void spi_master_set_devdata(struct spi_master
*master
, void *data
)
578 dev_set_drvdata(&master
->dev
, data
);
581 static inline struct spi_master
*spi_master_get(struct spi_master
*master
)
583 if (!master
|| !get_device(&master
->dev
))
588 static inline void spi_master_put(struct spi_master
*master
)
591 put_device(&master
->dev
);
594 /* PM calls that need to be issued by the driver */
595 extern int spi_master_suspend(struct spi_master
*master
);
596 extern int spi_master_resume(struct spi_master
*master
);
598 /* Calls the driver make to interact with the message queue */
599 extern struct spi_message
*spi_get_next_queued_message(struct spi_master
*master
);
600 extern void spi_finalize_current_message(struct spi_master
*master
);
601 extern void spi_finalize_current_transfer(struct spi_master
*master
);
603 /* the spi driver core manages memory for the spi_master classdev */
604 extern struct spi_master
*
605 spi_alloc_master(struct device
*host
, unsigned size
);
607 extern int spi_register_master(struct spi_master
*master
);
608 extern int devm_spi_register_master(struct device
*dev
,
609 struct spi_master
*master
);
610 extern void spi_unregister_master(struct spi_master
*master
);
612 extern struct spi_master
*spi_busnum_to_master(u16 busnum
);
615 * SPI resource management while processing a SPI message
618 typedef void (*spi_res_release_t
)(struct spi_master
*master
,
619 struct spi_message
*msg
,
623 * struct spi_res - spi resource management structure
625 * @release: release code called prior to freeing this resource
626 * @data: extra data allocated for the specific use-case
628 * this is based on ideas from devres, but focused on life-cycle
629 * management during spi_message processing
632 struct list_head entry
;
633 spi_res_release_t release
;
634 unsigned long long data
[]; /* guarantee ull alignment */
637 extern void *spi_res_alloc(struct spi_device
*spi
,
638 spi_res_release_t release
,
639 size_t size
, gfp_t gfp
);
640 extern void spi_res_add(struct spi_message
*message
, void *res
);
641 extern void spi_res_free(void *res
);
643 extern void spi_res_release(struct spi_master
*master
,
644 struct spi_message
*message
);
646 /*---------------------------------------------------------------------------*/
649 * I/O INTERFACE between SPI controller and protocol drivers
651 * Protocol drivers use a queue of spi_messages, each transferring data
652 * between the controller and memory buffers.
654 * The spi_messages themselves consist of a series of read+write transfer
655 * segments. Those segments always read the same number of bits as they
656 * write; but one or the other is easily ignored by passing a null buffer
657 * pointer. (This is unlike most types of I/O API, because SPI hardware
660 * NOTE: Allocation of spi_transfer and spi_message memory is entirely
661 * up to the protocol driver, which guarantees the integrity of both (as
662 * well as the data buffers) for as long as the message is queued.
666 * struct spi_transfer - a read/write buffer pair
667 * @tx_buf: data to be written (dma-safe memory), or NULL
668 * @rx_buf: data to be read (dma-safe memory), or NULL
669 * @tx_dma: DMA address of tx_buf, if @spi_message.is_dma_mapped
670 * @rx_dma: DMA address of rx_buf, if @spi_message.is_dma_mapped
671 * @tx_nbits: number of bits used for writing. If 0 the default
672 * (SPI_NBITS_SINGLE) is used.
673 * @rx_nbits: number of bits used for reading. If 0 the default
674 * (SPI_NBITS_SINGLE) is used.
675 * @len: size of rx and tx buffers (in bytes)
676 * @speed_hz: Select a speed other than the device default for this
677 * transfer. If 0 the default (from @spi_device) is used.
678 * @bits_per_word: select a bits_per_word other than the device default
679 * for this transfer. If 0 the default (from @spi_device) is used.
680 * @cs_change: affects chipselect after this transfer completes
681 * @delay_usecs: microseconds to delay after this transfer before
682 * (optionally) changing the chipselect status, then starting
683 * the next transfer or completing this @spi_message.
684 * @transfer_list: transfers are sequenced through @spi_message.transfers
685 * @tx_sg: Scatterlist for transmit, currently not for client use
686 * @rx_sg: Scatterlist for receive, currently not for client use
688 * SPI transfers always write the same number of bytes as they read.
689 * Protocol drivers should always provide @rx_buf and/or @tx_buf.
690 * In some cases, they may also want to provide DMA addresses for
691 * the data being transferred; that may reduce overhead, when the
692 * underlying driver uses dma.
694 * If the transmit buffer is null, zeroes will be shifted out
695 * while filling @rx_buf. If the receive buffer is null, the data
696 * shifted in will be discarded. Only "len" bytes shift out (or in).
697 * It's an error to try to shift out a partial word. (For example, by
698 * shifting out three bytes with word size of sixteen or twenty bits;
699 * the former uses two bytes per word, the latter uses four bytes.)
701 * In-memory data values are always in native CPU byte order, translated
702 * from the wire byte order (big-endian except with SPI_LSB_FIRST). So
703 * for example when bits_per_word is sixteen, buffers are 2N bytes long
704 * (@len = 2N) and hold N sixteen bit words in CPU byte order.
706 * When the word size of the SPI transfer is not a power-of-two multiple
707 * of eight bits, those in-memory words include extra bits. In-memory
708 * words are always seen by protocol drivers as right-justified, so the
709 * undefined (rx) or unused (tx) bits are always the most significant bits.
711 * All SPI transfers start with the relevant chipselect active. Normally
712 * it stays selected until after the last transfer in a message. Drivers
713 * can affect the chipselect signal using cs_change.
715 * (i) If the transfer isn't the last one in the message, this flag is
716 * used to make the chipselect briefly go inactive in the middle of the
717 * message. Toggling chipselect in this way may be needed to terminate
718 * a chip command, letting a single spi_message perform all of group of
719 * chip transactions together.
721 * (ii) When the transfer is the last one in the message, the chip may
722 * stay selected until the next transfer. On multi-device SPI busses
723 * with nothing blocking messages going to other devices, this is just
724 * a performance hint; starting a message to another device deselects
725 * this one. But in other cases, this can be used to ensure correctness.
726 * Some devices need protocol transactions to be built from a series of
727 * spi_message submissions, where the content of one message is determined
728 * by the results of previous messages and where the whole transaction
729 * ends when the chipselect goes intactive.
731 * When SPI can transfer in 1x,2x or 4x. It can get this transfer information
732 * from device through @tx_nbits and @rx_nbits. In Bi-direction, these
733 * two should both be set. User can set transfer mode with SPI_NBITS_SINGLE(1x)
734 * SPI_NBITS_DUAL(2x) and SPI_NBITS_QUAD(4x) to support these three transfer.
736 * The code that submits an spi_message (and its spi_transfers)
737 * to the lower layers is responsible for managing its memory.
738 * Zero-initialize every field you don't set up explicitly, to
739 * insulate against future API updates. After you submit a message
740 * and its transfers, ignore them until its completion callback.
742 struct spi_transfer
{
743 /* it's ok if tx_buf == rx_buf (right?)
744 * for MicroWire, one buffer must be null
745 * buffers must work with dma_*map_single() calls, unless
746 * spi_message.is_dma_mapped reports a pre-existing mapping
754 struct sg_table tx_sg
;
755 struct sg_table rx_sg
;
757 unsigned cs_change
:1;
760 #define SPI_NBITS_SINGLE 0x01 /* 1bit transfer */
761 #define SPI_NBITS_DUAL 0x02 /* 2bits transfer */
762 #define SPI_NBITS_QUAD 0x04 /* 4bits transfer */
767 struct list_head transfer_list
;
771 * struct spi_message - one multi-segment SPI transaction
772 * @transfers: list of transfer segments in this transaction
773 * @spi: SPI device to which the transaction is queued
774 * @is_dma_mapped: if true, the caller provided both dma and cpu virtual
775 * addresses for each transfer buffer
776 * @complete: called to report transaction completions
777 * @context: the argument to complete() when it's called
778 * @frame_length: the total number of bytes in the message
779 * @actual_length: the total number of bytes that were transferred in all
780 * successful segments
781 * @status: zero for success, else negative errno
782 * @queue: for use by whichever driver currently owns the message
783 * @state: for use by whichever driver currently owns the message
784 * @resources: for resource management when the spi message is processed
786 * A @spi_message is used to execute an atomic sequence of data transfers,
787 * each represented by a struct spi_transfer. The sequence is "atomic"
788 * in the sense that no other spi_message may use that SPI bus until that
789 * sequence completes. On some systems, many such sequences can execute as
790 * as single programmed DMA transfer. On all systems, these messages are
791 * queued, and might complete after transactions to other devices. Messages
792 * sent to a given spi_device are always executed in FIFO order.
794 * The code that submits an spi_message (and its spi_transfers)
795 * to the lower layers is responsible for managing its memory.
796 * Zero-initialize every field you don't set up explicitly, to
797 * insulate against future API updates. After you submit a message
798 * and its transfers, ignore them until its completion callback.
801 struct list_head transfers
;
803 struct spi_device
*spi
;
805 unsigned is_dma_mapped
:1;
807 /* REVISIT: we might want a flag affecting the behavior of the
808 * last transfer ... allowing things like "read 16 bit length L"
809 * immediately followed by "read L bytes". Basically imposing
810 * a specific message scheduling algorithm.
812 * Some controller drivers (message-at-a-time queue processing)
813 * could provide that as their default scheduling algorithm. But
814 * others (with multi-message pipelines) could need a flag to
815 * tell them about such special cases.
818 /* completion is reported through a callback */
819 void (*complete
)(void *context
);
821 unsigned frame_length
;
822 unsigned actual_length
;
825 /* for optional use by whatever driver currently owns the
826 * spi_message ... between calls to spi_async and then later
827 * complete(), that's the spi_master controller driver.
829 struct list_head queue
;
832 /* list of spi_res reources when the spi message is processed */
833 struct list_head resources
;
836 static inline void spi_message_init_no_memset(struct spi_message
*m
)
838 INIT_LIST_HEAD(&m
->transfers
);
839 INIT_LIST_HEAD(&m
->resources
);
842 static inline void spi_message_init(struct spi_message
*m
)
844 memset(m
, 0, sizeof *m
);
845 spi_message_init_no_memset(m
);
849 spi_message_add_tail(struct spi_transfer
*t
, struct spi_message
*m
)
851 list_add_tail(&t
->transfer_list
, &m
->transfers
);
855 spi_transfer_del(struct spi_transfer
*t
)
857 list_del(&t
->transfer_list
);
861 * spi_message_init_with_transfers - Initialize spi_message and append transfers
862 * @m: spi_message to be initialized
863 * @xfers: An array of spi transfers
864 * @num_xfers: Number of items in the xfer array
866 * This function initializes the given spi_message and adds each spi_transfer in
867 * the given array to the message.
870 spi_message_init_with_transfers(struct spi_message
*m
,
871 struct spi_transfer
*xfers
, unsigned int num_xfers
)
876 for (i
= 0; i
< num_xfers
; ++i
)
877 spi_message_add_tail(&xfers
[i
], m
);
880 /* It's fine to embed message and transaction structures in other data
881 * structures so long as you don't free them while they're in use.
884 static inline struct spi_message
*spi_message_alloc(unsigned ntrans
, gfp_t flags
)
886 struct spi_message
*m
;
888 m
= kzalloc(sizeof(struct spi_message
)
889 + ntrans
* sizeof(struct spi_transfer
),
893 struct spi_transfer
*t
= (struct spi_transfer
*)(m
+ 1);
895 spi_message_init_no_memset(m
);
896 for (i
= 0; i
< ntrans
; i
++, t
++)
897 spi_message_add_tail(t
, m
);
902 static inline void spi_message_free(struct spi_message
*m
)
907 extern int spi_setup(struct spi_device
*spi
);
908 extern int spi_async(struct spi_device
*spi
, struct spi_message
*message
);
909 extern int spi_async_locked(struct spi_device
*spi
,
910 struct spi_message
*message
);
913 spi_max_message_size(struct spi_device
*spi
)
915 struct spi_master
*master
= spi
->master
;
916 if (!master
->max_message_size
)
918 return master
->max_message_size(spi
);
922 spi_max_transfer_size(struct spi_device
*spi
)
924 struct spi_master
*master
= spi
->master
;
925 size_t tr_max
= SIZE_MAX
;
926 size_t msg_max
= spi_max_message_size(spi
);
928 if (master
->max_transfer_size
)
929 tr_max
= master
->max_transfer_size(spi
);
931 /* transfer size limit must not be greater than messsage size limit */
932 return min(tr_max
, msg_max
);
935 /*---------------------------------------------------------------------------*/
937 /* SPI transfer replacement methods which make use of spi_res */
939 struct spi_replaced_transfers
;
940 typedef void (*spi_replaced_release_t
)(struct spi_master
*master
,
941 struct spi_message
*msg
,
942 struct spi_replaced_transfers
*res
);
944 * struct spi_replaced_transfers - structure describing the spi_transfer
945 * replacements that have occurred
946 * so that they can get reverted
947 * @release: some extra release code to get executed prior to
948 * relasing this structure
949 * @extradata: pointer to some extra data if requested or NULL
950 * @replaced_transfers: transfers that have been replaced and which need
952 * @replaced_after: the transfer after which the @replaced_transfers
953 * are to get re-inserted
954 * @inserted: number of transfers inserted
955 * @inserted_transfers: array of spi_transfers of array-size @inserted,
956 * that have been replacing replaced_transfers
958 * note: that @extradata will point to @inserted_transfers[@inserted]
959 * if some extra allocation is requested, so alignment will be the same
960 * as for spi_transfers
962 struct spi_replaced_transfers
{
963 spi_replaced_release_t release
;
965 struct list_head replaced_transfers
;
966 struct list_head
*replaced_after
;
968 struct spi_transfer inserted_transfers
[];
971 extern struct spi_replaced_transfers
*spi_replace_transfers(
972 struct spi_message
*msg
,
973 struct spi_transfer
*xfer_first
,
976 spi_replaced_release_t release
,
977 size_t extradatasize
,
980 /*---------------------------------------------------------------------------*/
982 /* SPI transfer transformation methods */
984 extern int spi_split_transfers_maxsize(struct spi_master
*master
,
985 struct spi_message
*msg
,
989 /*---------------------------------------------------------------------------*/
991 /* All these synchronous SPI transfer routines are utilities layered
992 * over the core async transfer primitive. Here, "synchronous" means
993 * they will sleep uninterruptibly until the async transfer completes.
996 extern int spi_sync(struct spi_device
*spi
, struct spi_message
*message
);
997 extern int spi_sync_locked(struct spi_device
*spi
, struct spi_message
*message
);
998 extern int spi_bus_lock(struct spi_master
*master
);
999 extern int spi_bus_unlock(struct spi_master
*master
);
1002 * spi_sync_transfer - synchronous SPI data transfer
1003 * @spi: device with which data will be exchanged
1004 * @xfers: An array of spi_transfers
1005 * @num_xfers: Number of items in the xfer array
1006 * Context: can sleep
1008 * Does a synchronous SPI data transfer of the given spi_transfer array.
1010 * For more specific semantics see spi_sync().
1012 * Return: Return: zero on success, else a negative error code.
1015 spi_sync_transfer(struct spi_device
*spi
, struct spi_transfer
*xfers
,
1016 unsigned int num_xfers
)
1018 struct spi_message msg
;
1020 spi_message_init_with_transfers(&msg
, xfers
, num_xfers
);
1022 return spi_sync(spi
, &msg
);
1026 * spi_write - SPI synchronous write
1027 * @spi: device to which data will be written
1029 * @len: data buffer size
1030 * Context: can sleep
1032 * This function writes the buffer @buf.
1033 * Callable only from contexts that can sleep.
1035 * Return: zero on success, else a negative error code.
1038 spi_write(struct spi_device
*spi
, const void *buf
, size_t len
)
1040 struct spi_transfer t
= {
1045 return spi_sync_transfer(spi
, &t
, 1);
1049 * spi_read - SPI synchronous read
1050 * @spi: device from which data will be read
1052 * @len: data buffer size
1053 * Context: can sleep
1055 * This function reads the buffer @buf.
1056 * Callable only from contexts that can sleep.
1058 * Return: zero on success, else a negative error code.
1061 spi_read(struct spi_device
*spi
, void *buf
, size_t len
)
1063 struct spi_transfer t
= {
1068 return spi_sync_transfer(spi
, &t
, 1);
1071 /* this copies txbuf and rxbuf data; for small transfers only! */
1072 extern int spi_write_then_read(struct spi_device
*spi
,
1073 const void *txbuf
, unsigned n_tx
,
1074 void *rxbuf
, unsigned n_rx
);
1077 * spi_w8r8 - SPI synchronous 8 bit write followed by 8 bit read
1078 * @spi: device with which data will be exchanged
1079 * @cmd: command to be written before data is read back
1080 * Context: can sleep
1082 * Callable only from contexts that can sleep.
1084 * Return: the (unsigned) eight bit number returned by the
1085 * device, or else a negative error code.
1087 static inline ssize_t
spi_w8r8(struct spi_device
*spi
, u8 cmd
)
1092 status
= spi_write_then_read(spi
, &cmd
, 1, &result
, 1);
1094 /* return negative errno or unsigned value */
1095 return (status
< 0) ? status
: result
;
1099 * spi_w8r16 - SPI synchronous 8 bit write followed by 16 bit read
1100 * @spi: device with which data will be exchanged
1101 * @cmd: command to be written before data is read back
1102 * Context: can sleep
1104 * The number is returned in wire-order, which is at least sometimes
1107 * Callable only from contexts that can sleep.
1109 * Return: the (unsigned) sixteen bit number returned by the
1110 * device, or else a negative error code.
1112 static inline ssize_t
spi_w8r16(struct spi_device
*spi
, u8 cmd
)
1117 status
= spi_write_then_read(spi
, &cmd
, 1, &result
, 2);
1119 /* return negative errno or unsigned value */
1120 return (status
< 0) ? status
: result
;
1124 * spi_w8r16be - SPI synchronous 8 bit write followed by 16 bit big-endian read
1125 * @spi: device with which data will be exchanged
1126 * @cmd: command to be written before data is read back
1127 * Context: can sleep
1129 * This function is similar to spi_w8r16, with the exception that it will
1130 * convert the read 16 bit data word from big-endian to native endianness.
1132 * Callable only from contexts that can sleep.
1134 * Return: the (unsigned) sixteen bit number returned by the device in cpu
1135 * endianness, or else a negative error code.
1137 static inline ssize_t
spi_w8r16be(struct spi_device
*spi
, u8 cmd
)
1143 status
= spi_write_then_read(spi
, &cmd
, 1, &result
, 2);
1147 return be16_to_cpu(result
);
1151 * struct spi_flash_read_message - flash specific information for
1152 * spi-masters that provide accelerated flash read interfaces
1153 * @buf: buffer to read data
1154 * @from: offset within the flash from where data is to be read
1155 * @len: length of data to be read
1156 * @retlen: actual length of data read
1157 * @read_opcode: read_opcode to be used to communicate with flash
1158 * @addr_width: number of address bytes
1159 * @dummy_bytes: number of dummy bytes
1160 * @opcode_nbits: number of lines to send opcode
1161 * @addr_nbits: number of lines to send address
1162 * @data_nbits: number of lines for data
1163 * @rx_sg: Scatterlist for receive data read from flash
1164 * @cur_msg_mapped: message has been mapped for DMA
1166 struct spi_flash_read_message
{
1177 struct sg_table rx_sg
;
1178 bool cur_msg_mapped
;
1181 /* SPI core interface for flash read support */
1182 static inline bool spi_flash_read_supported(struct spi_device
*spi
)
1184 return spi
->master
->spi_flash_read
&&
1185 (!spi
->master
->flash_read_supported
||
1186 spi
->master
->flash_read_supported(spi
));
1189 int spi_flash_read(struct spi_device
*spi
,
1190 struct spi_flash_read_message
*msg
);
1192 /*---------------------------------------------------------------------------*/
1195 * INTERFACE between board init code and SPI infrastructure.
1197 * No SPI driver ever sees these SPI device table segments, but
1198 * it's how the SPI core (or adapters that get hotplugged) grows
1199 * the driver model tree.
1201 * As a rule, SPI devices can't be probed. Instead, board init code
1202 * provides a table listing the devices which are present, with enough
1203 * information to bind and set up the device's driver. There's basic
1204 * support for nonstatic configurations too; enough to handle adding
1205 * parport adapters, or microcontrollers acting as USB-to-SPI bridges.
1209 * struct spi_board_info - board-specific template for a SPI device
1210 * @modalias: Initializes spi_device.modalias; identifies the driver.
1211 * @platform_data: Initializes spi_device.platform_data; the particular
1212 * data stored there is driver-specific.
1213 * @properties: Additional device properties for the device.
1214 * @controller_data: Initializes spi_device.controller_data; some
1215 * controllers need hints about hardware setup, e.g. for DMA.
1216 * @irq: Initializes spi_device.irq; depends on how the board is wired.
1217 * @max_speed_hz: Initializes spi_device.max_speed_hz; based on limits
1218 * from the chip datasheet and board-specific signal quality issues.
1219 * @bus_num: Identifies which spi_master parents the spi_device; unused
1220 * by spi_new_device(), and otherwise depends on board wiring.
1221 * @chip_select: Initializes spi_device.chip_select; depends on how
1222 * the board is wired.
1223 * @mode: Initializes spi_device.mode; based on the chip datasheet, board
1224 * wiring (some devices support both 3WIRE and standard modes), and
1225 * possibly presence of an inverter in the chipselect path.
1227 * When adding new SPI devices to the device tree, these structures serve
1228 * as a partial device template. They hold information which can't always
1229 * be determined by drivers. Information that probe() can establish (such
1230 * as the default transfer wordsize) is not included here.
1232 * These structures are used in two places. Their primary role is to
1233 * be stored in tables of board-specific device descriptors, which are
1234 * declared early in board initialization and then used (much later) to
1235 * populate a controller's device tree after the that controller's driver
1236 * initializes. A secondary (and atypical) role is as a parameter to
1237 * spi_new_device() call, which happens after those controller drivers
1238 * are active in some dynamic board configuration models.
1240 struct spi_board_info
{
1241 /* the device name and module name are coupled, like platform_bus;
1242 * "modalias" is normally the driver name.
1244 * platform_data goes to spi_device.dev.platform_data,
1245 * controller_data goes to spi_device.controller_data,
1246 * device properties are copied and attached to spi_device,
1249 char modalias
[SPI_NAME_SIZE
];
1250 const void *platform_data
;
1251 const struct property_entry
*properties
;
1252 void *controller_data
;
1255 /* slower signaling on noisy or low voltage boards */
1259 /* bus_num is board specific and matches the bus_num of some
1260 * spi_master that will probably be registered later.
1262 * chip_select reflects how this chip is wired to that master;
1263 * it's less than num_chipselect.
1268 /* mode becomes spi_device.mode, and is essential for chips
1269 * where the default of SPI_CS_HIGH = 0 is wrong.
1273 /* ... may need additional spi_device chip config data here.
1274 * avoid stuff protocol drivers can set; but include stuff
1275 * needed to behave without being bound to a driver:
1276 * - quirks like clock rate mattering when not selected
1282 spi_register_board_info(struct spi_board_info
const *info
, unsigned n
);
1284 /* board init code may ignore whether SPI is configured or not */
1286 spi_register_board_info(struct spi_board_info
const *info
, unsigned n
)
1291 /* If you're hotplugging an adapter with devices (parport, usb, etc)
1292 * use spi_new_device() to describe each device. You can also call
1293 * spi_unregister_device() to start making that device vanish, but
1294 * normally that would be handled by spi_unregister_master().
1296 * You can also use spi_alloc_device() and spi_add_device() to use a two
1297 * stage registration sequence for each spi_device. This gives the caller
1298 * some more control over the spi_device structure before it is registered,
1299 * but requires that caller to initialize fields that would otherwise
1300 * be defined using the board info.
1302 extern struct spi_device
*
1303 spi_alloc_device(struct spi_master
*master
);
1306 spi_add_device(struct spi_device
*spi
);
1308 extern struct spi_device
*
1309 spi_new_device(struct spi_master
*, struct spi_board_info
*);
1311 extern void spi_unregister_device(struct spi_device
*spi
);
1313 extern const struct spi_device_id
*
1314 spi_get_device_id(const struct spi_device
*sdev
);
1317 spi_transfer_is_last(struct spi_master
*master
, struct spi_transfer
*xfer
)
1319 return list_is_last(&xfer
->transfer_list
, &master
->cur_msg
->transfers
);
1322 #endif /* __LINUX_SPI_H */