include/linux/ssb/ssb.h

   1 #ifndef LINUX_SSB_H_
   2 #define LINUX_SSB_H_
   3
   4 #include <linux/device.h>
   5 #include <linux/list.h>
   6 #include <linux/types.h>
   7 #include <linux/spinlock.h>
   8 #include <linux/pci.h>
   9 #include <linux/mod_devicetable.h>
  10
  11 #include <linux/ssb/ssb_regs.h>
  12
  13
  14 struct pcmcia_device;
  15 struct ssb_bus;
  16 struct ssb_driver;
  17
  18 struct ssb_sprom {
  19         u8 revision;
  20         u8 il0mac[6];           /* MAC address for 802.11b/g */
  21         u8 et0mac[6];           /* MAC address for Ethernet */
  22         u8 et1mac[6];           /* MAC address for 802.11a */
  23         u8 et0phyaddr;          /* MII address for enet0 */
  24         u8 et1phyaddr;          /* MII address for enet1 */
  25         u8 et0mdcport;          /* MDIO for enet0 */
  26         u8 et1mdcport;          /* MDIO for enet1 */
  27         u8 board_rev;           /* Board revision number from SPROM. */
  28         u8 country_code;        /* Country Code */
  29         u8 ant_available_a;     /* A-PHY antenna available bits (up to 4) */
  30         u8 ant_available_bg;    /* B/G-PHY antenna available bits (up to 4) */
  31         u16 pa0b0;
  32         u16 pa0b1;
  33         u16 pa0b2;
  34         u16 pa1b0;
  35         u16 pa1b1;
  36         u16 pa1b2;
  37         u8 gpio0;               /* GPIO pin 0 */
  38         u8 gpio1;               /* GPIO pin 1 */
  39         u8 gpio2;               /* GPIO pin 2 */
  40         u8 gpio3;               /* GPIO pin 3 */
  41         u16 maxpwr_a;           /* A-PHY Amplifier Max Power (in dBm Q5.2) */
  42         u16 maxpwr_bg;          /* B/G-PHY Amplifier Max Power (in dBm Q5.2) */
  43         u8 itssi_a;             /* Idle TSSI Target for A-PHY */
  44         u8 itssi_bg;            /* Idle TSSI Target for B/G-PHY */
  45         u16 boardflags_lo;      /* Boardflags (low 16 bits) */
  46         u16 boardflags_hi;      /* Boardflags (high 16 bits) */
  47
  48         /* Antenna gain values for up to 4 antennas
  49          * on each band. Values in dBm/4 (Q5.2). Negative gain means the
  50          * loss in the connectors is bigger than the gain. */
  51         struct {
  52                 struct {
  53                         s8 a0, a1, a2, a3;
  54                 } ghz24;        /* 2.4GHz band */
  55                 struct {
  56                         s8 a0, a1, a2, a3;
  57                 } ghz5;         /* 5GHz band */
  58         } antenna_gain;
  59
  60         /* TODO - add any parameters needed from rev 2, 3, or 4 SPROMs */
  61 };
  62
  63 /* Information about the PCB the circuitry is soldered on. */
  64 struct ssb_boardinfo {
  65         u16 vendor;
  66         u16 type;
  67         u16 rev;
  68 };
  69
  70
  71 struct ssb_device;
  72 /* Lowlevel read/write operations on the device MMIO.
  73  * Internal, don't use that outside of ssb. */
  74 struct ssb_bus_ops {
  75         u8 (*read8)(struct ssb_device *dev, u16 offset);
  76         u16 (*read16)(struct ssb_device *dev, u16 offset);
  77         u32 (*read32)(struct ssb_device *dev, u16 offset);
  78         void (*write8)(struct ssb_device *dev, u16 offset, u8 value);
  79         void (*write16)(struct ssb_device *dev, u16 offset, u16 value);
  80         void (*write32)(struct ssb_device *dev, u16 offset, u32 value);
  81 #ifdef CONFIG_SSB_BLOCKIO
  82         void (*block_read)(struct ssb_device *dev, void *buffer,
  83                            size_t count, u16 offset, u8 reg_width);
  84         void (*block_write)(struct ssb_device *dev, const void *buffer,
  85                             size_t count, u16 offset, u8 reg_width);
  86 #endif
  87 };
  88
  89
  90 /* Core-ID values. */
  91 #define SSB_DEV_CHIPCOMMON      0x800
  92 #define SSB_DEV_ILINE20         0x801
  93 #define SSB_DEV_SDRAM           0x803
  94 #define SSB_DEV_PCI             0x804
  95 #define SSB_DEV_MIPS            0x805
  96 #define SSB_DEV_ETHERNET        0x806
  97 #define SSB_DEV_V90             0x807
  98 #define SSB_DEV_USB11_HOSTDEV   0x808
  99 #define SSB_DEV_ADSL            0x809
 100 #define SSB_DEV_ILINE100        0x80A
 101 #define SSB_DEV_IPSEC           0x80B
 102 #define SSB_DEV_PCMCIA          0x80D
 103 #define SSB_DEV_INTERNAL_MEM    0x80E
 104 #define SSB_DEV_MEMC_SDRAM      0x80F
 105 #define SSB_DEV_EXTIF           0x811
 106 #define SSB_DEV_80211           0x812
 107 #define SSB_DEV_MIPS_3302       0x816
 108 #define SSB_DEV_USB11_HOST      0x817
 109 #define SSB_DEV_USB11_DEV       0x818
 110 #define SSB_DEV_USB20_HOST      0x819
 111 #define SSB_DEV_USB20_DEV       0x81A
 112 #define SSB_DEV_SDIO_HOST       0x81B
 113 #define SSB_DEV_ROBOSWITCH      0x81C
 114 #define SSB_DEV_PARA_ATA        0x81D
 115 #define SSB_DEV_SATA_XORDMA     0x81E
 116 #define SSB_DEV_ETHERNET_GBIT   0x81F
 117 #define SSB_DEV_PCIE            0x820
 118 #define SSB_DEV_MIMO_PHY        0x821
 119 #define SSB_DEV_SRAM_CTRLR      0x822
 120 #define SSB_DEV_MINI_MACPHY     0x823
 121 #define SSB_DEV_ARM_1176        0x824
 122 #define SSB_DEV_ARM_7TDMI       0x825
 123
 124 /* Vendor-ID values */
 125 #define SSB_VENDOR_BROADCOM     0x4243
 126
 127 /* Some kernel subsystems poke with dev->drvdata, so we must use the
 128  * following ugly workaround to get from struct device to struct ssb_device */
 129 struct __ssb_dev_wrapper {
 130         struct device dev;
 131         struct ssb_device *sdev;
 132 };
 133
 134 struct ssb_device {
 135         /* Having a copy of the ops pointer in each dev struct
 136          * is an optimization. */
 137         const struct ssb_bus_ops *ops;
 138
 139         struct device *dev;
 140         /* Pointer to the device that has to be used for
 141          * any DMA related operation. */
 142         struct device *dma_dev;
 143
 144         struct ssb_bus *bus;
 145         struct ssb_device_id id;
 146
 147         u8 core_index;
 148         unsigned int irq;
 149
 150         /* Internal-only stuff follows. */
 151         void *drvdata;          /* Per-device data */
 152         void *devtypedata;      /* Per-devicetype (eg 802.11) data */
 153 };
 154
 155 /* Go from struct device to struct ssb_device. */
 156 static inline
 157 struct ssb_device * dev_to_ssb_dev(struct device *dev)
 158 {
 159         struct __ssb_dev_wrapper *wrap;
 160         wrap = container_of(dev, struct __ssb_dev_wrapper, dev);
 161         return wrap->sdev;
 162 }
 163
 164 /* Device specific user data */
 165 static inline
 166 void ssb_set_drvdata(struct ssb_device *dev, void *data)
 167 {
 168         dev->drvdata = data;
 169 }
 170 static inline
 171 void * ssb_get_drvdata(struct ssb_device *dev)
 172 {
 173         return dev->drvdata;
 174 }
 175
 176 /* Devicetype specific user data. This is per device-type (not per device) */
 177 void ssb_set_devtypedata(struct ssb_device *dev, void *data);
 178 static inline
 179 void * ssb_get_devtypedata(struct ssb_device *dev)
 180 {
 181         return dev->devtypedata;
 182 }
 183
 184
 185 struct ssb_driver {
 186         const char *name;
 187         const struct ssb_device_id *id_table;
 188
 189         int (*probe)(struct ssb_device *dev, const struct ssb_device_id *id);
 190         void (*remove)(struct ssb_device *dev);
 191         int (*suspend)(struct ssb_device *dev, pm_message_t state);
 192         int (*resume)(struct ssb_device *dev);
 193         void (*shutdown)(struct ssb_device *dev);
 194
 195         struct device_driver drv;
 196 };
 197 #define drv_to_ssb_drv(_drv) container_of(_drv, struct ssb_driver, drv)
 198
 199 extern int __ssb_driver_register(struct ssb_driver *drv, struct module *owner);
 200 static inline int ssb_driver_register(struct ssb_driver *drv)
 201 {
 202         return __ssb_driver_register(drv, THIS_MODULE);
 203 }
 204 extern void ssb_driver_unregister(struct ssb_driver *drv);
 205
 206
 207
 208
 209 enum ssb_bustype {
 210         SSB_BUSTYPE_SSB,        /* This SSB bus is the system bus */
 211         SSB_BUSTYPE_PCI,        /* SSB is connected to PCI bus */
 212         SSB_BUSTYPE_PCMCIA,     /* SSB is connected to PCMCIA bus */
 213 };
 214
 215 /* board_vendor */
 216 #define SSB_BOARDVENDOR_BCM     0x14E4  /* Broadcom */
 217 #define SSB_BOARDVENDOR_DELL    0x1028  /* Dell */
 218 #define SSB_BOARDVENDOR_HP      0x0E11  /* HP */
 219 /* board_type */
 220 #define SSB_BOARD_BCM94306MP    0x0418
 221 #define SSB_BOARD_BCM4309G      0x0421
 222 #define SSB_BOARD_BCM4306CB     0x0417
 223 #define SSB_BOARD_BCM4309MP     0x040C
 224 #define SSB_BOARD_MP4318        0x044A
 225 #define SSB_BOARD_BU4306        0x0416
 226 #define SSB_BOARD_BU4309        0x040A
 227 /* chip_package */
 228 #define SSB_CHIPPACK_BCM4712S   1       /* Small 200pin 4712 */
 229 #define SSB_CHIPPACK_BCM4712M   2       /* Medium 225pin 4712 */
 230 #define SSB_CHIPPACK_BCM4712L   0       /* Large 340pin 4712 */
 231
 232 #include <linux/ssb/ssb_driver_chipcommon.h>
 233 #include <linux/ssb/ssb_driver_mips.h>
 234 #include <linux/ssb/ssb_driver_extif.h>
 235 #include <linux/ssb/ssb_driver_pci.h>
 236
 237 struct ssb_bus {
 238         /* The MMIO area. */
 239         void __iomem *mmio;
 240
 241         const struct ssb_bus_ops *ops;
 242
 243         /* The core in the basic address register window. (PCI bus only) */
 244         struct ssb_device *mapped_device;
 245         /* Currently mapped PCMCIA segment. (bustype == SSB_BUSTYPE_PCMCIA only) */
 246         u8 mapped_pcmcia_seg;
 247         /* Lock for core and segment switching.
 248          * On PCMCIA-host busses this is used to protect the whole MMIO access. */
 249         spinlock_t bar_lock;
 250
 251         /* The bus this backplane is running on. */
 252         enum ssb_bustype bustype;
 253         /* Pointer to the PCI bus (only valid if bustype == SSB_BUSTYPE_PCI). */
 254         struct pci_dev *host_pci;
 255         /* Pointer to the PCMCIA device (only if bustype == SSB_BUSTYPE_PCMCIA). */
 256         struct pcmcia_device *host_pcmcia;
 257
 258 #ifdef CONFIG_SSB_SPROM
 259         /* Mutex to protect the SPROM writing. */
 260         struct mutex sprom_mutex;
 261 #endif
 262
 263         /* ID information about the Chip. */
 264         u16 chip_id;
 265         u16 chip_rev;
 266         u16 sprom_size;         /* number of words in sprom */
 267         u8 chip_package;
 268
 269         /* List of devices (cores) on the backplane. */
 270         struct ssb_device devices[SSB_MAX_NR_CORES];
 271         u8 nr_devices;
 272
 273         /* Software ID number for this bus. */
 274         unsigned int busnumber;
 275
 276         /* The ChipCommon device (if available). */
 277         struct ssb_chipcommon chipco;
 278         /* The PCI-core device (if available). */
 279         struct ssb_pcicore pcicore;
 280         /* The MIPS-core device (if available). */
 281         struct ssb_mipscore mipscore;
 282         /* The EXTif-core device (if available). */
 283         struct ssb_extif extif;
 284
 285         /* The following structure elements are not available in early
 286          * SSB initialization. Though, they are available for regular
 287          * registered drivers at any stage. So be careful when
 288          * using them in the ssb core code. */
 289
 290         /* ID information about the PCB. */
 291         struct ssb_boardinfo boardinfo;
 292         /* Contents of the SPROM. */
 293         struct ssb_sprom sprom;
 294         /* If the board has a cardbus slot, this is set to true. */
 295         bool has_cardbus_slot;
 296
 297 #ifdef CONFIG_SSB_EMBEDDED
 298         /* Lock for GPIO register access. */
 299         spinlock_t gpio_lock;
 300 #endif /* EMBEDDED */
 301
 302         /* Internal-only stuff follows. Do not touch. */
 303         struct list_head list;
 304 #ifdef CONFIG_SSB_DEBUG
 305         /* Is the bus already powered up? */
 306         bool powered_up;
 307         int power_warn_count;
 308 #endif /* DEBUG */
 309 };
 310
 311 /* The initialization-invariants. */
 312 struct ssb_init_invariants {
 313         /* Versioning information about the PCB. */
 314         struct ssb_boardinfo boardinfo;
 315         /* The SPROM information. That's either stored in an
 316          * EEPROM or NVRAM on the board. */
 317         struct ssb_sprom sprom;
 318         /* If the board has a cardbus slot, this is set to true. */
 319         bool has_cardbus_slot;
 320 };
 321 /* Type of function to fetch the invariants. */
 322 typedef int (*ssb_invariants_func_t)(struct ssb_bus *bus,
 323                                      struct ssb_init_invariants *iv);
 324
 325 /* Register a SSB system bus. get_invariants() is called after the
 326  * basic system devices are initialized.
 327  * The invariants are usually fetched from some NVRAM.
 328  * Put the invariants into the struct pointed to by iv. */
 329 extern int ssb_bus_ssbbus_register(struct ssb_bus *bus,
 330                                    unsigned long baseaddr,
 331                                    ssb_invariants_func_t get_invariants);
 332 #ifdef CONFIG_SSB_PCIHOST
 333 extern int ssb_bus_pcibus_register(struct ssb_bus *bus,
 334                                    struct pci_dev *host_pci);
 335 #endif /* CONFIG_SSB_PCIHOST */
 336 #ifdef CONFIG_SSB_PCMCIAHOST
 337 extern int ssb_bus_pcmciabus_register(struct ssb_bus *bus,
 338                                       struct pcmcia_device *pcmcia_dev,
 339                                       unsigned long baseaddr);
 340 #endif /* CONFIG_SSB_PCMCIAHOST */
 341
 342 extern void ssb_bus_unregister(struct ssb_bus *bus);
 343
 344 /* Suspend a SSB bus.
 345  * Call this from the parent bus suspend routine. */
 346 extern int ssb_bus_suspend(struct ssb_bus *bus);
 347 /* Resume a SSB bus.
 348  * Call this from the parent bus resume routine. */
 349 extern int ssb_bus_resume(struct ssb_bus *bus);
 350
 351 extern u32 ssb_clockspeed(struct ssb_bus *bus);
 352
 353 /* Is the device enabled in hardware? */
 354 int ssb_device_is_enabled(struct ssb_device *dev);
 355 /* Enable a device and pass device-specific SSB_TMSLOW flags.
 356  * If no device-specific flags are available, use 0. */
 357 void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags);
 358 /* Disable a device in hardware and pass SSB_TMSLOW flags (if any). */
 359 void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags);
 360
 361
 362 /* Device MMIO register read/write functions. */
 363 static inline u8 ssb_read8(struct ssb_device *dev, u16 offset)
 364 {
 365         return dev->ops->read8(dev, offset);
 366 }
 367 static inline u16 ssb_read16(struct ssb_device *dev, u16 offset)
 368 {
 369         return dev->ops->read16(dev, offset);
 370 }
 371 static inline u32 ssb_read32(struct ssb_device *dev, u16 offset)
 372 {
 373         return dev->ops->read32(dev, offset);
 374 }
 375 static inline void ssb_write8(struct ssb_device *dev, u16 offset, u8 value)
 376 {
 377         dev->ops->write8(dev, offset, value);
 378 }
 379 static inline void ssb_write16(struct ssb_device *dev, u16 offset, u16 value)
 380 {
 381         dev->ops->write16(dev, offset, value);
 382 }
 383 static inline void ssb_write32(struct ssb_device *dev, u16 offset, u32 value)
 384 {
 385         dev->ops->write32(dev, offset, value);
 386 }
 387 #ifdef CONFIG_SSB_BLOCKIO
 388 static inline void ssb_block_read(struct ssb_device *dev, void *buffer,
 389                                   size_t count, u16 offset, u8 reg_width)
 390 {
 391         dev->ops->block_read(dev, buffer, count, offset, reg_width);
 392 }
 393
 394 static inline void ssb_block_write(struct ssb_device *dev, const void *buffer,
 395                                    size_t count, u16 offset, u8 reg_width)
 396 {
 397         dev->ops->block_write(dev, buffer, count, offset, reg_width);
 398 }
 399 #endif /* CONFIG_SSB_BLOCKIO */
 400
 401
 402 /* Translation (routing) bits that need to be ORed to DMA
 403  * addresses before they are given to a device. */
 404 extern u32 ssb_dma_translation(struct ssb_device *dev);
 405 #define SSB_DMA_TRANSLATION_MASK        0xC0000000
 406 #define SSB_DMA_TRANSLATION_SHIFT       30
 407
 408 extern int ssb_dma_set_mask(struct ssb_device *ssb_dev, u64 mask);
 409
 410
 411 #ifdef CONFIG_SSB_PCIHOST
 412 /* PCI-host wrapper driver */
 413 extern int ssb_pcihost_register(struct pci_driver *driver);
 414 static inline void ssb_pcihost_unregister(struct pci_driver *driver)
 415 {
 416         pci_unregister_driver(driver);
 417 }
 418
 419 static inline
 420 void ssb_pcihost_set_power_state(struct ssb_device *sdev, pci_power_t state)
 421 {
 422         if (sdev->bus->bustype == SSB_BUSTYPE_PCI)
 423                 pci_set_power_state(sdev->bus->host_pci, state);
 424 }
 425 #else
 426 static inline void ssb_pcihost_unregister(struct pci_driver *driver)
 427 {
 428 }
 429
 430 static inline
 431 void ssb_pcihost_set_power_state(struct ssb_device *sdev, pci_power_t state)
 432 {
 433 }
 434 #endif /* CONFIG_SSB_PCIHOST */
 435
 436
 437 /* If a driver is shutdown or suspended, call this to signal
 438  * that the bus may be completely powered down. SSB will decide,
 439  * if it's really time to power down the bus, based on if there
 440  * are other devices that want to run. */
 441 extern int ssb_bus_may_powerdown(struct ssb_bus *bus);
 442 /* Before initializing and enabling a device, call this to power-up the bus.
 443  * If you want to allow use of dynamic-power-control, pass the flag.
 444  * Otherwise static always-on powercontrol will be used. */
 445 extern int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl);
 446
 447
 448 /* Various helper functions */
 449 extern u32 ssb_admatch_base(u32 adm);
 450 extern u32 ssb_admatch_size(u32 adm);
 451
 452 /* PCI device mapping and fixup routines.
 453  * Called from the architecture pcibios init code.
 454  * These are only available on SSB_EMBEDDED configurations. */
 455 #ifdef CONFIG_SSB_EMBEDDED
 456 int ssb_pcibios_plat_dev_init(struct pci_dev *dev);
 457 int ssb_pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
 458 #endif /* CONFIG_SSB_EMBEDDED */
 459
 460 #endif /* LINUX_SSB_H_ */