include/linux/usb/msm_hsusb.h

   1 /* linux/include/asm-arm/arch-msm/hsusb.h
   2  *
   3  * Copyright (C) 2008 Google, Inc.
   4  * Author: Brian Swetland <swetland@google.com>
   5  * Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved.
   6  *
   7  * This software is licensed under the terms of the GNU General Public
   8  * License version 2, as published by the Free Software Foundation, and
   9  * may be copied, distributed, and modified under those terms.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  */
  17
  18 #ifndef __ASM_ARCH_MSM_HSUSB_H
  19 #define __ASM_ARCH_MSM_HSUSB_H
  20
  21 #include <linux/types.h>
  22 #include <linux/usb/otg.h>
  23 #include <linux/clk.h>
  24
  25 /**
  26  * OTG control
  27  *
  28  * OTG_NO_CONTROL       Id/VBUS notifications not required. Useful in host
  29  *                      only configuration.
  30  * OTG_PHY_CONTROL      Id/VBUS notifications comes form USB PHY.
  31  * OTG_PMIC_CONTROL     Id/VBUS notifications comes from PMIC hardware.
  32  * OTG_USER_CONTROL     Id/VBUS notifcations comes from User via sysfs.
  33  *
  34  */
  35 enum otg_control_type {
  36         OTG_NO_CONTROL = 0,
  37         OTG_PHY_CONTROL,
  38         OTG_PMIC_CONTROL,
  39         OTG_USER_CONTROL,
  40 };
  41
  42 /**
  43  * PHY used in
  44  *
  45  * INVALID_PHY                  Unsupported PHY
  46  * CI_45NM_INTEGRATED_PHY       Chipidea 45nm integrated PHY
  47  * SNPS_28NM_INTEGRATED_PHY     Synopsis 28nm integrated PHY
  48  *
  49  */
  50 enum msm_usb_phy_type {
  51         INVALID_PHY = 0,
  52         CI_45NM_INTEGRATED_PHY,
  53         SNPS_28NM_INTEGRATED_PHY,
  54 };
  55
  56 #define IDEV_CHG_MAX    1500
  57 #define IUNIT           100
  58
  59 /**
  60  * Different states involved in USB charger detection.
  61  *
  62  * USB_CHG_STATE_UNDEFINED      USB charger is not connected or detection
  63  *                              process is not yet started.
  64  * USB_CHG_STATE_WAIT_FOR_DCD   Waiting for Data pins contact.
  65  * USB_CHG_STATE_DCD_DONE       Data pin contact is detected.
  66  * USB_CHG_STATE_PRIMARY_DONE   Primary detection is completed (Detects
  67  *                              between SDP and DCP/CDP).
  68  * USB_CHG_STATE_SECONDARY_DONE Secondary detection is completed (Detects
  69  *                              between DCP and CDP).
  70  * USB_CHG_STATE_DETECTED       USB charger type is determined.
  71  *
  72  */
  73 enum usb_chg_state {
  74         USB_CHG_STATE_UNDEFINED = 0,
  75         USB_CHG_STATE_WAIT_FOR_DCD,
  76         USB_CHG_STATE_DCD_DONE,
  77         USB_CHG_STATE_PRIMARY_DONE,
  78         USB_CHG_STATE_SECONDARY_DONE,
  79         USB_CHG_STATE_DETECTED,
  80 };
  81
  82 /**
  83  * USB charger types
  84  *
  85  * USB_INVALID_CHARGER  Invalid USB charger.
  86  * USB_SDP_CHARGER      Standard downstream port. Refers to a downstream port
  87  *                      on USB2.0 compliant host/hub.
  88  * USB_DCP_CHARGER      Dedicated charger port (AC charger/ Wall charger).
  89  * USB_CDP_CHARGER      Charging downstream port. Enumeration can happen and
  90  *                      IDEV_CHG_MAX can be drawn irrespective of USB state.
  91  *
  92  */
  93 enum usb_chg_type {
  94         USB_INVALID_CHARGER = 0,
  95         USB_SDP_CHARGER,
  96         USB_DCP_CHARGER,
  97         USB_CDP_CHARGER,
  98 };
  99
 100 /**
 101  * struct msm_otg_platform_data - platform device data
 102  *              for msm_otg driver.
 103  * @phy_init_seq: PHY configuration sequence values. Value of -1 is reserved as
 104  *              "do not overwrite default vaule at this address".
 105  * @phy_init_sz: PHY configuration sequence size.
 106  * @vbus_power: VBUS power on/off routine.
 107  * @power_budget: VBUS power budget in mA (0 will be treated as 500mA).
 108  * @mode: Supported mode (OTG/peripheral/host).
 109  * @otg_control: OTG switch controlled by user/Id pin
 110  */
 111 struct msm_otg_platform_data {
 112         int *phy_init_seq;
 113         int phy_init_sz;
 114         void (*vbus_power)(bool on);
 115         unsigned power_budget;
 116         enum usb_dr_mode mode;
 117         enum otg_control_type otg_control;
 118         enum msm_usb_phy_type phy_type;
 119         void (*setup_gpio)(enum usb_otg_state state);
 120 };
 121
 122 /**
 123  * struct msm_otg: OTG driver data. Shared by HCD and DCD.
 124  * @otg: USB OTG Transceiver structure.
 125  * @pdata: otg device platform data.
 126  * @irq: IRQ number assigned for HSUSB controller.
 127  * @clk: clock struct of usb_hs_clk.
 128  * @pclk: clock struct of usb_hs_pclk.
 129  * @core_clk: clock struct of usb_hs_core_clk.
 130  * @regs: ioremapped register base address.
 131  * @inputs: OTG state machine inputs(Id, SessValid etc).
 132  * @sm_work: OTG state machine work.
 133  * @in_lpm: indicates low power mode (LPM) state.
 134  * @async_int: Async interrupt arrived.
 135  * @cur_power: The amount of mA available from downstream port.
 136  * @chg_work: Charger detection work.
 137  * @chg_state: The state of charger detection process.
 138  * @chg_type: The type of charger attached.
 139  * @dcd_retires: The retry count used to track Data contact
 140  *               detection process.
 141  */
 142 struct msm_otg {
 143         struct usb_phy phy;
 144         struct msm_otg_platform_data *pdata;
 145         int irq;
 146         struct clk *clk;
 147         struct clk *pclk;
 148         struct clk *core_clk;
 149         void __iomem *regs;
 150 #define ID              0
 151 #define B_SESS_VLD      1
 152         unsigned long inputs;
 153         struct work_struct sm_work;
 154         atomic_t in_lpm;
 155         int async_int;
 156         unsigned cur_power;
 157         int phy_number;
 158         struct delayed_work chg_work;
 159         enum usb_chg_state chg_state;
 160         enum usb_chg_type chg_type;
 161         u8 dcd_retries;
 162         struct regulator *v3p3;
 163         struct regulator *v1p8;
 164         struct regulator *vddcx;
 165
 166         struct reset_control *phy_rst;
 167         struct reset_control *link_rst;
 168         int vdd_levels[3];
 169 };
 170
 171 #endif