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1 /*
2 * Samsung S5P/Exynos4 SoC series camera interface driver header
3 *
4 * Copyright (C) 2010 - 2013 Samsung Electronics Co., Ltd.
5 * Sylwester Nawrocki <s.nawrocki@samsung.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12 #ifndef S5P_FIMC_H_
13 #define S5P_FIMC_H_
14
15 #include <media/media-entity.h>
16 #include <media/v4l2-dev.h>
17 #include <media/v4l2-mediabus.h>
18
19 /*
20 * Enumeration of data inputs to the camera subsystem.
21 */
22 enum fimc_input {
23 FIMC_INPUT_PARALLEL_0 = 1,
24 FIMC_INPUT_PARALLEL_1,
25 FIMC_INPUT_MIPI_CSI2_0 = 3,
26 FIMC_INPUT_MIPI_CSI2_1,
27 FIMC_INPUT_WRITEBACK_A = 5,
28 FIMC_INPUT_WRITEBACK_B,
29 FIMC_INPUT_WRITEBACK_ISP = 5,
30 };
31
32 /*
33 * Enumeration of the FIMC data bus types.
34 */
35 enum fimc_bus_type {
36 /* Camera parallel bus */
37 FIMC_BUS_TYPE_ITU_601 = 1,
38 /* Camera parallel bus with embedded synchronization */
39 FIMC_BUS_TYPE_ITU_656,
40 /* Camera MIPI-CSI2 serial bus */
41 FIMC_BUS_TYPE_MIPI_CSI2,
42 /* FIFO link from LCD controller (WriteBack A) */
43 FIMC_BUS_TYPE_LCD_WRITEBACK_A,
44 /* FIFO link from LCD controller (WriteBack B) */
45 FIMC_BUS_TYPE_LCD_WRITEBACK_B,
46 /* FIFO link from FIMC-IS */
47 FIMC_BUS_TYPE_ISP_WRITEBACK = FIMC_BUS_TYPE_LCD_WRITEBACK_B,
48 };
49
50 #define fimc_input_is_parallel(x) ((x) == 1 || (x) == 2)
51 #define fimc_input_is_mipi_csi(x) ((x) == 3 || (x) == 4)
52
53 /*
54 * The subdevices' group IDs.
55 */
56 #define GRP_ID_SENSOR (1 << 8)
57 #define GRP_ID_FIMC_IS_SENSOR (1 << 9)
58 #define GRP_ID_WRITEBACK (1 << 10)
59 #define GRP_ID_CSIS (1 << 11)
60 #define GRP_ID_FIMC (1 << 12)
61 #define GRP_ID_FLITE (1 << 13)
62 #define GRP_ID_FIMC_IS (1 << 14)
63
64 struct i2c_board_info;
65
66 /**
67 * struct fimc_source_info - video source description required for the host
68 * interface configuration
69 *
70 * @board_info: pointer to I2C subdevice's board info
71 * @clk_frequency: frequency of the clock the host interface provides to sensor
72 * @fimc_bus_type: FIMC camera input type
73 * @sensor_bus_type: image sensor bus type, MIPI, ITU-R BT.601 etc.
74 * @flags: the parallel sensor bus flags defining signals polarity (V4L2_MBUS_*)
75 * @i2c_bus_num: i2c control bus id the sensor is attached to
76 * @mux_id: FIMC camera interface multiplexer index (separate for MIPI and ITU)
77 * @clk_id: index of the SoC peripheral clock for sensors
78 */
79 struct fimc_source_info {
80 struct i2c_board_info *board_info;
81 unsigned long clk_frequency;
82 enum fimc_bus_type fimc_bus_type;
83 enum fimc_bus_type sensor_bus_type;
84 u16 flags;
85 u16 i2c_bus_num;
86 u16 mux_id;
87 u8 clk_id;
88 };
89
90 /**
91 * struct s5p_platform_fimc - camera host interface platform data
92 *
93 * @source_info: properties of an image source for the host interface setup
94 * @num_clients: the number of attached image sources
95 */
96 struct s5p_platform_fimc {
97 struct fimc_source_info *source_info;
98 int num_clients;
99 };
100
101 /*
102 * v4l2_device notification id. This is only for internal use in the kernel.
103 * Sensor subdevs should issue S5P_FIMC_TX_END_NOTIFY notification in single
104 * frame capture mode when there is only one VSYNC pulse issued by the sensor
105 * at begining of the frame transmission.
106 */
107 #define S5P_FIMC_TX_END_NOTIFY _IO('e', 0)
108
109 #define FIMC_MAX_PLANES 3
110
111 /**
112 * struct fimc_fmt - color format data structure
113 * @mbus_code: media bus pixel code, -1 if not applicable
114 * @name: format description
115 * @fourcc: fourcc code for this format, 0 if not applicable
116 * @color: the driver's private color format id
117 * @memplanes: number of physically non-contiguous data planes
118 * @colplanes: number of physically contiguous data planes
119 * @colorspace: v4l2 colorspace (V4L2_COLORSPACE_*)
120 * @depth: per plane driver's private 'number of bits per pixel'
121 * @mdataplanes: bitmask indicating meta data plane(s), (1 << plane_no)
122 * @flags: flags indicating which operation mode format applies to
123 */
124 struct fimc_fmt {
125 enum v4l2_mbus_pixelcode mbus_code;
126 char *name;
127 u32 fourcc;
128 u32 color;
129 u16 memplanes;
130 u16 colplanes;
131 u8 colorspace;
132 u8 depth[FIMC_MAX_PLANES];
133 u16 mdataplanes;
134 u16 flags;
135 #define FMT_FLAGS_CAM (1 << 0)
136 #define FMT_FLAGS_M2M_IN (1 << 1)
137 #define FMT_FLAGS_M2M_OUT (1 << 2)
138 #define FMT_FLAGS_M2M (1 << 1 | 1 << 2)
139 #define FMT_HAS_ALPHA (1 << 3)
140 #define FMT_FLAGS_COMPRESSED (1 << 4)
141 #define FMT_FLAGS_WRITEBACK (1 << 5)
142 #define FMT_FLAGS_RAW_BAYER (1 << 6)
143 #define FMT_FLAGS_YUV (1 << 7)
144 };
145
146 struct exynos_media_pipeline;
147
148 /*
149 * Media pipeline operations to be called from within a video node, i.e. the
150 * last entity within the pipeline. Implemented by related media device driver.
151 */
152 struct exynos_media_pipeline_ops {
153 int (*prepare)(struct exynos_media_pipeline *p,
154 struct media_entity *me);
155 int (*unprepare)(struct exynos_media_pipeline *p);
156 int (*open)(struct exynos_media_pipeline *p, struct media_entity *me,
157 bool resume);
158 int (*close)(struct exynos_media_pipeline *p);
159 int (*set_stream)(struct exynos_media_pipeline *p, bool state);
160 };
161
162 struct exynos_video_entity {
163 struct video_device vdev;
164 struct exynos_media_pipeline *pipe;
165 };
166
167 struct exynos_media_pipeline {
168 struct media_pipeline mp;
169 const struct exynos_media_pipeline_ops *ops;
170 };
171
172 static inline struct exynos_video_entity *vdev_to_exynos_video_entity(
173 struct video_device *vdev)
174 {
175 return container_of(vdev, struct exynos_video_entity, vdev);
176 }
177
178 #define fimc_pipeline_call(ent, op, args...) \
179 (!(ent) ? -ENOENT : (((ent)->pipe->ops && (ent)->pipe->ops->op) ? \
180 (ent)->pipe->ops->op(((ent)->pipe), ##args) : -ENOIOCTLCMD)) \
181
182 #endif /* S5P_FIMC_H_ */