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1 /*
2 * Copyright (C) ST-Ericsson AB 2010
3 * Author: Daniel Martensson / daniel.martensson@stericsson.com
4 * Dmitry.Tarnyagin / dmitry.tarnyagin@stericsson.com
5 * License terms: GNU General Public License (GPL) version 2
6 */
7
8 #ifndef CAIF_HSI_H_
9 #define CAIF_HSI_H_
10
11 #include <net/caif/caif_layer.h>
12 #include <net/caif/caif_device.h>
13 #include <linux/atomic.h>
14
15 /*
16 * Maximum number of CAIF frames that can reside in the same HSI frame.
17 */
18 #define CFHSI_MAX_PKTS 15
19
20 /*
21 * Maximum number of bytes used for the frame that can be embedded in the
22 * HSI descriptor.
23 */
24 #define CFHSI_MAX_EMB_FRM_SZ 96
25
26 /*
27 * Decides if HSI buffers should be prefilled with 0xFF pattern for easier
28 * debugging. Both TX and RX buffers will be filled before the transfer.
29 */
30 #define CFHSI_DBG_PREFILL 0
31
32 /* Structure describing a HSI packet descriptor. */
33 #pragma pack(1) /* Byte alignment. */
34 struct cfhsi_desc {
35 u8 header;
36 u8 offset;
37 u16 cffrm_len[CFHSI_MAX_PKTS];
38 u8 emb_frm[CFHSI_MAX_EMB_FRM_SZ];
39 };
40 #pragma pack() /* Default alignment. */
41
42 /* Size of the complete HSI packet descriptor. */
43 #define CFHSI_DESC_SZ (sizeof(struct cfhsi_desc))
44
45 /*
46 * Size of the complete HSI packet descriptor excluding the optional embedded
47 * CAIF frame.
48 */
49 #define CFHSI_DESC_SHORT_SZ (CFHSI_DESC_SZ - CFHSI_MAX_EMB_FRM_SZ)
50
51 /*
52 * Maximum bytes transferred in one transfer.
53 */
54 #define CFHSI_MAX_CAIF_FRAME_SZ 4096
55
56 #define CFHSI_MAX_PAYLOAD_SZ (CFHSI_MAX_PKTS * CFHSI_MAX_CAIF_FRAME_SZ)
57
58 /* Size of the complete HSI TX buffer. */
59 #define CFHSI_BUF_SZ_TX (CFHSI_DESC_SZ + CFHSI_MAX_PAYLOAD_SZ)
60
61 /* Size of the complete HSI RX buffer. */
62 #define CFHSI_BUF_SZ_RX ((2 * CFHSI_DESC_SZ) + CFHSI_MAX_PAYLOAD_SZ)
63
64 /* Bitmasks for the HSI descriptor. */
65 #define CFHSI_PIGGY_DESC (0x01 << 7)
66
67 #define CFHSI_TX_STATE_IDLE 0
68 #define CFHSI_TX_STATE_XFER 1
69
70 #define CFHSI_RX_STATE_DESC 0
71 #define CFHSI_RX_STATE_PAYLOAD 1
72
73 /* Bitmasks for power management. */
74 #define CFHSI_WAKE_UP 0
75 #define CFHSI_WAKE_UP_ACK 1
76 #define CFHSI_WAKE_DOWN_ACK 2
77 #define CFHSI_AWAKE 3
78 #define CFHSI_WAKELOCK_HELD 4
79 #define CFHSI_SHUTDOWN 5
80 #define CFHSI_FLUSH_FIFO 6
81
82 #ifndef CFHSI_INACTIVITY_TOUT
83 #define CFHSI_INACTIVITY_TOUT (1 * HZ)
84 #endif /* CFHSI_INACTIVITY_TOUT */
85
86 #ifndef CFHSI_WAKE_TOUT
87 #define CFHSI_WAKE_TOUT (3 * HZ)
88 #endif /* CFHSI_WAKE_TOUT */
89
90 #ifndef CFHSI_MAX_RX_RETRIES
91 #define CFHSI_MAX_RX_RETRIES (10 * HZ)
92 #endif
93
94 /* Structure implemented by the CAIF HSI driver. */
95 struct cfhsi_cb_ops {
96 void (*tx_done_cb) (struct cfhsi_cb_ops *drv);
97 void (*rx_done_cb) (struct cfhsi_cb_ops *drv);
98 void (*wake_up_cb) (struct cfhsi_cb_ops *drv);
99 void (*wake_down_cb) (struct cfhsi_cb_ops *drv);
100 };
101
102 /* Structure implemented by HSI device. */
103 struct cfhsi_ops {
104 int (*cfhsi_up) (struct cfhsi_ops *dev);
105 int (*cfhsi_down) (struct cfhsi_ops *dev);
106 int (*cfhsi_tx) (u8 *ptr, int len, struct cfhsi_ops *dev);
107 int (*cfhsi_rx) (u8 *ptr, int len, struct cfhsi_ops *dev);
108 int (*cfhsi_wake_up) (struct cfhsi_ops *dev);
109 int (*cfhsi_wake_down) (struct cfhsi_ops *dev);
110 int (*cfhsi_get_peer_wake) (struct cfhsi_ops *dev, bool *status);
111 int (*cfhsi_fifo_occupancy) (struct cfhsi_ops *dev, size_t *occupancy);
112 int (*cfhsi_rx_cancel)(struct cfhsi_ops *dev);
113 struct cfhsi_cb_ops *cb_ops;
114 };
115
116 /* Structure holds status of received CAIF frames processing */
117 struct cfhsi_rx_state {
118 int state;
119 int nfrms;
120 int pld_len;
121 int retries;
122 bool piggy_desc;
123 };
124
125 /* Priority mapping */
126 enum {
127 CFHSI_PRIO_CTL = 0,
128 CFHSI_PRIO_VI,
129 CFHSI_PRIO_VO,
130 CFHSI_PRIO_BEBK,
131 CFHSI_PRIO_LAST,
132 };
133
134 struct cfhsi_config {
135 u32 inactivity_timeout;
136 u32 aggregation_timeout;
137 u32 head_align;
138 u32 tail_align;
139 u32 q_high_mark;
140 u32 q_low_mark;
141 };
142
143 /* Structure implemented by CAIF HSI drivers. */
144 struct cfhsi {
145 struct caif_dev_common cfdev;
146 struct net_device *ndev;
147 struct platform_device *pdev;
148 struct sk_buff_head qhead[CFHSI_PRIO_LAST];
149 struct cfhsi_cb_ops cb_ops;
150 struct cfhsi_ops *ops;
151 int tx_state;
152 struct cfhsi_rx_state rx_state;
153 struct cfhsi_config cfg;
154 int rx_len;
155 u8 *rx_ptr;
156 u8 *tx_buf;
157 u8 *rx_buf;
158 u8 *rx_flip_buf;
159 spinlock_t lock;
160 int flow_off_sent;
161 struct list_head list;
162 struct work_struct wake_up_work;
163 struct work_struct wake_down_work;
164 struct work_struct out_of_sync_work;
165 struct workqueue_struct *wq;
166 wait_queue_head_t wake_up_wait;
167 wait_queue_head_t wake_down_wait;
168 wait_queue_head_t flush_fifo_wait;
169 struct timer_list inactivity_timer;
170 struct timer_list rx_slowpath_timer;
171
172 /* TX aggregation */
173 int aggregation_len;
174 struct timer_list aggregation_timer;
175
176 unsigned long bits;
177 };
178 extern struct platform_driver cfhsi_driver;
179
180 /**
181 * enum ifla_caif_hsi - CAIF HSI NetlinkRT parameters.
182 * @IFLA_CAIF_HSI_INACTIVITY_TOUT: Inactivity timeout before
183 * taking the HSI wakeline down, in milliseconds.
184 * When using RT Netlink to create, destroy or configure a CAIF HSI interface,
185 * enum ifla_caif_hsi is used to specify the configuration attributes.
186 */
187 enum ifla_caif_hsi {
188 __IFLA_CAIF_HSI_UNSPEC,
189 __IFLA_CAIF_HSI_INACTIVITY_TOUT,
190 __IFLA_CAIF_HSI_AGGREGATION_TOUT,
191 __IFLA_CAIF_HSI_HEAD_ALIGN,
192 __IFLA_CAIF_HSI_TAIL_ALIGN,
193 __IFLA_CAIF_HSI_QHIGH_WATERMARK,
194 __IFLA_CAIF_HSI_QLOW_WATERMARK,
195 __IFLA_CAIF_HSI_MAX
196 };
197
198 struct cfhsi_ops *cfhsi_get_ops(void);
199
200 #endif /* CAIF_HSI_H_ */