include/qom/cpu.h

   1 /*
   2  * QEMU CPU model
   3  *
   4  * Copyright (c) 2012 SUSE LINUX Products GmbH
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version 2
   9  * of the License, or (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, see
  18  * <http://www.gnu.org/licenses/gpl-2.0.html>
  19  */
  20 #ifndef QEMU_CPU_H
  21 #define QEMU_CPU_H
  22
  23 #include "hw/qdev-core.h"
  24 #include "disas/bfd.h"
  25 #include "exec/hwaddr.h"
  26 #include "exec/memattrs.h"
  27 #include "qemu/bitmap.h"
  28 #include "qemu/queue.h"
  29 #include "qemu/thread.h"
  30 #include "trace/generated-events.h"
  31
  32 typedef int (*WriteCoreDumpFunction)(const void *buf, size_t size,
  33                                      void *opaque);
  34
  35 /**
  36  * vaddr:
  37  * Type wide enough to contain any #target_ulong virtual address.
  38  */
  39 typedef uint64_t vaddr;
  40 #define VADDR_PRId PRId64
  41 #define VADDR_PRIu PRIu64
  42 #define VADDR_PRIo PRIo64
  43 #define VADDR_PRIx PRIx64
  44 #define VADDR_PRIX PRIX64
  45 #define VADDR_MAX UINT64_MAX
  46
  47 /**
  48  * SECTION:cpu
  49  * @section_id: QEMU-cpu
  50  * @title: CPU Class
  51  * @short_description: Base class for all CPUs
  52  */
  53
  54 #define TYPE_CPU "cpu"
  55
  56 /* Since this macro is used a lot in hot code paths and in conjunction with
  57  * FooCPU *foo_env_get_cpu(), we deviate from usual QOM practice by using
  58  * an unchecked cast.
  59  */
  60 #define CPU(obj) ((CPUState *)(obj))
  61
  62 #define CPU_CLASS(class) OBJECT_CLASS_CHECK(CPUClass, (class), TYPE_CPU)
  63 #define CPU_GET_CLASS(obj) OBJECT_GET_CLASS(CPUClass, (obj), TYPE_CPU)
  64
  65 typedef enum MMUAccessType {
  66     MMU_DATA_LOAD  = 0,
  67     MMU_DATA_STORE = 1,
  68     MMU_INST_FETCH = 2
  69 } MMUAccessType;
  70
  71 typedef struct CPUWatchpoint CPUWatchpoint;
  72
  73 typedef void (*CPUUnassignedAccess)(CPUState *cpu, hwaddr addr,
  74                                     bool is_write, bool is_exec, int opaque,
  75                                     unsigned size);
  76
  77 struct TranslationBlock;
  78
  79 /**
  80  * CPUClass:
  81  * @class_by_name: Callback to map -cpu command line model name to an
  82  * instantiatable CPU type.
  83  * @parse_features: Callback to parse command line arguments.
  84  * @reset: Callback to reset the #CPUState to its initial state.
  85  * @reset_dump_flags: #CPUDumpFlags to use for reset logging.
  86  * @has_work: Callback for checking if there is work to do.
  87  * @do_interrupt: Callback for interrupt handling.
  88  * @do_unassigned_access: Callback for unassigned access handling.
  89  * @do_unaligned_access: Callback for unaligned access handling, if
  90  * the target defines #ALIGNED_ONLY.
  91  * @virtio_is_big_endian: Callback to return %true if a CPU which supports
  92  * runtime configurable endianness is currently big-endian. Non-configurable
  93  * CPUs can use the default implementation of this method. This method should
  94  * not be used by any callers other than the pre-1.0 virtio devices.
  95  * @memory_rw_debug: Callback for GDB memory access.
  96  * @dump_state: Callback for dumping state.
  97  * @dump_statistics: Callback for dumping statistics.
  98  * @get_arch_id: Callback for getting architecture-dependent CPU ID.
  99  * @get_paging_enabled: Callback for inquiring whether paging is enabled.
 100  * @get_memory_mapping: Callback for obtaining the memory mappings.
 101  * @set_pc: Callback for setting the Program Counter register.
 102  * @synchronize_from_tb: Callback for synchronizing state from a TCG
 103  * #TranslationBlock.
 104  * @handle_mmu_fault: Callback for handling an MMU fault.
 105  * @get_phys_page_debug: Callback for obtaining a physical address.
 106  * @get_phys_page_attrs_debug: Callback for obtaining a physical address and the
 107  *       associated memory transaction attributes to use for the access.
 108  *       CPUs which use memory transaction attributes should implement this
 109  *       instead of get_phys_page_debug.
 110  * @asidx_from_attrs: Callback to return the CPU AddressSpace to use for
 111  *       a memory access with the specified memory transaction attributes.
 112  * @gdb_read_register: Callback for letting GDB read a register.
 113  * @gdb_write_register: Callback for letting GDB write a register.
 114  * @debug_check_watchpoint: Callback: return true if the architectural
 115  *       watchpoint whose address has matched should really fire.
 116  * @debug_excp_handler: Callback for handling debug exceptions.
 117  * @write_elf64_note: Callback for writing a CPU-specific ELF note to a
 118  * 64-bit VM coredump.
 119  * @write_elf32_qemunote: Callback for writing a CPU- and QEMU-specific ELF
 120  * note to a 32-bit VM coredump.
 121  * @write_elf32_note: Callback for writing a CPU-specific ELF note to a
 122  * 32-bit VM coredump.
 123  * @write_elf32_qemunote: Callback for writing a CPU- and QEMU-specific ELF
 124  * note to a 32-bit VM coredump.
 125  * @vmsd: State description for migration.
 126  * @gdb_num_core_regs: Number of core registers accessible to GDB.
 127  * @gdb_core_xml_file: File name for core registers GDB XML description.
 128  * @gdb_stop_before_watchpoint: Indicates whether GDB expects the CPU to stop
 129  *           before the insn which triggers a watchpoint rather than after it.
 130  * @gdb_arch_name: Optional callback that returns the architecture name known
 131  * to GDB. The caller must free the returned string with g_free.
 132  * @cpu_exec_enter: Callback for cpu_exec preparation.
 133  * @cpu_exec_exit: Callback for cpu_exec cleanup.
 134  * @cpu_exec_interrupt: Callback for processing interrupts in cpu_exec.
 135  * @disas_set_info: Setup architecture specific components of disassembly info
 136  *
 137  * Represents a CPU family or model.
 138  */
 139 typedef struct CPUClass {
 140     /*< private >*/
 141     DeviceClass parent_class;
 142     /*< public >*/
 143
 144     ObjectClass *(*class_by_name)(const char *cpu_model);
 145     void (*parse_features)(const char *typename, char *str, Error **errp);
 146
 147     void (*reset)(CPUState *cpu);
 148     int reset_dump_flags;
 149     bool (*has_work)(CPUState *cpu);
 150     void (*do_interrupt)(CPUState *cpu);
 151     CPUUnassignedAccess do_unassigned_access;
 152     void (*do_unaligned_access)(CPUState *cpu, vaddr addr,
 153                                 MMUAccessType access_type,
 154                                 int mmu_idx, uintptr_t retaddr);
 155     bool (*virtio_is_big_endian)(CPUState *cpu);
 156     int (*memory_rw_debug)(CPUState *cpu, vaddr addr,
 157                            uint8_t *buf, int len, bool is_write);
 158     void (*dump_state)(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
 159                        int flags);
 160     void (*dump_statistics)(CPUState *cpu, FILE *f,
 161                             fprintf_function cpu_fprintf, int flags);
 162     int64_t (*get_arch_id)(CPUState *cpu);
 163     bool (*get_paging_enabled)(const CPUState *cpu);
 164     void (*get_memory_mapping)(CPUState *cpu, MemoryMappingList *list,
 165                                Error **errp);
 166     void (*set_pc)(CPUState *cpu, vaddr value);
 167     void (*synchronize_from_tb)(CPUState *cpu, struct TranslationBlock *tb);
 168     int (*handle_mmu_fault)(CPUState *cpu, vaddr address, int rw,
 169                             int mmu_index);
 170     hwaddr (*get_phys_page_debug)(CPUState *cpu, vaddr addr);
 171     hwaddr (*get_phys_page_attrs_debug)(CPUState *cpu, vaddr addr,
 172                                         MemTxAttrs *attrs);
 173     int (*asidx_from_attrs)(CPUState *cpu, MemTxAttrs attrs);
 174     int (*gdb_read_register)(CPUState *cpu, uint8_t *buf, int reg);
 175     int (*gdb_write_register)(CPUState *cpu, uint8_t *buf, int reg);
 176     bool (*debug_check_watchpoint)(CPUState *cpu, CPUWatchpoint *wp);
 177     void (*debug_excp_handler)(CPUState *cpu);
 178
 179     int (*write_elf64_note)(WriteCoreDumpFunction f, CPUState *cpu,
 180                             int cpuid, void *opaque);
 181     int (*write_elf64_qemunote)(WriteCoreDumpFunction f, CPUState *cpu,
 182                                 void *opaque);
 183     int (*write_elf32_note)(WriteCoreDumpFunction f, CPUState *cpu,
 184                             int cpuid, void *opaque);
 185     int (*write_elf32_qemunote)(WriteCoreDumpFunction f, CPUState *cpu,
 186                                 void *opaque);
 187
 188     const struct VMStateDescription *vmsd;
 189     int gdb_num_core_regs;
 190     const char *gdb_core_xml_file;
 191     gchar * (*gdb_arch_name)(CPUState *cpu);
 192     bool gdb_stop_before_watchpoint;
 193
 194     void (*cpu_exec_enter)(CPUState *cpu);
 195     void (*cpu_exec_exit)(CPUState *cpu);
 196     bool (*cpu_exec_interrupt)(CPUState *cpu, int interrupt_request);
 197
 198     void (*disas_set_info)(CPUState *cpu, disassemble_info *info);
 199 } CPUClass;
 200
 201 #ifdef HOST_WORDS_BIGENDIAN
 202 typedef struct icount_decr_u16 {
 203     uint16_t high;
 204     uint16_t low;
 205 } icount_decr_u16;
 206 #else
 207 typedef struct icount_decr_u16 {
 208     uint16_t low;
 209     uint16_t high;
 210 } icount_decr_u16;
 211 #endif
 212
 213 typedef struct CPUBreakpoint {
 214     vaddr pc;
 215     int flags; /* BP_* */
 216     QTAILQ_ENTRY(CPUBreakpoint) entry;
 217 } CPUBreakpoint;
 218
 219 struct CPUWatchpoint {
 220     vaddr vaddr;
 221     vaddr len;
 222     vaddr hitaddr;
 223     MemTxAttrs hitattrs;
 224     int flags; /* BP_* */
 225     QTAILQ_ENTRY(CPUWatchpoint) entry;
 226 };
 227
 228 struct KVMState;
 229 struct kvm_run;
 230
 231 #define TB_JMP_CACHE_BITS 12
 232 #define TB_JMP_CACHE_SIZE (1 << TB_JMP_CACHE_BITS)
 233
 234 /* work queue */
 235 typedef void (*run_on_cpu_func)(CPUState *cpu, void *data);
 236 struct qemu_work_item;
 237
 238 /**
 239  * CPUState:
 240  * @cpu_index: CPU index (informative).
 241  * @nr_cores: Number of cores within this CPU package.
 242  * @nr_threads: Number of threads within this CPU.
 243  * @numa_node: NUMA node this CPU is belonging to.
 244  * @host_tid: Host thread ID.
 245  * @running: #true if CPU is currently running;
 246  * valid under cpu_list_lock.
 247  * @created: Indicates whether the CPU thread has been successfully created.
 248  * @interrupt_request: Indicates a pending interrupt request.
 249  * @halted: Nonzero if the CPU is in suspended state.
 250  * @stop: Indicates a pending stop request.
 251  * @stopped: Indicates the CPU has been artificially stopped.
 252  * @unplug: Indicates a pending CPU unplug request.
 253  * @crash_occurred: Indicates the OS reported a crash (panic) for this CPU
 254  * @tcg_exit_req: Set to force TCG to stop executing linked TBs for this
 255  *           CPU and return to its top level loop.
 256  * @tb_flushed: Indicates the translation buffer has been flushed.
 257  * @singlestep_enabled: Flags for single-stepping.
 258  * @icount_extra: Instructions until next timer event.
 259  * @icount_decr: Number of cycles left, with interrupt flag in high bit.
 260  * This allows a single read-compare-cbranch-write sequence to test
 261  * for both decrementer underflow and exceptions.
 262  * @can_do_io: Nonzero if memory-mapped IO is safe. Deterministic execution
 263  * requires that IO only be performed on the last instruction of a TB
 264  * so that interrupts take effect immediately.
 265  * @cpu_ases: Pointer to array of CPUAddressSpaces (which define the
 266  *            AddressSpaces this CPU has)
 267  * @num_ases: number of CPUAddressSpaces in @cpu_ases
 268  * @as: Pointer to the first AddressSpace, for the convenience of targets which
 269  *      only have a single AddressSpace
 270  * @env_ptr: Pointer to subclass-specific CPUArchState field.
 271  * @gdb_regs: Additional GDB registers.
 272  * @gdb_num_regs: Number of total registers accessible to GDB.
 273  * @gdb_num_g_regs: Number of registers in GDB 'g' packets.
 274  * @next_cpu: Next CPU sharing TB cache.
 275  * @opaque: User data.
 276  * @mem_io_pc: Host Program Counter at which the memory was accessed.
 277  * @mem_io_vaddr: Target virtual address at which the memory was accessed.
 278  * @kvm_fd: vCPU file descriptor for KVM.
 279  * @work_mutex: Lock to prevent multiple access to queued_work_*.
 280  * @queued_work_first: First asynchronous work pending.
 281  * @trace_dstate: Dynamic tracing state of events for this vCPU (bitmask).
 282  *
 283  * State of one CPU core or thread.
 284  */
 285 struct CPUState {
 286     /*< private >*/
 287     DeviceState parent_obj;
 288     /*< public >*/
 289
 290     int nr_cores;
 291     int nr_threads;
 292     int numa_node;
 293
 294     struct QemuThread *thread;
 295 #ifdef _WIN32
 296     HANDLE hThread;
 297 #endif
 298     int thread_id;
 299     uint32_t host_tid;
 300     bool running;
 301     struct QemuCond *halt_cond;
 302     bool thread_kicked;
 303     bool created;
 304     bool stop;
 305     bool stopped;
 306     bool unplug;
 307     bool crash_occurred;
 308     bool exit_request;
 309     bool tb_flushed;
 310     uint32_t interrupt_request;
 311     int singlestep_enabled;
 312     int64_t icount_extra;
 313     sigjmp_buf jmp_env;
 314
 315     QemuMutex work_mutex;
 316     struct qemu_work_item *queued_work_first, *queued_work_last;
 317
 318     CPUAddressSpace *cpu_ases;
 319     int num_ases;
 320     AddressSpace *as;
 321     MemoryRegion *memory;
 322
 323     void *env_ptr; /* CPUArchState */
 324     struct TranslationBlock *tb_jmp_cache[TB_JMP_CACHE_SIZE];
 325     struct GDBRegisterState *gdb_regs;
 326     int gdb_num_regs;
 327     int gdb_num_g_regs;
 328     QTAILQ_ENTRY(CPUState) node;
 329
 330     /* ice debug support */
 331     QTAILQ_HEAD(breakpoints_head, CPUBreakpoint) breakpoints;
 332
 333     QTAILQ_HEAD(watchpoints_head, CPUWatchpoint) watchpoints;
 334     CPUWatchpoint *watchpoint_hit;
 335
 336     void *opaque;
 337
 338     /* In order to avoid passing too many arguments to the MMIO helpers,
 339      * we store some rarely used information in the CPU context.
 340      */
 341     uintptr_t mem_io_pc;
 342     vaddr mem_io_vaddr;
 343
 344     int kvm_fd;
 345     bool kvm_vcpu_dirty;
 346     struct KVMState *kvm_state;
 347     struct kvm_run *kvm_run;
 348
 349     /* Used for events with 'vcpu' and *without* the 'disabled' properties */
 350     DECLARE_BITMAP(trace_dstate, TRACE_VCPU_EVENT_COUNT);
 351
 352     /* TODO Move common fields from CPUArchState here. */
 353     int cpu_index; /* used by alpha TCG */
 354     uint32_t halted; /* used by alpha, cris, ppc TCG */
 355     union {
 356         uint32_t u32;
 357         icount_decr_u16 u16;
 358     } icount_decr;
 359     uint32_t can_do_io;
 360     int32_t exception_index; /* used by m68k TCG */
 361
 362     /* Used to keep track of an outstanding cpu throttle thread for migration
 363      * autoconverge
 364      */
 365     bool throttle_thread_scheduled;
 366
 367     /* Note that this is accessed at the start of every TB via a negative
 368        offset from AREG0.  Leave this field at the end so as to make the
 369        (absolute value) offset as small as possible.  This reduces code
 370        size, especially for hosts without large memory offsets.  */
 371     uint32_t tcg_exit_req;
 372 };
 373
 374 QTAILQ_HEAD(CPUTailQ, CPUState);
 375 extern struct CPUTailQ cpus;
 376 #define CPU_NEXT(cpu) QTAILQ_NEXT(cpu, node)
 377 #define CPU_FOREACH(cpu) QTAILQ_FOREACH(cpu, &cpus, node)
 378 #define CPU_FOREACH_SAFE(cpu, next_cpu) \
 379     QTAILQ_FOREACH_SAFE(cpu, &cpus, node, next_cpu)
 380 #define CPU_FOREACH_REVERSE(cpu) \
 381     QTAILQ_FOREACH_REVERSE(cpu, &cpus, CPUTailQ, node)
 382 #define first_cpu QTAILQ_FIRST(&cpus)
 383
 384 extern __thread CPUState *current_cpu;
 385
 386 /**
 387  * cpu_paging_enabled:
 388  * @cpu: The CPU whose state is to be inspected.
 389  *
 390  * Returns: %true if paging is enabled, %false otherwise.
 391  */
 392 bool cpu_paging_enabled(const CPUState *cpu);
 393
 394 /**
 395  * cpu_get_memory_mapping:
 396  * @cpu: The CPU whose memory mappings are to be obtained.
 397  * @list: Where to write the memory mappings to.
 398  * @errp: Pointer for reporting an #Error.
 399  */
 400 void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list,
 401                             Error **errp);
 402
 403 /**
 404  * cpu_write_elf64_note:
 405  * @f: pointer to a function that writes memory to a file
 406  * @cpu: The CPU whose memory is to be dumped
 407  * @cpuid: ID number of the CPU
 408  * @opaque: pointer to the CPUState struct
 409  */
 410 int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu,
 411                          int cpuid, void *opaque);
 412
 413 /**
 414  * cpu_write_elf64_qemunote:
 415  * @f: pointer to a function that writes memory to a file
 416  * @cpu: The CPU whose memory is to be dumped
 417  * @cpuid: ID number of the CPU
 418  * @opaque: pointer to the CPUState struct
 419  */
 420 int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
 421                              void *opaque);
 422
 423 /**
 424  * cpu_write_elf32_note:
 425  * @f: pointer to a function that writes memory to a file
 426  * @cpu: The CPU whose memory is to be dumped
 427  * @cpuid: ID number of the CPU
 428  * @opaque: pointer to the CPUState struct
 429  */
 430 int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu,
 431                          int cpuid, void *opaque);
 432
 433 /**
 434  * cpu_write_elf32_qemunote:
 435  * @f: pointer to a function that writes memory to a file
 436  * @cpu: The CPU whose memory is to be dumped
 437  * @cpuid: ID number of the CPU
 438  * @opaque: pointer to the CPUState struct
 439  */
 440 int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
 441                              void *opaque);
 442
 443 /**
 444  * CPUDumpFlags:
 445  * @CPU_DUMP_CODE:
 446  * @CPU_DUMP_FPU: dump FPU register state, not just integer
 447  * @CPU_DUMP_CCOP: dump info about TCG QEMU's condition code optimization state
 448  */
 449 enum CPUDumpFlags {
 450     CPU_DUMP_CODE = 0x00010000,
 451     CPU_DUMP_FPU  = 0x00020000,
 452     CPU_DUMP_CCOP = 0x00040000,
 453 };
 454
 455 /**
 456  * cpu_dump_state:
 457  * @cpu: The CPU whose state is to be dumped.
 458  * @f: File to dump to.
 459  * @cpu_fprintf: Function to dump with.
 460  * @flags: Flags what to dump.
 461  *
 462  * Dumps CPU state.
 463  */
 464 void cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
 465                     int flags);
 466
 467 /**
 468  * cpu_dump_statistics:
 469  * @cpu: The CPU whose state is to be dumped.
 470  * @f: File to dump to.
 471  * @cpu_fprintf: Function to dump with.
 472  * @flags: Flags what to dump.
 473  *
 474  * Dumps CPU statistics.
 475  */
 476 void cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
 477                          int flags);
 478
 479 #ifndef CONFIG_USER_ONLY
 480 /**
 481  * cpu_get_phys_page_attrs_debug:
 482  * @cpu: The CPU to obtain the physical page address for.
 483  * @addr: The virtual address.
 484  * @attrs: Updated on return with the memory transaction attributes to use
 485  *         for this access.
 486  *
 487  * Obtains the physical page corresponding to a virtual one, together
 488  * with the corresponding memory transaction attributes to use for the access.
 489  * Use it only for debugging because no protection checks are done.
 490  *
 491  * Returns: Corresponding physical page address or -1 if no page found.
 492  */
 493 static inline hwaddr cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr,
 494                                                    MemTxAttrs *attrs)
 495 {
 496     CPUClass *cc = CPU_GET_CLASS(cpu);
 497
 498     if (cc->get_phys_page_attrs_debug) {
 499         return cc->get_phys_page_attrs_debug(cpu, addr, attrs);
 500     }
 501     /* Fallback for CPUs which don't implement the _attrs_ hook */
 502     *attrs = MEMTXATTRS_UNSPECIFIED;
 503     return cc->get_phys_page_debug(cpu, addr);
 504 }
 505
 506 /**
 507  * cpu_get_phys_page_debug:
 508  * @cpu: The CPU to obtain the physical page address for.
 509  * @addr: The virtual address.
 510  *
 511  * Obtains the physical page corresponding to a virtual one.
 512  * Use it only for debugging because no protection checks are done.
 513  *
 514  * Returns: Corresponding physical page address or -1 if no page found.
 515  */
 516 static inline hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr)
 517 {
 518     MemTxAttrs attrs = {};
 519
 520     return cpu_get_phys_page_attrs_debug(cpu, addr, &attrs);
 521 }
 522
 523 /** cpu_asidx_from_attrs:
 524  * @cpu: CPU
 525  * @attrs: memory transaction attributes
 526  *
 527  * Returns the address space index specifying the CPU AddressSpace
 528  * to use for a memory access with the given transaction attributes.
 529  */
 530 static inline int cpu_asidx_from_attrs(CPUState *cpu, MemTxAttrs attrs)
 531 {
 532     CPUClass *cc = CPU_GET_CLASS(cpu);
 533
 534     if (cc->asidx_from_attrs) {
 535         return cc->asidx_from_attrs(cpu, attrs);
 536     }
 537     return 0;
 538 }
 539 #endif
 540
 541 /**
 542  * cpu_list_add:
 543  * @cpu: The CPU to be added to the list of CPUs.
 544  */
 545 void cpu_list_add(CPUState *cpu);
 546
 547 /**
 548  * cpu_list_remove:
 549  * @cpu: The CPU to be removed from the list of CPUs.
 550  */
 551 void cpu_list_remove(CPUState *cpu);
 552
 553 /**
 554  * cpu_reset:
 555  * @cpu: The CPU whose state is to be reset.
 556  */
 557 void cpu_reset(CPUState *cpu);
 558
 559 /**
 560  * cpu_class_by_name:
 561  * @typename: The CPU base type.
 562  * @cpu_model: The model string without any parameters.
 563  *
 564  * Looks up a CPU #ObjectClass matching name @cpu_model.
 565  *
 566  * Returns: A #CPUClass or %NULL if not matching class is found.
 567  */
 568 ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model);
 569
 570 /**
 571  * cpu_generic_init:
 572  * @typename: The CPU base type.
 573  * @cpu_model: The model string including optional parameters.
 574  *
 575  * Instantiates a CPU, processes optional parameters and realizes the CPU.
 576  *
 577  * Returns: A #CPUState or %NULL if an error occurred.
 578  */
 579 CPUState *cpu_generic_init(const char *typename, const char *cpu_model);
 580
 581 /**
 582  * cpu_has_work:
 583  * @cpu: The vCPU to check.
 584  *
 585  * Checks whether the CPU has work to do.
 586  *
 587  * Returns: %true if the CPU has work, %false otherwise.
 588  */
 589 static inline bool cpu_has_work(CPUState *cpu)
 590 {
 591     CPUClass *cc = CPU_GET_CLASS(cpu);
 592
 593     g_assert(cc->has_work);
 594     return cc->has_work(cpu);
 595 }
 596
 597 /**
 598  * qemu_cpu_is_self:
 599  * @cpu: The vCPU to check against.
 600  *
 601  * Checks whether the caller is executing on the vCPU thread.
 602  *
 603  * Returns: %true if called from @cpu's thread, %false otherwise.
 604  */
 605 bool qemu_cpu_is_self(CPUState *cpu);
 606
 607 /**
 608  * qemu_cpu_kick:
 609  * @cpu: The vCPU to kick.
 610  *
 611  * Kicks @cpu's thread.
 612  */
 613 void qemu_cpu_kick(CPUState *cpu);
 614
 615 /**
 616  * cpu_is_stopped:
 617  * @cpu: The CPU to check.
 618  *
 619  * Checks whether the CPU is stopped.
 620  *
 621  * Returns: %true if run state is not running or if artificially stopped;
 622  * %false otherwise.
 623  */
 624 bool cpu_is_stopped(CPUState *cpu);
 625
 626 /**
 627  * do_run_on_cpu:
 628  * @cpu: The vCPU to run on.
 629  * @func: The function to be executed.
 630  * @data: Data to pass to the function.
 631  * @mutex: Mutex to release while waiting for @func to run.
 632  *
 633  * Used internally in the implementation of run_on_cpu.
 634  */
 635 void do_run_on_cpu(CPUState *cpu, run_on_cpu_func func, void *data,
 636                    QemuMutex *mutex);
 637
 638 /**
 639  * run_on_cpu:
 640  * @cpu: The vCPU to run on.
 641  * @func: The function to be executed.
 642  * @data: Data to pass to the function.
 643  *
 644  * Schedules the function @func for execution on the vCPU @cpu.
 645  */
 646 void run_on_cpu(CPUState *cpu, run_on_cpu_func func, void *data);
 647
 648 /**
 649  * async_run_on_cpu:
 650  * @cpu: The vCPU to run on.
 651  * @func: The function to be executed.
 652  * @data: Data to pass to the function.
 653  *
 654  * Schedules the function @func for execution on the vCPU @cpu asynchronously.
 655  */
 656 void async_run_on_cpu(CPUState *cpu, run_on_cpu_func func, void *data);
 657
 658 /**
 659  * qemu_get_cpu:
 660  * @index: The CPUState@cpu_index value of the CPU to obtain.
 661  *
 662  * Gets a CPU matching @index.
 663  *
 664  * Returns: The CPU or %NULL if there is no matching CPU.
 665  */
 666 CPUState *qemu_get_cpu(int index);
 667
 668 /**
 669  * cpu_exists:
 670  * @id: Guest-exposed CPU ID to lookup.
 671  *
 672  * Search for CPU with specified ID.
 673  *
 674  * Returns: %true - CPU is found, %false - CPU isn't found.
 675  */
 676 bool cpu_exists(int64_t id);
 677
 678 /**
 679  * cpu_throttle_set:
 680  * @new_throttle_pct: Percent of sleep time. Valid range is 1 to 99.
 681  *
 682  * Throttles all vcpus by forcing them to sleep for the given percentage of
 683  * time. A throttle_percentage of 25 corresponds to a 75% duty cycle roughly.
 684  * (example: 10ms sleep for every 30ms awake).
 685  *
 686  * cpu_throttle_set can be called as needed to adjust new_throttle_pct.
 687  * Once the throttling starts, it will remain in effect until cpu_throttle_stop
 688  * is called.
 689  */
 690 void cpu_throttle_set(int new_throttle_pct);
 691
 692 /**
 693  * cpu_throttle_stop:
 694  *
 695  * Stops the vcpu throttling started by cpu_throttle_set.
 696  */
 697 void cpu_throttle_stop(void);
 698
 699 /**
 700  * cpu_throttle_active:
 701  *
 702  * Returns: %true if the vcpus are currently being throttled, %false otherwise.
 703  */
 704 bool cpu_throttle_active(void);
 705
 706 /**
 707  * cpu_throttle_get_percentage:
 708  *
 709  * Returns the vcpu throttle percentage. See cpu_throttle_set for details.
 710  *
 711  * Returns: The throttle percentage in range 1 to 99.
 712  */
 713 int cpu_throttle_get_percentage(void);
 714
 715 #ifndef CONFIG_USER_ONLY
 716
 717 typedef void (*CPUInterruptHandler)(CPUState *, int);
 718
 719 extern CPUInterruptHandler cpu_interrupt_handler;
 720
 721 /**
 722  * cpu_interrupt:
 723  * @cpu: The CPU to set an interrupt on.
 724  * @mask: The interupts to set.
 725  *
 726  * Invokes the interrupt handler.
 727  */
 728 static inline void cpu_interrupt(CPUState *cpu, int mask)
 729 {
 730     cpu_interrupt_handler(cpu, mask);
 731 }
 732
 733 #else /* USER_ONLY */
 734
 735 void cpu_interrupt(CPUState *cpu, int mask);
 736
 737 #endif /* USER_ONLY */
 738
 739 #ifdef CONFIG_SOFTMMU
 740 static inline void cpu_unassigned_access(CPUState *cpu, hwaddr addr,
 741                                          bool is_write, bool is_exec,
 742                                          int opaque, unsigned size)
 743 {
 744     CPUClass *cc = CPU_GET_CLASS(cpu);
 745
 746     if (cc->do_unassigned_access) {
 747         cc->do_unassigned_access(cpu, addr, is_write, is_exec, opaque, size);
 748     }
 749 }
 750
 751 static inline void cpu_unaligned_access(CPUState *cpu, vaddr addr,
 752                                         MMUAccessType access_type,
 753                                         int mmu_idx, uintptr_t retaddr)
 754 {
 755     CPUClass *cc = CPU_GET_CLASS(cpu);
 756
 757     cc->do_unaligned_access(cpu, addr, access_type, mmu_idx, retaddr);
 758 }
 759 #endif
 760
 761 /**
 762  * cpu_set_pc:
 763  * @cpu: The CPU to set the program counter for.
 764  * @addr: Program counter value.
 765  *
 766  * Sets the program counter for a CPU.
 767  */
 768 static inline void cpu_set_pc(CPUState *cpu, vaddr addr)
 769 {
 770     CPUClass *cc = CPU_GET_CLASS(cpu);
 771
 772     cc->set_pc(cpu, addr);
 773 }
 774
 775 /**
 776  * cpu_reset_interrupt:
 777  * @cpu: The CPU to clear the interrupt on.
 778  * @mask: The interrupt mask to clear.
 779  *
 780  * Resets interrupts on the vCPU @cpu.
 781  */
 782 void cpu_reset_interrupt(CPUState *cpu, int mask);
 783
 784 /**
 785  * cpu_exit:
 786  * @cpu: The CPU to exit.
 787  *
 788  * Requests the CPU @cpu to exit execution.
 789  */
 790 void cpu_exit(CPUState *cpu);
 791
 792 /**
 793  * cpu_resume:
 794  * @cpu: The CPU to resume.
 795  *
 796  * Resumes CPU, i.e. puts CPU into runnable state.
 797  */
 798 void cpu_resume(CPUState *cpu);
 799
 800 /**
 801  * cpu_remove:
 802  * @cpu: The CPU to remove.
 803  *
 804  * Requests the CPU to be removed.
 805  */
 806 void cpu_remove(CPUState *cpu);
 807
 808  /**
 809  * cpu_remove_sync:
 810  * @cpu: The CPU to remove.
 811  *
 812  * Requests the CPU to be removed and waits till it is removed.
 813  */
 814 void cpu_remove_sync(CPUState *cpu);
 815
 816 /**
 817  * process_queued_cpu_work() - process all items on CPU work queue
 818  * @cpu: The CPU which work queue to process.
 819  */
 820 void process_queued_cpu_work(CPUState *cpu);
 821
 822 /**
 823  * cpu_exec_start:
 824  * @cpu: The CPU for the current thread.
 825  *
 826  * Record that a CPU has started execution and can be interrupted with
 827  * cpu_exit.
 828  */
 829 void cpu_exec_start(CPUState *cpu);
 830
 831 /**
 832  * cpu_exec_end:
 833  * @cpu: The CPU for the current thread.
 834  *
 835  * Record that a CPU has stopped execution and exclusive sections
 836  * can be executed without interrupting it.
 837  */
 838 void cpu_exec_end(CPUState *cpu);
 839
 840 /**
 841  * start_exclusive:
 842  *
 843  * Wait for a concurrent exclusive section to end, and then start
 844  * a section of work that is run while other CPUs are not running
 845  * between cpu_exec_start and cpu_exec_end.  CPUs that are running
 846  * cpu_exec are exited immediately.  CPUs that call cpu_exec_start
 847  * during the exclusive section go to sleep until this CPU calls
 848  * end_exclusive.
 849  */
 850 void start_exclusive(void);
 851
 852 /**
 853  * end_exclusive:
 854  *
 855  * Concludes an exclusive execution section started by start_exclusive.
 856  */
 857 void end_exclusive(void);
 858
 859 /**
 860  * qemu_init_vcpu:
 861  * @cpu: The vCPU to initialize.
 862  *
 863  * Initializes a vCPU.
 864  */
 865 void qemu_init_vcpu(CPUState *cpu);
 866
 867 #define SSTEP_ENABLE  0x1  /* Enable simulated HW single stepping */
 868 #define SSTEP_NOIRQ   0x2  /* Do not use IRQ while single stepping */
 869 #define SSTEP_NOTIMER 0x4  /* Do not Timers while single stepping */
 870
 871 /**
 872  * cpu_single_step:
 873  * @cpu: CPU to the flags for.
 874  * @enabled: Flags to enable.
 875  *
 876  * Enables or disables single-stepping for @cpu.
 877  */
 878 void cpu_single_step(CPUState *cpu, int enabled);
 879
 880 /* Breakpoint/watchpoint flags */
 881 #define BP_MEM_READ           0x01
 882 #define BP_MEM_WRITE          0x02
 883 #define BP_MEM_ACCESS         (BP_MEM_READ | BP_MEM_WRITE)
 884 #define BP_STOP_BEFORE_ACCESS 0x04
 885 /* 0x08 currently unused */
 886 #define BP_GDB                0x10
 887 #define BP_CPU                0x20
 888 #define BP_ANY                (BP_GDB | BP_CPU)
 889 #define BP_WATCHPOINT_HIT_READ 0x40
 890 #define BP_WATCHPOINT_HIT_WRITE 0x80
 891 #define BP_WATCHPOINT_HIT (BP_WATCHPOINT_HIT_READ | BP_WATCHPOINT_HIT_WRITE)
 892
 893 int cpu_breakpoint_insert(CPUState *cpu, vaddr pc, int flags,
 894                           CPUBreakpoint **breakpoint);
 895 int cpu_breakpoint_remove(CPUState *cpu, vaddr pc, int flags);
 896 void cpu_breakpoint_remove_by_ref(CPUState *cpu, CPUBreakpoint *breakpoint);
 897 void cpu_breakpoint_remove_all(CPUState *cpu, int mask);
 898
 899 /* Return true if PC matches an installed breakpoint.  */
 900 static inline bool cpu_breakpoint_test(CPUState *cpu, vaddr pc, int mask)
 901 {
 902     CPUBreakpoint *bp;
 903
 904     if (unlikely(!QTAILQ_EMPTY(&cpu->breakpoints))) {
 905         QTAILQ_FOREACH(bp, &cpu->breakpoints, entry) {
 906             if (bp->pc == pc && (bp->flags & mask)) {
 907                 return true;
 908             }
 909         }
 910     }
 911     return false;
 912 }
 913
 914 int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
 915                           int flags, CPUWatchpoint **watchpoint);
 916 int cpu_watchpoint_remove(CPUState *cpu, vaddr addr,
 917                           vaddr len, int flags);
 918 void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint);
 919 void cpu_watchpoint_remove_all(CPUState *cpu, int mask);
 920
 921 /**
 922  * cpu_get_address_space:
 923  * @cpu: CPU to get address space from
 924  * @asidx: index identifying which address space to get
 925  *
 926  * Return the requested address space of this CPU. @asidx
 927  * specifies which address space to read.
 928  */
 929 AddressSpace *cpu_get_address_space(CPUState *cpu, int asidx);
 930
 931 void QEMU_NORETURN cpu_abort(CPUState *cpu, const char *fmt, ...)
 932     GCC_FMT_ATTR(2, 3);
 933 void cpu_exec_exit(CPUState *cpu);
 934
 935 #ifdef CONFIG_SOFTMMU
 936 extern const struct VMStateDescription vmstate_cpu_common;
 937 #else
 938 #define vmstate_cpu_common vmstate_dummy
 939 #endif
 940
 941 #define VMSTATE_CPU() {                                                     \
 942     .name = "parent_obj",                                                   \
 943     .size = sizeof(CPUState),                                               \
 944     .vmsd = &vmstate_cpu_common,                                            \
 945     .flags = VMS_STRUCT,                                                    \
 946     .offset = 0,                                                            \
 947 }
 948
 949 #define UNASSIGNED_CPU_INDEX -1
 950
 951 #endif