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drm: Turn DRM_MODE_SUBCONNECTOR_xx definitions into an enum
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1 /*
2 * Copyright (c) 2007 Dave Airlie <airlied@linux.ie>
3 * Copyright (c) 2007 Jakob Bornecrantz <wallbraker@gmail.com>
4 * Copyright (c) 2008 Red Hat Inc.
5 * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA
6 * Copyright (c) 2007-2008 Intel Corporation
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
21 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * IN THE SOFTWARE.
25 */
26
27 #ifndef _DRM_MODE_H
28 #define _DRM_MODE_H
29
30 #include "drm.h"
31
32 #if defined(__cplusplus)
33 extern "C" {
34 #endif
35
36 #define DRM_DISPLAY_INFO_LEN 32
37 #define DRM_CONNECTOR_NAME_LEN 32
38 #define DRM_DISPLAY_MODE_LEN 32
39 #define DRM_PROP_NAME_LEN 32
40
41 #define DRM_MODE_TYPE_BUILTIN (1<<0)
42 #define DRM_MODE_TYPE_CLOCK_C ((1<<1) | DRM_MODE_TYPE_BUILTIN)
43 #define DRM_MODE_TYPE_CRTC_C ((1<<2) | DRM_MODE_TYPE_BUILTIN)
44 #define DRM_MODE_TYPE_PREFERRED (1<<3)
45 #define DRM_MODE_TYPE_DEFAULT (1<<4)
46 #define DRM_MODE_TYPE_USERDEF (1<<5)
47 #define DRM_MODE_TYPE_DRIVER (1<<6)
48
49 /* Video mode flags */
50 /* bit compatible with the xorg definitions. */
51 #define DRM_MODE_FLAG_PHSYNC (1<<0)
52 #define DRM_MODE_FLAG_NHSYNC (1<<1)
53 #define DRM_MODE_FLAG_PVSYNC (1<<2)
54 #define DRM_MODE_FLAG_NVSYNC (1<<3)
55 #define DRM_MODE_FLAG_INTERLACE (1<<4)
56 #define DRM_MODE_FLAG_DBLSCAN (1<<5)
57 #define DRM_MODE_FLAG_CSYNC (1<<6)
58 #define DRM_MODE_FLAG_PCSYNC (1<<7)
59 #define DRM_MODE_FLAG_NCSYNC (1<<8)
60 #define DRM_MODE_FLAG_HSKEW (1<<9) /* hskew provided */
61 #define DRM_MODE_FLAG_BCAST (1<<10)
62 #define DRM_MODE_FLAG_PIXMUX (1<<11)
63 #define DRM_MODE_FLAG_DBLCLK (1<<12)
64 #define DRM_MODE_FLAG_CLKDIV2 (1<<13)
65 /*
66 * When adding a new stereo mode don't forget to adjust DRM_MODE_FLAGS_3D_MAX
67 * (define not exposed to user space).
68 */
69 #define DRM_MODE_FLAG_3D_MASK (0x1f<<14)
70 #define DRM_MODE_FLAG_3D_NONE (0<<14)
71 #define DRM_MODE_FLAG_3D_FRAME_PACKING (1<<14)
72 #define DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE (2<<14)
73 #define DRM_MODE_FLAG_3D_LINE_ALTERNATIVE (3<<14)
74 #define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL (4<<14)
75 #define DRM_MODE_FLAG_3D_L_DEPTH (5<<14)
76 #define DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH (6<<14)
77 #define DRM_MODE_FLAG_3D_TOP_AND_BOTTOM (7<<14)
78 #define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF (8<<14)
79
80
81 /* DPMS flags */
82 /* bit compatible with the xorg definitions. */
83 #define DRM_MODE_DPMS_ON 0
84 #define DRM_MODE_DPMS_STANDBY 1
85 #define DRM_MODE_DPMS_SUSPEND 2
86 #define DRM_MODE_DPMS_OFF 3
87
88 /* Scaling mode options */
89 #define DRM_MODE_SCALE_NONE 0 /* Unmodified timing (display or
90 software can still scale) */
91 #define DRM_MODE_SCALE_FULLSCREEN 1 /* Full screen, ignore aspect */
92 #define DRM_MODE_SCALE_CENTER 2 /* Centered, no scaling */
93 #define DRM_MODE_SCALE_ASPECT 3 /* Full screen, preserve aspect */
94
95 /* Picture aspect ratio options */
96 #define DRM_MODE_PICTURE_ASPECT_NONE 0
97 #define DRM_MODE_PICTURE_ASPECT_4_3 1
98 #define DRM_MODE_PICTURE_ASPECT_16_9 2
99
100 /* Dithering mode options */
101 #define DRM_MODE_DITHERING_OFF 0
102 #define DRM_MODE_DITHERING_ON 1
103 #define DRM_MODE_DITHERING_AUTO 2
104
105 /* Dirty info options */
106 #define DRM_MODE_DIRTY_OFF 0
107 #define DRM_MODE_DIRTY_ON 1
108 #define DRM_MODE_DIRTY_ANNOTATE 2
109
110 struct drm_mode_modeinfo {
111 __u32 clock;
112 __u16 hdisplay;
113 __u16 hsync_start;
114 __u16 hsync_end;
115 __u16 htotal;
116 __u16 hskew;
117 __u16 vdisplay;
118 __u16 vsync_start;
119 __u16 vsync_end;
120 __u16 vtotal;
121 __u16 vscan;
122
123 __u32 vrefresh;
124
125 __u32 flags;
126 __u32 type;
127 char name[DRM_DISPLAY_MODE_LEN];
128 };
129
130 struct drm_mode_card_res {
131 __u64 fb_id_ptr;
132 __u64 crtc_id_ptr;
133 __u64 connector_id_ptr;
134 __u64 encoder_id_ptr;
135 __u32 count_fbs;
136 __u32 count_crtcs;
137 __u32 count_connectors;
138 __u32 count_encoders;
139 __u32 min_width;
140 __u32 max_width;
141 __u32 min_height;
142 __u32 max_height;
143 };
144
145 struct drm_mode_crtc {
146 __u64 set_connectors_ptr;
147 __u32 count_connectors;
148
149 __u32 crtc_id; /**< Id */
150 __u32 fb_id; /**< Id of framebuffer */
151
152 __u32 x; /**< x Position on the framebuffer */
153 __u32 y; /**< y Position on the framebuffer */
154
155 __u32 gamma_size;
156 __u32 mode_valid;
157 struct drm_mode_modeinfo mode;
158 };
159
160 #define DRM_MODE_PRESENT_TOP_FIELD (1<<0)
161 #define DRM_MODE_PRESENT_BOTTOM_FIELD (1<<1)
162
163 /* Planes blend with or override other bits on the CRTC */
164 struct drm_mode_set_plane {
165 __u32 plane_id;
166 __u32 crtc_id;
167 __u32 fb_id; /* fb object contains surface format type */
168 __u32 flags; /* see above flags */
169
170 /* Signed dest location allows it to be partially off screen */
171 __s32 crtc_x;
172 __s32 crtc_y;
173 __u32 crtc_w;
174 __u32 crtc_h;
175
176 /* Source values are 16.16 fixed point */
177 __u32 src_x;
178 __u32 src_y;
179 __u32 src_h;
180 __u32 src_w;
181 };
182
183 struct drm_mode_get_plane {
184 __u32 plane_id;
185
186 __u32 crtc_id;
187 __u32 fb_id;
188
189 __u32 possible_crtcs;
190 __u32 gamma_size;
191
192 __u32 count_format_types;
193 __u64 format_type_ptr;
194 };
195
196 struct drm_mode_get_plane_res {
197 __u64 plane_id_ptr;
198 __u32 count_planes;
199 };
200
201 #define DRM_MODE_ENCODER_NONE 0
202 #define DRM_MODE_ENCODER_DAC 1
203 #define DRM_MODE_ENCODER_TMDS 2
204 #define DRM_MODE_ENCODER_LVDS 3
205 #define DRM_MODE_ENCODER_TVDAC 4
206 #define DRM_MODE_ENCODER_VIRTUAL 5
207 #define DRM_MODE_ENCODER_DSI 6
208 #define DRM_MODE_ENCODER_DPMST 7
209 #define DRM_MODE_ENCODER_DPI 8
210
211 struct drm_mode_get_encoder {
212 __u32 encoder_id;
213 __u32 encoder_type;
214
215 __u32 crtc_id; /**< Id of crtc */
216
217 __u32 possible_crtcs;
218 __u32 possible_clones;
219 };
220
221 /* This is for connectors with multiple signal types. */
222 /* Try to match DRM_MODE_CONNECTOR_X as closely as possible. */
223 enum drm_mode_subconnector {
224 DRM_MODE_SUBCONNECTOR_Automatic = 0,
225 DRM_MODE_SUBCONNECTOR_Unknown = 0,
226 DRM_MODE_SUBCONNECTOR_DVID = 3,
227 DRM_MODE_SUBCONNECTOR_DVIA = 4,
228 DRM_MODE_SUBCONNECTOR_Composite = 5,
229 DRM_MODE_SUBCONNECTOR_SVIDEO = 6,
230 DRM_MODE_SUBCONNECTOR_Component = 8,
231 DRM_MODE_SUBCONNECTOR_SCART = 9,
232 };
233
234 #define DRM_MODE_CONNECTOR_Unknown 0
235 #define DRM_MODE_CONNECTOR_VGA 1
236 #define DRM_MODE_CONNECTOR_DVII 2
237 #define DRM_MODE_CONNECTOR_DVID 3
238 #define DRM_MODE_CONNECTOR_DVIA 4
239 #define DRM_MODE_CONNECTOR_Composite 5
240 #define DRM_MODE_CONNECTOR_SVIDEO 6
241 #define DRM_MODE_CONNECTOR_LVDS 7
242 #define DRM_MODE_CONNECTOR_Component 8
243 #define DRM_MODE_CONNECTOR_9PinDIN 9
244 #define DRM_MODE_CONNECTOR_DisplayPort 10
245 #define DRM_MODE_CONNECTOR_HDMIA 11
246 #define DRM_MODE_CONNECTOR_HDMIB 12
247 #define DRM_MODE_CONNECTOR_TV 13
248 #define DRM_MODE_CONNECTOR_eDP 14
249 #define DRM_MODE_CONNECTOR_VIRTUAL 15
250 #define DRM_MODE_CONNECTOR_DSI 16
251 #define DRM_MODE_CONNECTOR_DPI 17
252
253 struct drm_mode_get_connector {
254
255 __u64 encoders_ptr;
256 __u64 modes_ptr;
257 __u64 props_ptr;
258 __u64 prop_values_ptr;
259
260 __u32 count_modes;
261 __u32 count_props;
262 __u32 count_encoders;
263
264 __u32 encoder_id; /**< Current Encoder */
265 __u32 connector_id; /**< Id */
266 __u32 connector_type;
267 __u32 connector_type_id;
268
269 __u32 connection;
270 __u32 mm_width; /**< width in millimeters */
271 __u32 mm_height; /**< height in millimeters */
272 __u32 subpixel;
273
274 __u32 pad;
275 };
276
277 #define DRM_MODE_PROP_PENDING (1<<0)
278 #define DRM_MODE_PROP_RANGE (1<<1)
279 #define DRM_MODE_PROP_IMMUTABLE (1<<2)
280 #define DRM_MODE_PROP_ENUM (1<<3) /* enumerated type with text strings */
281 #define DRM_MODE_PROP_BLOB (1<<4)
282 #define DRM_MODE_PROP_BITMASK (1<<5) /* bitmask of enumerated types */
283
284 /* non-extended types: legacy bitmask, one bit per type: */
285 #define DRM_MODE_PROP_LEGACY_TYPE ( \
286 DRM_MODE_PROP_RANGE | \
287 DRM_MODE_PROP_ENUM | \
288 DRM_MODE_PROP_BLOB | \
289 DRM_MODE_PROP_BITMASK)
290
291 /* extended-types: rather than continue to consume a bit per type,
292 * grab a chunk of the bits to use as integer type id.
293 */
294 #define DRM_MODE_PROP_EXTENDED_TYPE 0x0000ffc0
295 #define DRM_MODE_PROP_TYPE(n) ((n) << 6)
296 #define DRM_MODE_PROP_OBJECT DRM_MODE_PROP_TYPE(1)
297 #define DRM_MODE_PROP_SIGNED_RANGE DRM_MODE_PROP_TYPE(2)
298
299 /* the PROP_ATOMIC flag is used to hide properties from userspace that
300 * is not aware of atomic properties. This is mostly to work around
301 * older userspace (DDX drivers) that read/write each prop they find,
302 * witout being aware that this could be triggering a lengthy modeset.
303 */
304 #define DRM_MODE_PROP_ATOMIC 0x80000000
305
306 struct drm_mode_property_enum {
307 __u64 value;
308 char name[DRM_PROP_NAME_LEN];
309 };
310
311 struct drm_mode_get_property {
312 __u64 values_ptr; /* values and blob lengths */
313 __u64 enum_blob_ptr; /* enum and blob id ptrs */
314
315 __u32 prop_id;
316 __u32 flags;
317 char name[DRM_PROP_NAME_LEN];
318
319 __u32 count_values;
320 /* This is only used to count enum values, not blobs. The _blobs is
321 * simply because of a historical reason, i.e. backwards compat. */
322 __u32 count_enum_blobs;
323 };
324
325 struct drm_mode_connector_set_property {
326 __u64 value;
327 __u32 prop_id;
328 __u32 connector_id;
329 };
330
331 #define DRM_MODE_OBJECT_CRTC 0xcccccccc
332 #define DRM_MODE_OBJECT_CONNECTOR 0xc0c0c0c0
333 #define DRM_MODE_OBJECT_ENCODER 0xe0e0e0e0
334 #define DRM_MODE_OBJECT_MODE 0xdededede
335 #define DRM_MODE_OBJECT_PROPERTY 0xb0b0b0b0
336 #define DRM_MODE_OBJECT_FB 0xfbfbfbfb
337 #define DRM_MODE_OBJECT_BLOB 0xbbbbbbbb
338 #define DRM_MODE_OBJECT_PLANE 0xeeeeeeee
339 #define DRM_MODE_OBJECT_ANY 0
340
341 struct drm_mode_obj_get_properties {
342 __u64 props_ptr;
343 __u64 prop_values_ptr;
344 __u32 count_props;
345 __u32 obj_id;
346 __u32 obj_type;
347 };
348
349 struct drm_mode_obj_set_property {
350 __u64 value;
351 __u32 prop_id;
352 __u32 obj_id;
353 __u32 obj_type;
354 };
355
356 struct drm_mode_get_blob {
357 __u32 blob_id;
358 __u32 length;
359 __u64 data;
360 };
361
362 struct drm_mode_fb_cmd {
363 __u32 fb_id;
364 __u32 width;
365 __u32 height;
366 __u32 pitch;
367 __u32 bpp;
368 __u32 depth;
369 /* driver specific handle */
370 __u32 handle;
371 };
372
373 #define DRM_MODE_FB_INTERLACED (1<<0) /* for interlaced framebuffers */
374 #define DRM_MODE_FB_MODIFIERS (1<<1) /* enables ->modifer[] */
375
376 struct drm_mode_fb_cmd2 {
377 __u32 fb_id;
378 __u32 width;
379 __u32 height;
380 __u32 pixel_format; /* fourcc code from drm_fourcc.h */
381 __u32 flags; /* see above flags */
382
383 /*
384 * In case of planar formats, this ioctl allows up to 4
385 * buffer objects with offsets and pitches per plane.
386 * The pitch and offset order is dictated by the fourcc,
387 * e.g. NV12 (http://fourcc.org/yuv.php#NV12) is described as:
388 *
389 * YUV 4:2:0 image with a plane of 8 bit Y samples
390 * followed by an interleaved U/V plane containing
391 * 8 bit 2x2 subsampled colour difference samples.
392 *
393 * So it would consist of Y as offsets[0] and UV as
394 * offsets[1]. Note that offsets[0] will generally
395 * be 0 (but this is not required).
396 *
397 * To accommodate tiled, compressed, etc formats, a per-plane
398 * modifier can be specified. The default value of zero
399 * indicates "native" format as specified by the fourcc.
400 * Vendor specific modifier token. This allows, for example,
401 * different tiling/swizzling pattern on different planes.
402 * See discussion above of DRM_FORMAT_MOD_xxx.
403 */
404 __u32 handles[4];
405 __u32 pitches[4]; /* pitch for each plane */
406 __u32 offsets[4]; /* offset of each plane */
407 __u64 modifier[4]; /* ie, tiling, compressed (per plane) */
408 };
409
410 #define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01
411 #define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02
412 #define DRM_MODE_FB_DIRTY_FLAGS 0x03
413
414 #define DRM_MODE_FB_DIRTY_MAX_CLIPS 256
415
416 /*
417 * Mark a region of a framebuffer as dirty.
418 *
419 * Some hardware does not automatically update display contents
420 * as a hardware or software draw to a framebuffer. This ioctl
421 * allows userspace to tell the kernel and the hardware what
422 * regions of the framebuffer have changed.
423 *
424 * The kernel or hardware is free to update more then just the
425 * region specified by the clip rects. The kernel or hardware
426 * may also delay and/or coalesce several calls to dirty into a
427 * single update.
428 *
429 * Userspace may annotate the updates, the annotates are a
430 * promise made by the caller that the change is either a copy
431 * of pixels or a fill of a single color in the region specified.
432 *
433 * If the DRM_MODE_FB_DIRTY_ANNOTATE_COPY flag is given then
434 * the number of updated regions are half of num_clips given,
435 * where the clip rects are paired in src and dst. The width and
436 * height of each one of the pairs must match.
437 *
438 * If the DRM_MODE_FB_DIRTY_ANNOTATE_FILL flag is given the caller
439 * promises that the region specified of the clip rects is filled
440 * completely with a single color as given in the color argument.
441 */
442
443 struct drm_mode_fb_dirty_cmd {
444 __u32 fb_id;
445 __u32 flags;
446 __u32 color;
447 __u32 num_clips;
448 __u64 clips_ptr;
449 };
450
451 struct drm_mode_mode_cmd {
452 __u32 connector_id;
453 struct drm_mode_modeinfo mode;
454 };
455
456 #define DRM_MODE_CURSOR_BO 0x01
457 #define DRM_MODE_CURSOR_MOVE 0x02
458 #define DRM_MODE_CURSOR_FLAGS 0x03
459
460 /*
461 * depending on the value in flags different members are used.
462 *
463 * CURSOR_BO uses
464 * crtc_id
465 * width
466 * height
467 * handle - if 0 turns the cursor off
468 *
469 * CURSOR_MOVE uses
470 * crtc_id
471 * x
472 * y
473 */
474 struct drm_mode_cursor {
475 __u32 flags;
476 __u32 crtc_id;
477 __s32 x;
478 __s32 y;
479 __u32 width;
480 __u32 height;
481 /* driver specific handle */
482 __u32 handle;
483 };
484
485 struct drm_mode_cursor2 {
486 __u32 flags;
487 __u32 crtc_id;
488 __s32 x;
489 __s32 y;
490 __u32 width;
491 __u32 height;
492 /* driver specific handle */
493 __u32 handle;
494 __s32 hot_x;
495 __s32 hot_y;
496 };
497
498 struct drm_mode_crtc_lut {
499 __u32 crtc_id;
500 __u32 gamma_size;
501
502 /* pointers to arrays */
503 __u64 red;
504 __u64 green;
505 __u64 blue;
506 };
507
508 struct drm_color_ctm {
509 /* Conversion matrix in S31.32 format. */
510 __s64 matrix[9];
511 };
512
513 struct drm_color_lut {
514 /*
515 * Data is U0.16 fixed point format.
516 */
517 __u16 red;
518 __u16 green;
519 __u16 blue;
520 __u16 reserved;
521 };
522
523 #define DRM_MODE_PAGE_FLIP_EVENT 0x01
524 #define DRM_MODE_PAGE_FLIP_ASYNC 0x02
525 #define DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE 0x4
526 #define DRM_MODE_PAGE_FLIP_TARGET_RELATIVE 0x8
527 #define DRM_MODE_PAGE_FLIP_TARGET (DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE | \
528 DRM_MODE_PAGE_FLIP_TARGET_RELATIVE)
529 #define DRM_MODE_PAGE_FLIP_FLAGS (DRM_MODE_PAGE_FLIP_EVENT | \
530 DRM_MODE_PAGE_FLIP_ASYNC | \
531 DRM_MODE_PAGE_FLIP_TARGET)
532
533 /*
534 * Request a page flip on the specified crtc.
535 *
536 * This ioctl will ask KMS to schedule a page flip for the specified
537 * crtc. Once any pending rendering targeting the specified fb (as of
538 * ioctl time) has completed, the crtc will be reprogrammed to display
539 * that fb after the next vertical refresh. The ioctl returns
540 * immediately, but subsequent rendering to the current fb will block
541 * in the execbuffer ioctl until the page flip happens. If a page
542 * flip is already pending as the ioctl is called, EBUSY will be
543 * returned.
544 *
545 * Flag DRM_MODE_PAGE_FLIP_EVENT requests that drm sends back a vblank
546 * event (see drm.h: struct drm_event_vblank) when the page flip is
547 * done. The user_data field passed in with this ioctl will be
548 * returned as the user_data field in the vblank event struct.
549 *
550 * Flag DRM_MODE_PAGE_FLIP_ASYNC requests that the flip happen
551 * 'as soon as possible', meaning that it not delay waiting for vblank.
552 * This may cause tearing on the screen.
553 *
554 * The reserved field must be zero.
555 */
556
557 struct drm_mode_crtc_page_flip {
558 __u32 crtc_id;
559 __u32 fb_id;
560 __u32 flags;
561 __u32 reserved;
562 __u64 user_data;
563 };
564
565 /*
566 * Request a page flip on the specified crtc.
567 *
568 * Same as struct drm_mode_crtc_page_flip, but supports new flags and
569 * re-purposes the reserved field:
570 *
571 * The sequence field must be zero unless either of the
572 * DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE/RELATIVE flags is specified. When
573 * the ABSOLUTE flag is specified, the sequence field denotes the absolute
574 * vblank sequence when the flip should take effect. When the RELATIVE
575 * flag is specified, the sequence field denotes the relative (to the
576 * current one when the ioctl is called) vblank sequence when the flip
577 * should take effect. NOTE: DRM_IOCTL_WAIT_VBLANK must still be used to
578 * make sure the vblank sequence before the target one has passed before
579 * calling this ioctl. The purpose of the
580 * DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE/RELATIVE flags is merely to clarify
581 * the target for when code dealing with a page flip runs during a
582 * vertical blank period.
583 */
584
585 struct drm_mode_crtc_page_flip_target {
586 __u32 crtc_id;
587 __u32 fb_id;
588 __u32 flags;
589 __u32 sequence;
590 __u64 user_data;
591 };
592
593 /* create a dumb scanout buffer */
594 struct drm_mode_create_dumb {
595 __u32 height;
596 __u32 width;
597 __u32 bpp;
598 __u32 flags;
599 /* handle, pitch, size will be returned */
600 __u32 handle;
601 __u32 pitch;
602 __u64 size;
603 };
604
605 /* set up for mmap of a dumb scanout buffer */
606 struct drm_mode_map_dumb {
607 /** Handle for the object being mapped. */
608 __u32 handle;
609 __u32 pad;
610 /**
611 * Fake offset to use for subsequent mmap call
612 *
613 * This is a fixed-size type for 32/64 compatibility.
614 */
615 __u64 offset;
616 };
617
618 struct drm_mode_destroy_dumb {
619 __u32 handle;
620 };
621
622 /* page-flip flags are valid, plus: */
623 #define DRM_MODE_ATOMIC_TEST_ONLY 0x0100
624 #define DRM_MODE_ATOMIC_NONBLOCK 0x0200
625 #define DRM_MODE_ATOMIC_ALLOW_MODESET 0x0400
626
627 #define DRM_MODE_ATOMIC_FLAGS (\
628 DRM_MODE_PAGE_FLIP_EVENT |\
629 DRM_MODE_PAGE_FLIP_ASYNC |\
630 DRM_MODE_ATOMIC_TEST_ONLY |\
631 DRM_MODE_ATOMIC_NONBLOCK |\
632 DRM_MODE_ATOMIC_ALLOW_MODESET)
633
634 struct drm_mode_atomic {
635 __u32 flags;
636 __u32 count_objs;
637 __u64 objs_ptr;
638 __u64 count_props_ptr;
639 __u64 props_ptr;
640 __u64 prop_values_ptr;
641 __u64 reserved;
642 __u64 user_data;
643 };
644
645 /**
646 * Create a new 'blob' data property, copying length bytes from data pointer,
647 * and returning new blob ID.
648 */
649 struct drm_mode_create_blob {
650 /** Pointer to data to copy. */
651 __u64 data;
652 /** Length of data to copy. */
653 __u32 length;
654 /** Return: new property ID. */
655 __u32 blob_id;
656 };
657
658 /**
659 * Destroy a user-created blob property.
660 */
661 struct drm_mode_destroy_blob {
662 __u32 blob_id;
663 };
664
665 #if defined(__cplusplus)
666 }
667 #endif
668
669 #endif