include/uapi/linux/perf_event.h

   1 /*
   2  * Performance events:
   3  *
   4  *    Copyright (C) 2008-2009, Thomas Gleixner <tglx@linutronix.de>
   5  *    Copyright (C) 2008-2011, Red Hat, Inc., Ingo Molnar
   6  *    Copyright (C) 2008-2011, Red Hat, Inc., Peter Zijlstra
   7  *
   8  * Data type definitions, declarations, prototypes.
   9  *
  10  *    Started by: Thomas Gleixner and Ingo Molnar
  11  *
  12  * For licencing details see kernel-base/COPYING
  13  */
  14 #ifndef _UAPI_LINUX_PERF_EVENT_H
  15 #define _UAPI_LINUX_PERF_EVENT_H
  16
  17 #include <linux/types.h>
  18 #include <linux/ioctl.h>
  19 #include <asm/byteorder.h>
  20
  21 /*
  22  * User-space ABI bits:
  23  */
  24
  25 /*
  26  * attr.type
  27  */
  28 enum perf_type_id {
  29         PERF_TYPE_HARDWARE                      = 0,
  30         PERF_TYPE_SOFTWARE                      = 1,
  31         PERF_TYPE_TRACEPOINT                    = 2,
  32         PERF_TYPE_HW_CACHE                      = 3,
  33         PERF_TYPE_RAW                           = 4,
  34         PERF_TYPE_BREAKPOINT                    = 5,
  35
  36         PERF_TYPE_MAX,                          /* non-ABI */
  37 };
  38
  39 /*
  40  * Generalized performance event event_id types, used by the
  41  * attr.event_id parameter of the sys_perf_event_open()
  42  * syscall:
  43  */
  44 enum perf_hw_id {
  45         /*
  46          * Common hardware events, generalized by the kernel:
  47          */
  48         PERF_COUNT_HW_CPU_CYCLES                = 0,
  49         PERF_COUNT_HW_INSTRUCTIONS              = 1,
  50         PERF_COUNT_HW_CACHE_REFERENCES          = 2,
  51         PERF_COUNT_HW_CACHE_MISSES              = 3,
  52         PERF_COUNT_HW_BRANCH_INSTRUCTIONS       = 4,
  53         PERF_COUNT_HW_BRANCH_MISSES             = 5,
  54         PERF_COUNT_HW_BUS_CYCLES                = 6,
  55         PERF_COUNT_HW_STALLED_CYCLES_FRONTEND   = 7,
  56         PERF_COUNT_HW_STALLED_CYCLES_BACKEND    = 8,
  57         PERF_COUNT_HW_REF_CPU_CYCLES            = 9,
  58
  59         PERF_COUNT_HW_MAX,                      /* non-ABI */
  60 };
  61
  62 /*
  63  * Generalized hardware cache events:
  64  *
  65  *       { L1-D, L1-I, LLC, ITLB, DTLB, BPU, NODE } x
  66  *       { read, write, prefetch } x
  67  *       { accesses, misses }
  68  */
  69 enum perf_hw_cache_id {
  70         PERF_COUNT_HW_CACHE_L1D                 = 0,
  71         PERF_COUNT_HW_CACHE_L1I                 = 1,
  72         PERF_COUNT_HW_CACHE_LL                  = 2,
  73         PERF_COUNT_HW_CACHE_DTLB                = 3,
  74         PERF_COUNT_HW_CACHE_ITLB                = 4,
  75         PERF_COUNT_HW_CACHE_BPU                 = 5,
  76         PERF_COUNT_HW_CACHE_NODE                = 6,
  77
  78         PERF_COUNT_HW_CACHE_MAX,                /* non-ABI */
  79 };
  80
  81 enum perf_hw_cache_op_id {
  82         PERF_COUNT_HW_CACHE_OP_READ             = 0,
  83         PERF_COUNT_HW_CACHE_OP_WRITE            = 1,
  84         PERF_COUNT_HW_CACHE_OP_PREFETCH         = 2,
  85
  86         PERF_COUNT_HW_CACHE_OP_MAX,             /* non-ABI */
  87 };
  88
  89 enum perf_hw_cache_op_result_id {
  90         PERF_COUNT_HW_CACHE_RESULT_ACCESS       = 0,
  91         PERF_COUNT_HW_CACHE_RESULT_MISS         = 1,
  92
  93         PERF_COUNT_HW_CACHE_RESULT_MAX,         /* non-ABI */
  94 };
  95
  96 /*
  97  * Special "software" events provided by the kernel, even if the hardware
  98  * does not support performance events. These events measure various
  99  * physical and sw events of the kernel (and allow the profiling of them as
 100  * well):
 101  */
 102 enum perf_sw_ids {
 103         PERF_COUNT_SW_CPU_CLOCK                 = 0,
 104         PERF_COUNT_SW_TASK_CLOCK                = 1,
 105         PERF_COUNT_SW_PAGE_FAULTS               = 2,
 106         PERF_COUNT_SW_CONTEXT_SWITCHES          = 3,
 107         PERF_COUNT_SW_CPU_MIGRATIONS            = 4,
 108         PERF_COUNT_SW_PAGE_FAULTS_MIN           = 5,
 109         PERF_COUNT_SW_PAGE_FAULTS_MAJ           = 6,
 110         PERF_COUNT_SW_ALIGNMENT_FAULTS          = 7,
 111         PERF_COUNT_SW_EMULATION_FAULTS          = 8,
 112         PERF_COUNT_SW_DUMMY                     = 9,
 113         PERF_COUNT_SW_BPF_OUTPUT                = 10,
 114
 115         PERF_COUNT_SW_MAX,                      /* non-ABI */
 116 };
 117
 118 /*
 119  * Bits that can be set in attr.sample_type to request information
 120  * in the overflow packets.
 121  */
 122 enum perf_event_sample_format {
 123         PERF_SAMPLE_IP                          = 1U << 0,
 124         PERF_SAMPLE_TID                         = 1U << 1,
 125         PERF_SAMPLE_TIME                        = 1U << 2,
 126         PERF_SAMPLE_ADDR                        = 1U << 3,
 127         PERF_SAMPLE_READ                        = 1U << 4,
 128         PERF_SAMPLE_CALLCHAIN                   = 1U << 5,
 129         PERF_SAMPLE_ID                          = 1U << 6,
 130         PERF_SAMPLE_CPU                         = 1U << 7,
 131         PERF_SAMPLE_PERIOD                      = 1U << 8,
 132         PERF_SAMPLE_STREAM_ID                   = 1U << 9,
 133         PERF_SAMPLE_RAW                         = 1U << 10,
 134         PERF_SAMPLE_BRANCH_STACK                = 1U << 11,
 135         PERF_SAMPLE_REGS_USER                   = 1U << 12,
 136         PERF_SAMPLE_STACK_USER                  = 1U << 13,
 137         PERF_SAMPLE_WEIGHT                      = 1U << 14,
 138         PERF_SAMPLE_DATA_SRC                    = 1U << 15,
 139         PERF_SAMPLE_IDENTIFIER                  = 1U << 16,
 140         PERF_SAMPLE_TRANSACTION                 = 1U << 17,
 141         PERF_SAMPLE_REGS_INTR                   = 1U << 18,
 142
 143         PERF_SAMPLE_MAX = 1U << 19,             /* non-ABI */
 144 };
 145
 146 /*
 147  * values to program into branch_sample_type when PERF_SAMPLE_BRANCH is set
 148  *
 149  * If the user does not pass priv level information via branch_sample_type,
 150  * the kernel uses the event's priv level. Branch and event priv levels do
 151  * not have to match. Branch priv level is checked for permissions.
 152  *
 153  * The branch types can be combined, however BRANCH_ANY covers all types
 154  * of branches and therefore it supersedes all the other types.
 155  */
 156 enum perf_branch_sample_type_shift {
 157         PERF_SAMPLE_BRANCH_USER_SHIFT           = 0, /* user branches */
 158         PERF_SAMPLE_BRANCH_KERNEL_SHIFT         = 1, /* kernel branches */
 159         PERF_SAMPLE_BRANCH_HV_SHIFT             = 2, /* hypervisor branches */
 160
 161         PERF_SAMPLE_BRANCH_ANY_SHIFT            = 3, /* any branch types */
 162         PERF_SAMPLE_BRANCH_ANY_CALL_SHIFT       = 4, /* any call branch */
 163         PERF_SAMPLE_BRANCH_ANY_RETURN_SHIFT     = 5, /* any return branch */
 164         PERF_SAMPLE_BRANCH_IND_CALL_SHIFT       = 6, /* indirect calls */
 165         PERF_SAMPLE_BRANCH_ABORT_TX_SHIFT       = 7, /* transaction aborts */
 166         PERF_SAMPLE_BRANCH_IN_TX_SHIFT          = 8, /* in transaction */
 167         PERF_SAMPLE_BRANCH_NO_TX_SHIFT          = 9, /* not in transaction */
 168         PERF_SAMPLE_BRANCH_COND_SHIFT           = 10, /* conditional branches */
 169
 170         PERF_SAMPLE_BRANCH_CALL_STACK_SHIFT     = 11, /* call/ret stack */
 171         PERF_SAMPLE_BRANCH_IND_JUMP_SHIFT       = 12, /* indirect jumps */
 172         PERF_SAMPLE_BRANCH_CALL_SHIFT           = 13, /* direct call */
 173
 174         PERF_SAMPLE_BRANCH_NO_FLAGS_SHIFT       = 14, /* no flags */
 175         PERF_SAMPLE_BRANCH_NO_CYCLES_SHIFT      = 15, /* no cycles */
 176
 177         PERF_SAMPLE_BRANCH_MAX_SHIFT            /* non-ABI */
 178 };
 179
 180 enum perf_branch_sample_type {
 181         PERF_SAMPLE_BRANCH_USER         = 1U << PERF_SAMPLE_BRANCH_USER_SHIFT,
 182         PERF_SAMPLE_BRANCH_KERNEL       = 1U << PERF_SAMPLE_BRANCH_KERNEL_SHIFT,
 183         PERF_SAMPLE_BRANCH_HV           = 1U << PERF_SAMPLE_BRANCH_HV_SHIFT,
 184
 185         PERF_SAMPLE_BRANCH_ANY          = 1U << PERF_SAMPLE_BRANCH_ANY_SHIFT,
 186         PERF_SAMPLE_BRANCH_ANY_CALL     = 1U << PERF_SAMPLE_BRANCH_ANY_CALL_SHIFT,
 187         PERF_SAMPLE_BRANCH_ANY_RETURN   = 1U << PERF_SAMPLE_BRANCH_ANY_RETURN_SHIFT,
 188         PERF_SAMPLE_BRANCH_IND_CALL     = 1U << PERF_SAMPLE_BRANCH_IND_CALL_SHIFT,
 189         PERF_SAMPLE_BRANCH_ABORT_TX     = 1U << PERF_SAMPLE_BRANCH_ABORT_TX_SHIFT,
 190         PERF_SAMPLE_BRANCH_IN_TX        = 1U << PERF_SAMPLE_BRANCH_IN_TX_SHIFT,
 191         PERF_SAMPLE_BRANCH_NO_TX        = 1U << PERF_SAMPLE_BRANCH_NO_TX_SHIFT,
 192         PERF_SAMPLE_BRANCH_COND         = 1U << PERF_SAMPLE_BRANCH_COND_SHIFT,
 193
 194         PERF_SAMPLE_BRANCH_CALL_STACK   = 1U << PERF_SAMPLE_BRANCH_CALL_STACK_SHIFT,
 195         PERF_SAMPLE_BRANCH_IND_JUMP     = 1U << PERF_SAMPLE_BRANCH_IND_JUMP_SHIFT,
 196         PERF_SAMPLE_BRANCH_CALL         = 1U << PERF_SAMPLE_BRANCH_CALL_SHIFT,
 197
 198         PERF_SAMPLE_BRANCH_NO_FLAGS     = 1U << PERF_SAMPLE_BRANCH_NO_FLAGS_SHIFT,
 199         PERF_SAMPLE_BRANCH_NO_CYCLES    = 1U << PERF_SAMPLE_BRANCH_NO_CYCLES_SHIFT,
 200
 201         PERF_SAMPLE_BRANCH_MAX          = 1U << PERF_SAMPLE_BRANCH_MAX_SHIFT,
 202 };
 203
 204 #define PERF_SAMPLE_BRANCH_PLM_ALL \
 205         (PERF_SAMPLE_BRANCH_USER|\
 206          PERF_SAMPLE_BRANCH_KERNEL|\
 207          PERF_SAMPLE_BRANCH_HV)
 208
 209 /*
 210  * Values to determine ABI of the registers dump.
 211  */
 212 enum perf_sample_regs_abi {
 213         PERF_SAMPLE_REGS_ABI_NONE       = 0,
 214         PERF_SAMPLE_REGS_ABI_32         = 1,
 215         PERF_SAMPLE_REGS_ABI_64         = 2,
 216 };
 217
 218 /*
 219  * Values for the memory transaction event qualifier, mostly for
 220  * abort events. Multiple bits can be set.
 221  */
 222 enum {
 223         PERF_TXN_ELISION        = (1 << 0), /* From elision */
 224         PERF_TXN_TRANSACTION    = (1 << 1), /* From transaction */
 225         PERF_TXN_SYNC           = (1 << 2), /* Instruction is related */
 226         PERF_TXN_ASYNC          = (1 << 3), /* Instruction not related */
 227         PERF_TXN_RETRY          = (1 << 4), /* Retry possible */
 228         PERF_TXN_CONFLICT       = (1 << 5), /* Conflict abort */
 229         PERF_TXN_CAPACITY_WRITE = (1 << 6), /* Capacity write abort */
 230         PERF_TXN_CAPACITY_READ  = (1 << 7), /* Capacity read abort */
 231
 232         PERF_TXN_MAX            = (1 << 8), /* non-ABI */
 233
 234         /* bits 32..63 are reserved for the abort code */
 235
 236         PERF_TXN_ABORT_MASK  = (0xffffffffULL << 32),
 237         PERF_TXN_ABORT_SHIFT = 32,
 238 };
 239
 240 /*
 241  * The format of the data returned by read() on a perf event fd,
 242  * as specified by attr.read_format:
 243  *
 244  * struct read_format {
 245  *      { u64           value;
 246  *        { u64         time_enabled; } && PERF_FORMAT_TOTAL_TIME_ENABLED
 247  *        { u64         time_running; } && PERF_FORMAT_TOTAL_TIME_RUNNING
 248  *        { u64         id;           } && PERF_FORMAT_ID
 249  *      } && !PERF_FORMAT_GROUP
 250  *
 251  *      { u64           nr;
 252  *        { u64         time_enabled; } && PERF_FORMAT_TOTAL_TIME_ENABLED
 253  *        { u64         time_running; } && PERF_FORMAT_TOTAL_TIME_RUNNING
 254  *        { u64         value;
 255  *          { u64       id;           } && PERF_FORMAT_ID
 256  *        }             cntr[nr];
 257  *      } && PERF_FORMAT_GROUP
 258  * };
 259  */
 260 enum perf_event_read_format {
 261         PERF_FORMAT_TOTAL_TIME_ENABLED          = 1U << 0,
 262         PERF_FORMAT_TOTAL_TIME_RUNNING          = 1U << 1,
 263         PERF_FORMAT_ID                          = 1U << 2,
 264         PERF_FORMAT_GROUP                       = 1U << 3,
 265
 266         PERF_FORMAT_MAX = 1U << 4,              /* non-ABI */
 267 };
 268
 269 #define PERF_ATTR_SIZE_VER0     64      /* sizeof first published struct */
 270 #define PERF_ATTR_SIZE_VER1     72      /* add: config2 */
 271 #define PERF_ATTR_SIZE_VER2     80      /* add: branch_sample_type */
 272 #define PERF_ATTR_SIZE_VER3     96      /* add: sample_regs_user */
 273                                         /* add: sample_stack_user */
 274 #define PERF_ATTR_SIZE_VER4     104     /* add: sample_regs_intr */
 275 #define PERF_ATTR_SIZE_VER5     112     /* add: aux_watermark */
 276
 277 /*
 278  * Hardware event_id to monitor via a performance monitoring event:
 279  */
 280 struct perf_event_attr {
 281
 282         /*
 283          * Major type: hardware/software/tracepoint/etc.
 284          */
 285         __u32                   type;
 286
 287         /*
 288          * Size of the attr structure, for fwd/bwd compat.
 289          */
 290         __u32                   size;
 291
 292         /*
 293          * Type specific configuration information.
 294          */
 295         __u64                   config;
 296
 297         union {
 298                 __u64           sample_period;
 299                 __u64           sample_freq;
 300         };
 301
 302         __u64                   sample_type;
 303         __u64                   read_format;
 304
 305         __u64                   disabled       :  1, /* off by default        */
 306                                 inherit        :  1, /* children inherit it   */
 307                                 pinned         :  1, /* must always be on PMU */
 308                                 exclusive      :  1, /* only group on PMU     */
 309                                 exclude_user   :  1, /* don't count user      */
 310                                 exclude_kernel :  1, /* ditto kernel          */
 311                                 exclude_hv     :  1, /* ditto hypervisor      */
 312                                 exclude_idle   :  1, /* don't count when idle */
 313                                 mmap           :  1, /* include mmap data     */
 314                                 comm           :  1, /* include comm data     */
 315                                 freq           :  1, /* use freq, not period  */
 316                                 inherit_stat   :  1, /* per task counts       */
 317                                 enable_on_exec :  1, /* next exec enables     */
 318                                 task           :  1, /* trace fork/exit       */
 319                                 watermark      :  1, /* wakeup_watermark      */
 320                                 /*
 321                                  * precise_ip:
 322                                  *
 323                                  *  0 - SAMPLE_IP can have arbitrary skid
 324                                  *  1 - SAMPLE_IP must have constant skid
 325                                  *  2 - SAMPLE_IP requested to have 0 skid
 326                                  *  3 - SAMPLE_IP must have 0 skid
 327                                  *
 328                                  *  See also PERF_RECORD_MISC_EXACT_IP
 329                                  */
 330                                 precise_ip     :  2, /* skid constraint       */
 331                                 mmap_data      :  1, /* non-exec mmap data    */
 332                                 sample_id_all  :  1, /* sample_type all events */
 333
 334                                 exclude_host   :  1, /* don't count in host   */
 335                                 exclude_guest  :  1, /* don't count in guest  */
 336
 337                                 exclude_callchain_kernel : 1, /* exclude kernel callchains */
 338                                 exclude_callchain_user   : 1, /* exclude user callchains */
 339                                 mmap2          :  1, /* include mmap with inode data     */
 340                                 comm_exec      :  1, /* flag comm events that are due to an exec */
 341                                 use_clockid    :  1, /* use @clockid for time fields */
 342                                 context_switch :  1, /* context switch data */
 343                                 __reserved_1   : 37;
 344
 345         union {
 346                 __u32           wakeup_events;    /* wakeup every n events */
 347                 __u32           wakeup_watermark; /* bytes before wakeup   */
 348         };
 349
 350         __u32                   bp_type;
 351         union {
 352                 __u64           bp_addr;
 353                 __u64           config1; /* extension of config */
 354         };
 355         union {
 356                 __u64           bp_len;
 357                 __u64           config2; /* extension of config1 */
 358         };
 359         __u64   branch_sample_type; /* enum perf_branch_sample_type */
 360
 361         /*
 362          * Defines set of user regs to dump on samples.
 363          * See asm/perf_regs.h for details.
 364          */
 365         __u64   sample_regs_user;
 366
 367         /*
 368          * Defines size of the user stack to dump on samples.
 369          */
 370         __u32   sample_stack_user;
 371
 372         __s32   clockid;
 373         /*
 374          * Defines set of regs to dump for each sample
 375          * state captured on:
 376          *  - precise = 0: PMU interrupt
 377          *  - precise > 0: sampled instruction
 378          *
 379          * See asm/perf_regs.h for details.
 380          */
 381         __u64   sample_regs_intr;
 382
 383         /*
 384          * Wakeup watermark for AUX area
 385          */
 386         __u32   aux_watermark;
 387         __u32   __reserved_2;   /* align to __u64 */
 388 };
 389
 390 #define perf_flags(attr)        (*(&(attr)->read_format + 1))
 391
 392 /*
 393  * Ioctls that can be done on a perf event fd:
 394  */
 395 #define PERF_EVENT_IOC_ENABLE           _IO ('$', 0)
 396 #define PERF_EVENT_IOC_DISABLE          _IO ('$', 1)
 397 #define PERF_EVENT_IOC_REFRESH          _IO ('$', 2)
 398 #define PERF_EVENT_IOC_RESET            _IO ('$', 3)
 399 #define PERF_EVENT_IOC_PERIOD           _IOW('$', 4, __u64)
 400 #define PERF_EVENT_IOC_SET_OUTPUT       _IO ('$', 5)
 401 #define PERF_EVENT_IOC_SET_FILTER       _IOW('$', 6, char *)
 402 #define PERF_EVENT_IOC_ID               _IOR('$', 7, __u64 *)
 403 #define PERF_EVENT_IOC_SET_BPF          _IOW('$', 8, __u32)
 404 #define PERF_EVENT_IOC_PAUSE_OUTPUT     _IOW('$', 9, __u32)
 405
 406 enum perf_event_ioc_flags {
 407         PERF_IOC_FLAG_GROUP             = 1U << 0,
 408 };
 409
 410 /*
 411  * Structure of the page that can be mapped via mmap
 412  */
 413 struct perf_event_mmap_page {
 414         __u32   version;                /* version number of this structure */
 415         __u32   compat_version;         /* lowest version this is compat with */
 416
 417         /*
 418          * Bits needed to read the hw events in user-space.
 419          *
 420          *   u32 seq, time_mult, time_shift, index, width;
 421          *   u64 count, enabled, running;
 422          *   u64 cyc, time_offset;
 423          *   s64 pmc = 0;
 424          *
 425          *   do {
 426          *     seq = pc->lock;
 427          *     barrier()
 428          *
 429          *     enabled = pc->time_enabled;
 430          *     running = pc->time_running;
 431          *
 432          *     if (pc->cap_usr_time && enabled != running) {
 433          *       cyc = rdtsc();
 434          *       time_offset = pc->time_offset;
 435          *       time_mult   = pc->time_mult;
 436          *       time_shift  = pc->time_shift;
 437          *     }
 438          *
 439          *     index = pc->index;
 440          *     count = pc->offset;
 441          *     if (pc->cap_user_rdpmc && index) {
 442          *       width = pc->pmc_width;
 443          *       pmc = rdpmc(index - 1);
 444          *     }
 445          *
 446          *     barrier();
 447          *   } while (pc->lock != seq);
 448          *
 449          * NOTE: for obvious reason this only works on self-monitoring
 450          *       processes.
 451          */
 452         __u32   lock;                   /* seqlock for synchronization */
 453         __u32   index;                  /* hardware event identifier */
 454         __s64   offset;                 /* add to hardware event value */
 455         __u64   time_enabled;           /* time event active */
 456         __u64   time_running;           /* time event on cpu */
 457         union {
 458                 __u64   capabilities;
 459                 struct {
 460                         __u64   cap_bit0                : 1, /* Always 0, deprecated, see commit 860f085b74e9 */
 461                                 cap_bit0_is_deprecated  : 1, /* Always 1, signals that bit 0 is zero */
 462
 463                                 cap_user_rdpmc          : 1, /* The RDPMC instruction can be used to read counts */
 464                                 cap_user_time           : 1, /* The time_* fields are used */
 465                                 cap_user_time_zero      : 1, /* The time_zero field is used */
 466                                 cap_____res             : 59;
 467                 };
 468         };
 469
 470         /*
 471          * If cap_user_rdpmc this field provides the bit-width of the value
 472          * read using the rdpmc() or equivalent instruction. This can be used
 473          * to sign extend the result like:
 474          *
 475          *   pmc <<= 64 - width;
 476          *   pmc >>= 64 - width; // signed shift right
 477          *   count += pmc;
 478          */
 479         __u16   pmc_width;
 480
 481         /*
 482          * If cap_usr_time the below fields can be used to compute the time
 483          * delta since time_enabled (in ns) using rdtsc or similar.
 484          *
 485          *   u64 quot, rem;
 486          *   u64 delta;
 487          *
 488          *   quot = (cyc >> time_shift);
 489          *   rem = cyc & (((u64)1 << time_shift) - 1);
 490          *   delta = time_offset + quot * time_mult +
 491          *              ((rem * time_mult) >> time_shift);
 492          *
 493          * Where time_offset,time_mult,time_shift and cyc are read in the
 494          * seqcount loop described above. This delta can then be added to
 495          * enabled and possible running (if index), improving the scaling:
 496          *
 497          *   enabled += delta;
 498          *   if (index)
 499          *     running += delta;
 500          *
 501          *   quot = count / running;
 502          *   rem  = count % running;
 503          *   count = quot * enabled + (rem * enabled) / running;
 504          */
 505         __u16   time_shift;
 506         __u32   time_mult;
 507         __u64   time_offset;
 508         /*
 509          * If cap_usr_time_zero, the hardware clock (e.g. TSC) can be calculated
 510          * from sample timestamps.
 511          *
 512          *   time = timestamp - time_zero;
 513          *   quot = time / time_mult;
 514          *   rem  = time % time_mult;
 515          *   cyc = (quot << time_shift) + (rem << time_shift) / time_mult;
 516          *
 517          * And vice versa:
 518          *
 519          *   quot = cyc >> time_shift;
 520          *   rem  = cyc & (((u64)1 << time_shift) - 1);
 521          *   timestamp = time_zero + quot * time_mult +
 522          *               ((rem * time_mult) >> time_shift);
 523          */
 524         __u64   time_zero;
 525         __u32   size;                   /* Header size up to __reserved[] fields. */
 526
 527                 /*
 528                  * Hole for extension of the self monitor capabilities
 529                  */
 530
 531         __u8    __reserved[118*8+4];    /* align to 1k. */
 532
 533         /*
 534          * Control data for the mmap() data buffer.
 535          *
 536          * User-space reading the @data_head value should issue an smp_rmb(),
 537          * after reading this value.
 538          *
 539          * When the mapping is PROT_WRITE the @data_tail value should be
 540          * written by userspace to reflect the last read data, after issueing
 541          * an smp_mb() to separate the data read from the ->data_tail store.
 542          * In this case the kernel will not over-write unread data.
 543          *
 544          * See perf_output_put_handle() for the data ordering.
 545          *
 546          * data_{offset,size} indicate the location and size of the perf record
 547          * buffer within the mmapped area.
 548          */
 549         __u64   data_head;              /* head in the data section */
 550         __u64   data_tail;              /* user-space written tail */
 551         __u64   data_offset;            /* where the buffer starts */
 552         __u64   data_size;              /* data buffer size */
 553
 554         /*
 555          * AUX area is defined by aux_{offset,size} fields that should be set
 556          * by the userspace, so that
 557          *
 558          *   aux_offset >= data_offset + data_size
 559          *
 560          * prior to mmap()ing it. Size of the mmap()ed area should be aux_size.
 561          *
 562          * Ring buffer pointers aux_{head,tail} have the same semantics as
 563          * data_{head,tail} and same ordering rules apply.
 564          */
 565         __u64   aux_head;
 566         __u64   aux_tail;
 567         __u64   aux_offset;
 568         __u64   aux_size;
 569 };
 570
 571 #define PERF_RECORD_MISC_CPUMODE_MASK           (7 << 0)
 572 #define PERF_RECORD_MISC_CPUMODE_UNKNOWN        (0 << 0)
 573 #define PERF_RECORD_MISC_KERNEL                 (1 << 0)
 574 #define PERF_RECORD_MISC_USER                   (2 << 0)
 575 #define PERF_RECORD_MISC_HYPERVISOR             (3 << 0)
 576 #define PERF_RECORD_MISC_GUEST_KERNEL           (4 << 0)
 577 #define PERF_RECORD_MISC_GUEST_USER             (5 << 0)
 578
 579 /*
 580  * Indicates that /proc/PID/maps parsing are truncated by time out.
 581  */
 582 #define PERF_RECORD_MISC_PROC_MAP_PARSE_TIMEOUT (1 << 12)
 583 /*
 584  * PERF_RECORD_MISC_MMAP_DATA and PERF_RECORD_MISC_COMM_EXEC are used on
 585  * different events so can reuse the same bit position.
 586  * Ditto PERF_RECORD_MISC_SWITCH_OUT.
 587  */
 588 #define PERF_RECORD_MISC_MMAP_DATA              (1 << 13)
 589 #define PERF_RECORD_MISC_COMM_EXEC              (1 << 13)
 590 #define PERF_RECORD_MISC_SWITCH_OUT             (1 << 13)
 591 /*
 592  * Indicates that the content of PERF_SAMPLE_IP points to
 593  * the actual instruction that triggered the event. See also
 594  * perf_event_attr::precise_ip.
 595  */
 596 #define PERF_RECORD_MISC_EXACT_IP               (1 << 14)
 597 /*
 598  * Reserve the last bit to indicate some extended misc field
 599  */
 600 #define PERF_RECORD_MISC_EXT_RESERVED           (1 << 15)
 601
 602 struct perf_event_header {
 603         __u32   type;
 604         __u16   misc;
 605         __u16   size;
 606 };
 607
 608 enum perf_event_type {
 609
 610         /*
 611          * If perf_event_attr.sample_id_all is set then all event types will
 612          * have the sample_type selected fields related to where/when
 613          * (identity) an event took place (TID, TIME, ID, STREAM_ID, CPU,
 614          * IDENTIFIER) described in PERF_RECORD_SAMPLE below, it will be stashed
 615          * just after the perf_event_header and the fields already present for
 616          * the existing fields, i.e. at the end of the payload. That way a newer
 617          * perf.data file will be supported by older perf tools, with these new
 618          * optional fields being ignored.
 619          *
 620          * struct sample_id {
 621          *      { u32                   pid, tid; } && PERF_SAMPLE_TID
 622          *      { u64                   time;     } && PERF_SAMPLE_TIME
 623          *      { u64                   id;       } && PERF_SAMPLE_ID
 624          *      { u64                   stream_id;} && PERF_SAMPLE_STREAM_ID
 625          *      { u32                   cpu, res; } && PERF_SAMPLE_CPU
 626          *      { u64                   id;       } && PERF_SAMPLE_IDENTIFIER
 627          * } && perf_event_attr::sample_id_all
 628          *
 629          * Note that PERF_SAMPLE_IDENTIFIER duplicates PERF_SAMPLE_ID.  The
 630          * advantage of PERF_SAMPLE_IDENTIFIER is that its position is fixed
 631          * relative to header.size.
 632          */
 633
 634         /*
 635          * The MMAP events record the PROT_EXEC mappings so that we can
 636          * correlate userspace IPs to code. They have the following structure:
 637          *
 638          * struct {
 639          *      struct perf_event_header        header;
 640          *
 641          *      u32                             pid, tid;
 642          *      u64                             addr;
 643          *      u64                             len;
 644          *      u64                             pgoff;
 645          *      char                            filename[];
 646          *      struct sample_id                sample_id;
 647          * };
 648          */
 649         PERF_RECORD_MMAP                        = 1,
 650
 651         /*
 652          * struct {
 653          *      struct perf_event_header        header;
 654          *      u64                             id;
 655          *      u64                             lost;
 656          *      struct sample_id                sample_id;
 657          * };
 658          */
 659         PERF_RECORD_LOST                        = 2,
 660
 661         /*
 662          * struct {
 663          *      struct perf_event_header        header;
 664          *
 665          *      u32                             pid, tid;
 666          *      char                            comm[];
 667          *      struct sample_id                sample_id;
 668          * };
 669          */
 670         PERF_RECORD_COMM                        = 3,
 671
 672         /*
 673          * struct {
 674          *      struct perf_event_header        header;
 675          *      u32                             pid, ppid;
 676          *      u32                             tid, ptid;
 677          *      u64                             time;
 678          *      struct sample_id                sample_id;
 679          * };
 680          */
 681         PERF_RECORD_EXIT                        = 4,
 682
 683         /*
 684          * struct {
 685          *      struct perf_event_header        header;
 686          *      u64                             time;
 687          *      u64                             id;
 688          *      u64                             stream_id;
 689          *      struct sample_id                sample_id;
 690          * };
 691          */
 692         PERF_RECORD_THROTTLE                    = 5,
 693         PERF_RECORD_UNTHROTTLE                  = 6,
 694
 695         /*
 696          * struct {
 697          *      struct perf_event_header        header;
 698          *      u32                             pid, ppid;
 699          *      u32                             tid, ptid;
 700          *      u64                             time;
 701          *      struct sample_id                sample_id;
 702          * };
 703          */
 704         PERF_RECORD_FORK                        = 7,
 705
 706         /*
 707          * struct {
 708          *      struct perf_event_header        header;
 709          *      u32                             pid, tid;
 710          *
 711          *      struct read_format              values;
 712          *      struct sample_id                sample_id;
 713          * };
 714          */
 715         PERF_RECORD_READ                        = 8,
 716
 717         /*
 718          * struct {
 719          *      struct perf_event_header        header;
 720          *
 721          *      #
 722          *      # Note that PERF_SAMPLE_IDENTIFIER duplicates PERF_SAMPLE_ID.
 723          *      # The advantage of PERF_SAMPLE_IDENTIFIER is that its position
 724          *      # is fixed relative to header.
 725          *      #
 726          *
 727          *      { u64                   id;       } && PERF_SAMPLE_IDENTIFIER
 728          *      { u64                   ip;       } && PERF_SAMPLE_IP
 729          *      { u32                   pid, tid; } && PERF_SAMPLE_TID
 730          *      { u64                   time;     } && PERF_SAMPLE_TIME
 731          *      { u64                   addr;     } && PERF_SAMPLE_ADDR
 732          *      { u64                   id;       } && PERF_SAMPLE_ID
 733          *      { u64                   stream_id;} && PERF_SAMPLE_STREAM_ID
 734          *      { u32                   cpu, res; } && PERF_SAMPLE_CPU
 735          *      { u64                   period;   } && PERF_SAMPLE_PERIOD
 736          *
 737          *      { struct read_format    values;   } && PERF_SAMPLE_READ
 738          *
 739          *      { u64                   nr,
 740          *        u64                   ips[nr];  } && PERF_SAMPLE_CALLCHAIN
 741          *
 742          *      #
 743          *      # The RAW record below is opaque data wrt the ABI
 744          *      #
 745          *      # That is, the ABI doesn't make any promises wrt to
 746          *      # the stability of its content, it may vary depending
 747          *      # on event, hardware, kernel version and phase of
 748          *      # the moon.
 749          *      #
 750          *      # In other words, PERF_SAMPLE_RAW contents are not an ABI.
 751          *      #
 752          *
 753          *      { u32                   size;
 754          *        char                  data[size];}&& PERF_SAMPLE_RAW
 755          *
 756          *      { u64                   nr;
 757          *        { u64 from, to, flags } lbr[nr];} && PERF_SAMPLE_BRANCH_STACK
 758          *
 759          *      { u64                   abi; # enum perf_sample_regs_abi
 760          *        u64                   regs[weight(mask)]; } && PERF_SAMPLE_REGS_USER
 761          *
 762          *      { u64                   size;
 763          *        char                  data[size];
 764          *        u64                   dyn_size; } && PERF_SAMPLE_STACK_USER
 765          *
 766          *      { u64                   weight;   } && PERF_SAMPLE_WEIGHT
 767          *      { u64                   data_src; } && PERF_SAMPLE_DATA_SRC
 768          *      { u64                   transaction; } && PERF_SAMPLE_TRANSACTION
 769          *      { u64                   abi; # enum perf_sample_regs_abi
 770          *        u64                   regs[weight(mask)]; } && PERF_SAMPLE_REGS_INTR
 771          * };
 772          */
 773         PERF_RECORD_SAMPLE                      = 9,
 774
 775         /*
 776          * The MMAP2 records are an augmented version of MMAP, they add
 777          * maj, min, ino numbers to be used to uniquely identify each mapping
 778          *
 779          * struct {
 780          *      struct perf_event_header        header;
 781          *
 782          *      u32                             pid, tid;
 783          *      u64                             addr;
 784          *      u64                             len;
 785          *      u64                             pgoff;
 786          *      u32                             maj;
 787          *      u32                             min;
 788          *      u64                             ino;
 789          *      u64                             ino_generation;
 790          *      u32                             prot, flags;
 791          *      char                            filename[];
 792          *      struct sample_id                sample_id;
 793          * };
 794          */
 795         PERF_RECORD_MMAP2                       = 10,
 796
 797         /*
 798          * Records that new data landed in the AUX buffer part.
 799          *
 800          * struct {
 801          *      struct perf_event_header        header;
 802          *
 803          *      u64                             aux_offset;
 804          *      u64                             aux_size;
 805          *      u64                             flags;
 806          *      struct sample_id                sample_id;
 807          * };
 808          */
 809         PERF_RECORD_AUX                         = 11,
 810
 811         /*
 812          * Indicates that instruction trace has started
 813          *
 814          * struct {
 815          *      struct perf_event_header        header;
 816          *      u32                             pid;
 817          *      u32                             tid;
 818          * };
 819          */
 820         PERF_RECORD_ITRACE_START                = 12,
 821
 822         /*
 823          * Records the dropped/lost sample number.
 824          *
 825          * struct {
 826          *      struct perf_event_header        header;
 827          *
 828          *      u64                             lost;
 829          *      struct sample_id                sample_id;
 830          * };
 831          */
 832         PERF_RECORD_LOST_SAMPLES                = 13,
 833
 834         /*
 835          * Records a context switch in or out (flagged by
 836          * PERF_RECORD_MISC_SWITCH_OUT). See also
 837          * PERF_RECORD_SWITCH_CPU_WIDE.
 838          *
 839          * struct {
 840          *      struct perf_event_header        header;
 841          *      struct sample_id                sample_id;
 842          * };
 843          */
 844         PERF_RECORD_SWITCH                      = 14,
 845
 846         /*
 847          * CPU-wide version of PERF_RECORD_SWITCH with next_prev_pid and
 848          * next_prev_tid that are the next (switching out) or previous
 849          * (switching in) pid/tid.
 850          *
 851          * struct {
 852          *      struct perf_event_header        header;
 853          *      u32                             next_prev_pid;
 854          *      u32                             next_prev_tid;
 855          *      struct sample_id                sample_id;
 856          * };
 857          */
 858         PERF_RECORD_SWITCH_CPU_WIDE             = 15,
 859
 860         PERF_RECORD_MAX,                        /* non-ABI */
 861 };
 862
 863 #define PERF_MAX_STACK_DEPTH            127
 864
 865 enum perf_callchain_context {
 866         PERF_CONTEXT_HV                 = (__u64)-32,
 867         PERF_CONTEXT_KERNEL             = (__u64)-128,
 868         PERF_CONTEXT_USER               = (__u64)-512,
 869
 870         PERF_CONTEXT_GUEST              = (__u64)-2048,
 871         PERF_CONTEXT_GUEST_KERNEL       = (__u64)-2176,
 872         PERF_CONTEXT_GUEST_USER         = (__u64)-2560,
 873
 874         PERF_CONTEXT_MAX                = (__u64)-4095,
 875 };
 876
 877 /**
 878  * PERF_RECORD_AUX::flags bits
 879  */
 880 #define PERF_AUX_FLAG_TRUNCATED         0x01    /* record was truncated to fit */
 881 #define PERF_AUX_FLAG_OVERWRITE         0x02    /* snapshot from overwrite mode */
 882
 883 #define PERF_FLAG_FD_NO_GROUP           (1UL << 0)
 884 #define PERF_FLAG_FD_OUTPUT             (1UL << 1)
 885 #define PERF_FLAG_PID_CGROUP            (1UL << 2) /* pid=cgroup id, per-cpu mode only */
 886 #define PERF_FLAG_FD_CLOEXEC            (1UL << 3) /* O_CLOEXEC */
 887
 888 union perf_mem_data_src {
 889         __u64 val;
 890         struct {
 891                 __u64   mem_op:5,       /* type of opcode */
 892                         mem_lvl:14,     /* memory hierarchy level */
 893                         mem_snoop:5,    /* snoop mode */
 894                         mem_lock:2,     /* lock instr */
 895                         mem_dtlb:7,     /* tlb access */
 896                         mem_rsvd:31;
 897         };
 898 };
 899
 900 /* type of opcode (load/store/prefetch,code) */
 901 #define PERF_MEM_OP_NA          0x01 /* not available */
 902 #define PERF_MEM_OP_LOAD        0x02 /* load instruction */
 903 #define PERF_MEM_OP_STORE       0x04 /* store instruction */
 904 #define PERF_MEM_OP_PFETCH      0x08 /* prefetch */
 905 #define PERF_MEM_OP_EXEC        0x10 /* code (execution) */
 906 #define PERF_MEM_OP_SHIFT       0
 907
 908 /* memory hierarchy (memory level, hit or miss) */
 909 #define PERF_MEM_LVL_NA         0x01  /* not available */
 910 #define PERF_MEM_LVL_HIT        0x02  /* hit level */
 911 #define PERF_MEM_LVL_MISS       0x04  /* miss level  */
 912 #define PERF_MEM_LVL_L1         0x08  /* L1 */
 913 #define PERF_MEM_LVL_LFB        0x10  /* Line Fill Buffer */
 914 #define PERF_MEM_LVL_L2         0x20  /* L2 */
 915 #define PERF_MEM_LVL_L3         0x40  /* L3 */
 916 #define PERF_MEM_LVL_LOC_RAM    0x80  /* Local DRAM */
 917 #define PERF_MEM_LVL_REM_RAM1   0x100 /* Remote DRAM (1 hop) */
 918 #define PERF_MEM_LVL_REM_RAM2   0x200 /* Remote DRAM (2 hops) */
 919 #define PERF_MEM_LVL_REM_CCE1   0x400 /* Remote Cache (1 hop) */
 920 #define PERF_MEM_LVL_REM_CCE2   0x800 /* Remote Cache (2 hops) */
 921 #define PERF_MEM_LVL_IO         0x1000 /* I/O memory */
 922 #define PERF_MEM_LVL_UNC        0x2000 /* Uncached memory */
 923 #define PERF_MEM_LVL_SHIFT      5
 924
 925 /* snoop mode */
 926 #define PERF_MEM_SNOOP_NA       0x01 /* not available */
 927 #define PERF_MEM_SNOOP_NONE     0x02 /* no snoop */
 928 #define PERF_MEM_SNOOP_HIT      0x04 /* snoop hit */
 929 #define PERF_MEM_SNOOP_MISS     0x08 /* snoop miss */
 930 #define PERF_MEM_SNOOP_HITM     0x10 /* snoop hit modified */
 931 #define PERF_MEM_SNOOP_SHIFT    19
 932
 933 /* locked instruction */
 934 #define PERF_MEM_LOCK_NA        0x01 /* not available */
 935 #define PERF_MEM_LOCK_LOCKED    0x02 /* locked transaction */
 936 #define PERF_MEM_LOCK_SHIFT     24
 937
 938 /* TLB access */
 939 #define PERF_MEM_TLB_NA         0x01 /* not available */
 940 #define PERF_MEM_TLB_HIT        0x02 /* hit level */
 941 #define PERF_MEM_TLB_MISS       0x04 /* miss level */
 942 #define PERF_MEM_TLB_L1         0x08 /* L1 */
 943 #define PERF_MEM_TLB_L2         0x10 /* L2 */
 944 #define PERF_MEM_TLB_WK         0x20 /* Hardware Walker*/
 945 #define PERF_MEM_TLB_OS         0x40 /* OS fault handler */
 946 #define PERF_MEM_TLB_SHIFT      26
 947
 948 #define PERF_MEM_S(a, s) \
 949         (((__u64)PERF_MEM_##a##_##s) << PERF_MEM_##a##_SHIFT)
 950
 951 /*
 952  * single taken branch record layout:
 953  *
 954  *      from: source instruction (may not always be a branch insn)
 955  *        to: branch target
 956  *   mispred: branch target was mispredicted
 957  * predicted: branch target was predicted
 958  *
 959  * support for mispred, predicted is optional. In case it
 960  * is not supported mispred = predicted = 0.
 961  *
 962  *     in_tx: running in a hardware transaction
 963  *     abort: aborting a hardware transaction
 964  *    cycles: cycles from last branch (or 0 if not supported)
 965  */
 966 struct perf_branch_entry {
 967         __u64   from;
 968         __u64   to;
 969         __u64   mispred:1,  /* target mispredicted */
 970                 predicted:1,/* target predicted */
 971                 in_tx:1,    /* in transaction */
 972                 abort:1,    /* transaction abort */
 973                 cycles:16,  /* cycle count to last branch */
 974                 reserved:44;
 975 };
 976
 977 #endif /* _UAPI_LINUX_PERF_EVENT_H */