include/video/exynos7_decon.h

   1 /* include/video/exynos7_decon.h
   2  *
   3  * Copyright (c) 2014 Samsung Electronics Co., Ltd.
   4  * Author: Ajay Kumar <ajaykumar.rs@samsung.com>
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 /* VIDCON0 */
  13 #define VIDCON0                                 0x00
  14
  15 #define VIDCON0_SWRESET                         (1 << 28)
  16 #define VIDCON0_DECON_STOP_STATUS               (1 << 2)
  17 #define VIDCON0_ENVID                           (1 << 1)
  18 #define VIDCON0_ENVID_F                         (1 << 0)
  19
  20 /* VIDOUTCON0 */
  21 #define VIDOUTCON0                              0x4
  22
  23 #define VIDOUTCON0_DUAL_MASK                    (0x3 << 24)
  24 #define VIDOUTCON0_DUAL_ON                      (0x3 << 24)
  25 #define VIDOUTCON0_DISP_IF_1_ON                 (0x2 << 24)
  26 #define VIDOUTCON0_DISP_IF_0_ON                 (0x1 << 24)
  27 #define VIDOUTCON0_DUAL_OFF                     (0x0 << 24)
  28 #define VIDOUTCON0_IF_SHIFT                     23
  29 #define VIDOUTCON0_IF_MASK                      (0x1 << 23)
  30 #define VIDOUTCON0_RGBIF                        (0x0 << 23)
  31 #define VIDOUTCON0_I80IF                        (0x1 << 23)
  32
  33 /* VIDCON3 */
  34 #define VIDCON3                                 0x8
  35
  36 /* VIDCON4 */
  37 #define VIDCON4                                 0xC
  38 #define VIDCON4_FIFOCNT_START_EN                (1 << 0)
  39
  40 /* VCLKCON0 */
  41 #define VCLKCON0                                0x10
  42 #define VCLKCON0_CLKVALUP                       (1 << 8)
  43 #define VCLKCON0_VCLKFREE                       (1 << 0)
  44
  45 /* VCLKCON */
  46 #define VCLKCON1                                0x14
  47 #define VCLKCON1_CLKVAL_NUM_VCLK(val)           (((val) & 0xff) << 0)
  48 #define VCLKCON2                                0x18
  49
  50 /* SHADOWCON */
  51 #define SHADOWCON                               0x30
  52
  53 #define SHADOWCON_WINx_PROTECT(_win)            (1 << (10 + (_win)))
  54
  55 /* WINCONx */
  56 #define WINCON(_win)                            (0x50 + ((_win) * 4))
  57
  58 #define WINCONx_BUFSTATUS                       (0x3 << 30)
  59 #define WINCONx_BUFSEL_MASK                     (0x3 << 28)
  60 #define WINCONx_BUFSEL_SHIFT                    28
  61 #define WINCONx_TRIPLE_BUF_MODE                 (0x1 << 18)
  62 #define WINCONx_DOUBLE_BUF_MODE                 (0x0 << 18)
  63 #define WINCONx_BURSTLEN_16WORD                 (0x0 << 11)
  64 #define WINCONx_BURSTLEN_8WORD                  (0x1 << 11)
  65 #define WINCONx_BURSTLEN_MASK                   (0x1 << 11)
  66 #define WINCONx_BURSTLEN_SHIFT                  11
  67 #define WINCONx_BLD_PLANE                       (0 << 8)
  68 #define WINCONx_BLD_PIX                         (1 << 8)
  69 #define WINCONx_ALPHA_MUL                       (1 << 7)
  70
  71 #define WINCONx_BPPMODE_MASK                    (0xf << 2)
  72 #define WINCONx_BPPMODE_SHIFT                   2
  73 #define WINCONx_BPPMODE_16BPP_565               (0x8 << 2)
  74 #define WINCONx_BPPMODE_24BPP_BGRx              (0x7 << 2)
  75 #define WINCONx_BPPMODE_24BPP_RGBx              (0x6 << 2)
  76 #define WINCONx_BPPMODE_24BPP_xBGR              (0x5 << 2)
  77 #define WINCONx_BPPMODE_24BPP_xRGB              (0x4 << 2)
  78 #define WINCONx_BPPMODE_32BPP_BGRA              (0x3 << 2)
  79 #define WINCONx_BPPMODE_32BPP_RGBA              (0x2 << 2)
  80 #define WINCONx_BPPMODE_32BPP_ABGR              (0x1 << 2)
  81 #define WINCONx_BPPMODE_32BPP_ARGB              (0x0 << 2)
  82 #define WINCONx_ALPHA_SEL                       (1 << 1)
  83 #define WINCONx_ENWIN                           (1 << 0)
  84
  85 #define WINCON1_ALPHA_MUL_F                     (1 << 7)
  86 #define WINCON2_ALPHA_MUL_F                     (1 << 7)
  87 #define WINCON3_ALPHA_MUL_F                     (1 << 7)
  88 #define WINCON4_ALPHA_MUL_F                     (1 << 7)
  89
  90 /*  VIDOSDxH: The height for the OSD image(READ ONLY)*/
  91 #define VIDOSD_H(_x)                            (0x80 + ((_x) * 4))
  92
  93 /* Frame buffer start addresses: VIDWxxADD0n */
  94 #define VIDW_BUF_START(_win)                    (0x80 + ((_win) * 0x10))
  95 #define VIDW_BUF_START1(_win)                   (0x84 + ((_win) * 0x10))
  96 #define VIDW_BUF_START2(_win)                   (0x88 + ((_win) * 0x10))
  97
  98 #define VIDW_WHOLE_X(_win)                      (0x0130 + ((_win) * 8))
  99 #define VIDW_WHOLE_Y(_win)                      (0x0134 + ((_win) * 8))
 100 #define VIDW_OFFSET_X(_win)                     (0x0170 + ((_win) * 8))
 101 #define VIDW_OFFSET_Y(_win)                     (0x0174 + ((_win) * 8))
 102 #define VIDW_BLKOFFSET(_win)                    (0x01B0 + ((_win) * 4))
 103 #define VIDW_BLKSIZE(win)                       (0x0200 + ((_win) * 4))
 104
 105 /* Interrupt controls register */
 106 #define VIDINTCON2                              0x228
 107
 108 #define VIDINTCON1_INTEXTRA1_EN                 (1 << 1)
 109 #define VIDINTCON1_INTEXTRA0_EN                 (1 << 0)
 110
 111 /* Interrupt controls and status register */
 112 #define VIDINTCON3                              0x22C
 113
 114 #define VIDINTCON1_INTEXTRA1_PEND               (1 << 1)
 115 #define VIDINTCON1_INTEXTRA0_PEND               (1 << 0)
 116
 117 /* VIDOSDxA ~ VIDOSDxE */
 118 #define VIDOSD_BASE                             0x230
 119
 120 #define OSD_STRIDE                              0x20
 121
 122 #define VIDOSD_A(_win)                          (VIDOSD_BASE + \
 123                                                 ((_win) * OSD_STRIDE) + 0x00)
 124 #define VIDOSD_B(_win)                          (VIDOSD_BASE + \
 125                                                 ((_win) * OSD_STRIDE) + 0x04)
 126 #define VIDOSD_C(_win)                          (VIDOSD_BASE + \
 127                                                 ((_win) * OSD_STRIDE) + 0x08)
 128 #define VIDOSD_D(_win)                          (VIDOSD_BASE + \
 129                                                 ((_win) * OSD_STRIDE) + 0x0C)
 130 #define VIDOSD_E(_win)                          (VIDOSD_BASE + \
 131                                                 ((_win) * OSD_STRIDE) + 0x10)
 132
 133 #define VIDOSDxA_TOPLEFT_X_MASK                 (0x1fff << 13)
 134 #define VIDOSDxA_TOPLEFT_X_SHIFT                13
 135 #define VIDOSDxA_TOPLEFT_X_LIMIT                0x1fff
 136 #define VIDOSDxA_TOPLEFT_X(_x)                  (((_x) & 0x1fff) << 13)
 137
 138 #define VIDOSDxA_TOPLEFT_Y_MASK                 (0x1fff << 0)
 139 #define VIDOSDxA_TOPLEFT_Y_SHIFT                0
 140 #define VIDOSDxA_TOPLEFT_Y_LIMIT                0x1fff
 141 #define VIDOSDxA_TOPLEFT_Y(_x)                  (((_x) & 0x1fff) << 0)
 142
 143 #define VIDOSDxB_BOTRIGHT_X_MASK                (0x1fff << 13)
 144 #define VIDOSDxB_BOTRIGHT_X_SHIFT               13
 145 #define VIDOSDxB_BOTRIGHT_X_LIMIT               0x1fff
 146 #define VIDOSDxB_BOTRIGHT_X(_x)                 (((_x) & 0x1fff) << 13)
 147
 148 #define VIDOSDxB_BOTRIGHT_Y_MASK                (0x1fff << 0)
 149 #define VIDOSDxB_BOTRIGHT_Y_SHIFT               0
 150 #define VIDOSDxB_BOTRIGHT_Y_LIMIT               0x1fff
 151 #define VIDOSDxB_BOTRIGHT_Y(_x)                 (((_x) & 0x1fff) << 0)
 152
 153 #define VIDOSDxC_ALPHA0_R_F(_x)                 (((_x) & 0xFF) << 16)
 154 #define VIDOSDxC_ALPHA0_G_F(_x)                 (((_x) & 0xFF) << 8)
 155 #define VIDOSDxC_ALPHA0_B_F(_x)                 (((_x) & 0xFF) << 0)
 156
 157 #define VIDOSDxD_ALPHA1_R_F(_x)                 (((_x) & 0xFF) << 16)
 158 #define VIDOSDxD_ALPHA1_G_F(_x)                 (((_x) & 0xFF) << 8)
 159 #define VIDOSDxD_ALPHA1_B_F(_x)                 (((_x) & 0xFF) >> 0)
 160
 161 /* Window MAP (Color map) */
 162 #define WINxMAP(_win)                           (0x340 + ((_win) * 4))
 163
 164 #define WINxMAP_MAP                             (1 << 24)
 165 #define WINxMAP_MAP_COLOUR_MASK                 (0xffffff << 0)
 166 #define WINxMAP_MAP_COLOUR_SHIFT                0
 167 #define WINxMAP_MAP_COLOUR_LIMIT                0xffffff
 168 #define WINxMAP_MAP_COLOUR(_x)                  ((_x) << 0)
 169
 170 /* Window colour-key control registers */
 171 #define WKEYCON                                 0x370
 172
 173 #define WKEYCON0                                0x00
 174 #define WKEYCON1                                0x04
 175 #define WxKEYCON0_KEYBL_EN                      (1 << 26)
 176 #define WxKEYCON0_KEYEN_F                       (1 << 25)
 177 #define WxKEYCON0_DIRCON                        (1 << 24)
 178 #define WxKEYCON0_COMPKEY_MASK                  (0xffffff << 0)
 179 #define WxKEYCON0_COMPKEY_SHIFT                 0
 180 #define WxKEYCON0_COMPKEY_LIMIT                 0xffffff
 181 #define WxKEYCON0_COMPKEY(_x)                   ((_x) << 0)
 182 #define WxKEYCON1_COLVAL_MASK                   (0xffffff << 0)
 183 #define WxKEYCON1_COLVAL_SHIFT                  0
 184 #define WxKEYCON1_COLVAL_LIMIT                  0xffffff
 185 #define WxKEYCON1_COLVAL(_x)                    ((_x) << 0)
 186
 187 /* color key control register for hardware window 1 ~ 4. */
 188 #define WKEYCON0_BASE(x)                ((WKEYCON + WKEYCON0) + ((x - 1) * 8))
 189 /* color key value register for hardware window 1 ~ 4. */
 190 #define WKEYCON1_BASE(x)                ((WKEYCON + WKEYCON1) + ((x - 1) * 8))
 191
 192 /* Window KEY Alpha value */
 193 #define WxKEYALPHA(_win)                        (0x3A0 + (((_win) - 1) * 0x4))
 194
 195 #define Wx_KEYALPHA_R_F_SHIFT                   16
 196 #define Wx_KEYALPHA_G_F_SHIFT                   8
 197 #define Wx_KEYALPHA_B_F_SHIFT                   0
 198
 199 /* Blending equation */
 200 #define BLENDE(_win)                            (0x03C0 + ((_win) * 4))
 201 #define BLENDE_COEF_ZERO                        0x0
 202 #define BLENDE_COEF_ONE                         0x1
 203 #define BLENDE_COEF_ALPHA_A                     0x2
 204 #define BLENDE_COEF_ONE_MINUS_ALPHA_A           0x3
 205 #define BLENDE_COEF_ALPHA_B                     0x4
 206 #define BLENDE_COEF_ONE_MINUS_ALPHA_B           0x5
 207 #define BLENDE_COEF_ALPHA0                      0x6
 208 #define BLENDE_COEF_A                           0xA
 209 #define BLENDE_COEF_ONE_MINUS_A                 0xB
 210 #define BLENDE_COEF_B                           0xC
 211 #define BLENDE_COEF_ONE_MINUS_B                 0xD
 212 #define BLENDE_Q_FUNC(_v)                       ((_v) << 18)
 213 #define BLENDE_P_FUNC(_v)                       ((_v) << 12)
 214 #define BLENDE_B_FUNC(_v)                       ((_v) << 6)
 215 #define BLENDE_A_FUNC(_v)                       ((_v) << 0)
 216
 217 /* Blending equation control */
 218 #define BLENDCON                                0x3D8
 219 #define BLENDCON_NEW_MASK                       (1 << 0)
 220 #define BLENDCON_NEW_8BIT_ALPHA_VALUE           (1 << 0)
 221 #define BLENDCON_NEW_4BIT_ALPHA_VALUE           (0 << 0)
 222
 223 /* Interrupt control register */
 224 #define VIDINTCON0                              0x500
 225
 226 #define VIDINTCON0_WAKEUP_MASK                  (0x3f << 26)
 227 #define VIDINTCON0_INTEXTRAEN                   (1 << 21)
 228
 229 #define VIDINTCON0_FRAMESEL0_SHIFT              15
 230 #define VIDINTCON0_FRAMESEL0_MASK               (0x3 << 15)
 231 #define VIDINTCON0_FRAMESEL0_BACKPORCH          (0x0 << 15)
 232 #define VIDINTCON0_FRAMESEL0_VSYNC              (0x1 << 15)
 233 #define VIDINTCON0_FRAMESEL0_ACTIVE             (0x2 << 15)
 234 #define VIDINTCON0_FRAMESEL0_FRONTPORCH         (0x3 << 15)
 235
 236 #define VIDINTCON0_INT_FRAME                    (1 << 11)
 237
 238 #define VIDINTCON0_FIFOLEVEL_MASK               (0x7 << 3)
 239 #define VIDINTCON0_FIFOLEVEL_SHIFT              3
 240 #define VIDINTCON0_FIFOLEVEL_EMPTY              (0x0 << 3)
 241 #define VIDINTCON0_FIFOLEVEL_TO25PC             (0x1 << 3)
 242 #define VIDINTCON0_FIFOLEVEL_TO50PC             (0x2 << 3)
 243 #define VIDINTCON0_FIFOLEVEL_FULL               (0x4 << 3)
 244
 245 #define VIDINTCON0_FIFOSEL_MAIN_EN              (1 << 1)
 246 #define VIDINTCON0_INT_FIFO                     (1 << 1)
 247
 248 #define VIDINTCON0_INT_ENABLE                   (1 << 0)
 249
 250 /* Interrupt controls and status register */
 251 #define VIDINTCON1                              0x504
 252
 253 #define VIDINTCON1_INT_EXTRA                    (1 << 3)
 254 #define VIDINTCON1_INT_I80                      (1 << 2)
 255 #define VIDINTCON1_INT_FRAME                    (1 << 1)
 256 #define VIDINTCON1_INT_FIFO                     (1 << 0)
 257
 258 /* VIDCON1 */
 259 #define VIDCON1(_x)                             (0x0600 + ((_x) * 0x50))
 260 #define VIDCON1_LINECNT_GET(_v)                 (((_v) >> 17) & 0x1fff)
 261 #define VIDCON1_VCLK_MASK                       (0x3 << 9)
 262 #define VIDCON1_VCLK_HOLD                       (0x0 << 9)
 263 #define VIDCON1_VCLK_RUN                        (0x1 << 9)
 264 #define VIDCON1_VCLK_RUN_VDEN_DISABLE           (0x3 << 9)
 265 #define VIDCON1_RGB_ORDER_O_MASK                (0x7 << 4)
 266 #define VIDCON1_RGB_ORDER_O_RGB                 (0x0 << 4)
 267 #define VIDCON1_RGB_ORDER_O_GBR                 (0x1 << 4)
 268 #define VIDCON1_RGB_ORDER_O_BRG                 (0x2 << 4)
 269 #define VIDCON1_RGB_ORDER_O_BGR                 (0x4 << 4)
 270 #define VIDCON1_RGB_ORDER_O_RBG                 (0x5 << 4)
 271 #define VIDCON1_RGB_ORDER_O_GRB                 (0x6 << 4)
 272
 273 /* VIDTCON0 */
 274 #define VIDTCON0                                0x610
 275
 276 #define VIDTCON0_VBPD_MASK                      (0xffff << 16)
 277 #define VIDTCON0_VBPD_SHIFT                     16
 278 #define VIDTCON0_VBPD_LIMIT                     0xffff
 279 #define VIDTCON0_VBPD(_x)                       ((_x) << 16)
 280
 281 #define VIDTCON0_VFPD_MASK                      (0xffff << 0)
 282 #define VIDTCON0_VFPD_SHIFT                     0
 283 #define VIDTCON0_VFPD_LIMIT                     0xffff
 284 #define VIDTCON0_VFPD(_x)                       ((_x) << 0)
 285
 286 /* VIDTCON1 */
 287 #define VIDTCON1                                0x614
 288
 289 #define VIDTCON1_VSPW_MASK                      (0xffff << 16)
 290 #define VIDTCON1_VSPW_SHIFT                     16
 291 #define VIDTCON1_VSPW_LIMIT                     0xffff
 292 #define VIDTCON1_VSPW(_x)                       ((_x) << 16)
 293
 294 /* VIDTCON2 */
 295 #define VIDTCON2                                0x618
 296
 297 #define VIDTCON2_HBPD_MASK                      (0xffff << 16)
 298 #define VIDTCON2_HBPD_SHIFT                     16
 299 #define VIDTCON2_HBPD_LIMIT                     0xffff
 300 #define VIDTCON2_HBPD(_x)                       ((_x) << 16)
 301
 302 #define VIDTCON2_HFPD_MASK                      (0xffff << 0)
 303 #define VIDTCON2_HFPD_SHIFT                     0
 304 #define VIDTCON2_HFPD_LIMIT                     0xffff
 305 #define VIDTCON2_HFPD(_x)                       ((_x) << 0)
 306
 307 /* VIDTCON3 */
 308 #define VIDTCON3                                0x61C
 309
 310 #define VIDTCON3_HSPW_MASK                      (0xffff << 16)
 311 #define VIDTCON3_HSPW_SHIFT                     16
 312 #define VIDTCON3_HSPW_LIMIT                     0xffff
 313 #define VIDTCON3_HSPW(_x)                       ((_x) << 16)
 314
 315 /* VIDTCON4 */
 316 #define VIDTCON4                                0x620
 317
 318 #define VIDTCON4_LINEVAL_MASK                   (0xfff << 16)
 319 #define VIDTCON4_LINEVAL_SHIFT                  16
 320 #define VIDTCON4_LINEVAL_LIMIT                  0xfff
 321 #define VIDTCON4_LINEVAL(_x)                    (((_x) & 0xfff) << 16)
 322
 323 #define VIDTCON4_HOZVAL_MASK                    (0xfff << 0)
 324 #define VIDTCON4_HOZVAL_SHIFT                   0
 325 #define VIDTCON4_HOZVAL_LIMIT                   0xfff
 326 #define VIDTCON4_HOZVAL(_x)                     (((_x) & 0xfff) << 0)
 327
 328 /* LINECNT OP THRSHOLD*/
 329 #define LINECNT_OP_THRESHOLD                    0x630
 330
 331 /* CRCCTRL */
 332 #define CRCCTRL                                 0x6C8
 333 #define CRCCTRL_CRCCLKEN                        (0x1 << 2)
 334 #define CRCCTRL_CRCSTART_F                      (0x1 << 1)
 335 #define CRCCTRL_CRCEN                           (0x1 << 0)
 336
 337 /* DECON_CMU */
 338 #define DECON_CMU                               0x704
 339
 340 #define DECON_CMU_ALL_CLKGATE_ENABLE            0x3
 341 #define DECON_CMU_SE_CLKGATE_ENABLE             (0x1 << 2)
 342 #define DECON_CMU_SFR_CLKGATE_ENABLE            (0x1 << 1)
 343 #define DECON_CMU_MEM_CLKGATE_ENABLE            (0x1 << 0)
 344
 345 /* DECON_UPDATE */
 346 #define DECON_UPDATE                            0x710
 347
 348 #define DECON_UPDATE_SLAVE_SYNC                 (1 << 4)
 349 #define DECON_UPDATE_STANDALONE_F               (1 << 0)