2 * Copyright (C) 2008 Nokia Corporation
3 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
18 #ifndef __OMAP_OMAPDSS_H
19 #define __OMAP_OMAPDSS_H
21 #include <linux/list.h>
22 #include <linux/kobject.h>
23 #include <linux/device.h>
24 #include <linux/interrupt.h>
26 #include <video/videomode.h>
28 #define DISPC_IRQ_FRAMEDONE (1 << 0)
29 #define DISPC_IRQ_VSYNC (1 << 1)
30 #define DISPC_IRQ_EVSYNC_EVEN (1 << 2)
31 #define DISPC_IRQ_EVSYNC_ODD (1 << 3)
32 #define DISPC_IRQ_ACBIAS_COUNT_STAT (1 << 4)
33 #define DISPC_IRQ_PROG_LINE_NUM (1 << 5)
34 #define DISPC_IRQ_GFX_FIFO_UNDERFLOW (1 << 6)
35 #define DISPC_IRQ_GFX_END_WIN (1 << 7)
36 #define DISPC_IRQ_PAL_GAMMA_MASK (1 << 8)
37 #define DISPC_IRQ_OCP_ERR (1 << 9)
38 #define DISPC_IRQ_VID1_FIFO_UNDERFLOW (1 << 10)
39 #define DISPC_IRQ_VID1_END_WIN (1 << 11)
40 #define DISPC_IRQ_VID2_FIFO_UNDERFLOW (1 << 12)
41 #define DISPC_IRQ_VID2_END_WIN (1 << 13)
42 #define DISPC_IRQ_SYNC_LOST (1 << 14)
43 #define DISPC_IRQ_SYNC_LOST_DIGIT (1 << 15)
44 #define DISPC_IRQ_WAKEUP (1 << 16)
45 #define DISPC_IRQ_SYNC_LOST2 (1 << 17)
46 #define DISPC_IRQ_VSYNC2 (1 << 18)
47 #define DISPC_IRQ_VID3_END_WIN (1 << 19)
48 #define DISPC_IRQ_VID3_FIFO_UNDERFLOW (1 << 20)
49 #define DISPC_IRQ_ACBIAS_COUNT_STAT2 (1 << 21)
50 #define DISPC_IRQ_FRAMEDONE2 (1 << 22)
51 #define DISPC_IRQ_FRAMEDONEWB (1 << 23)
52 #define DISPC_IRQ_FRAMEDONETV (1 << 24)
53 #define DISPC_IRQ_WBBUFFEROVERFLOW (1 << 25)
54 #define DISPC_IRQ_SYNC_LOST3 (1 << 27)
55 #define DISPC_IRQ_VSYNC3 (1 << 28)
56 #define DISPC_IRQ_ACBIAS_COUNT_STAT3 (1 << 29)
57 #define DISPC_IRQ_FRAMEDONE3 (1 << 30)
59 struct omap_dss_device
;
60 struct omap_overlay_manager
;
61 struct dss_lcd_mgr_config
;
62 struct snd_aes_iec958
;
63 struct snd_cea_861_aud_if
;
65 enum omap_display_type
{
66 OMAP_DISPLAY_TYPE_NONE
= 0,
67 OMAP_DISPLAY_TYPE_DPI
= 1 << 0,
68 OMAP_DISPLAY_TYPE_DBI
= 1 << 1,
69 OMAP_DISPLAY_TYPE_SDI
= 1 << 2,
70 OMAP_DISPLAY_TYPE_DSI
= 1 << 3,
71 OMAP_DISPLAY_TYPE_VENC
= 1 << 4,
72 OMAP_DISPLAY_TYPE_HDMI
= 1 << 5,
73 OMAP_DISPLAY_TYPE_DVI
= 1 << 6,
85 OMAP_DSS_CHANNEL_LCD
= 0,
86 OMAP_DSS_CHANNEL_DIGIT
= 1,
87 OMAP_DSS_CHANNEL_LCD2
= 2,
88 OMAP_DSS_CHANNEL_LCD3
= 3,
91 enum omap_color_mode
{
92 OMAP_DSS_COLOR_CLUT1
= 1 << 0, /* BITMAP 1 */
93 OMAP_DSS_COLOR_CLUT2
= 1 << 1, /* BITMAP 2 */
94 OMAP_DSS_COLOR_CLUT4
= 1 << 2, /* BITMAP 4 */
95 OMAP_DSS_COLOR_CLUT8
= 1 << 3, /* BITMAP 8 */
96 OMAP_DSS_COLOR_RGB12U
= 1 << 4, /* RGB12, 16-bit container */
97 OMAP_DSS_COLOR_ARGB16
= 1 << 5, /* ARGB16 */
98 OMAP_DSS_COLOR_RGB16
= 1 << 6, /* RGB16 */
99 OMAP_DSS_COLOR_RGB24U
= 1 << 7, /* RGB24, 32-bit container */
100 OMAP_DSS_COLOR_RGB24P
= 1 << 8, /* RGB24, 24-bit container */
101 OMAP_DSS_COLOR_YUV2
= 1 << 9, /* YUV2 4:2:2 co-sited */
102 OMAP_DSS_COLOR_UYVY
= 1 << 10, /* UYVY 4:2:2 co-sited */
103 OMAP_DSS_COLOR_ARGB32
= 1 << 11, /* ARGB32 */
104 OMAP_DSS_COLOR_RGBA32
= 1 << 12, /* RGBA32 */
105 OMAP_DSS_COLOR_RGBX32
= 1 << 13, /* RGBx32 */
106 OMAP_DSS_COLOR_NV12
= 1 << 14, /* NV12 format: YUV 4:2:0 */
107 OMAP_DSS_COLOR_RGBA16
= 1 << 15, /* RGBA16 - 4444 */
108 OMAP_DSS_COLOR_RGBX16
= 1 << 16, /* RGBx16 - 4444 */
109 OMAP_DSS_COLOR_ARGB16_1555
= 1 << 17, /* ARGB16 - 1555 */
110 OMAP_DSS_COLOR_XRGB16_1555
= 1 << 18, /* xRGB16 - 1555 */
113 enum omap_dss_load_mode
{
114 OMAP_DSS_LOAD_CLUT_AND_FRAME
= 0,
115 OMAP_DSS_LOAD_CLUT_ONLY
= 1,
116 OMAP_DSS_LOAD_FRAME_ONLY
= 2,
117 OMAP_DSS_LOAD_CLUT_ONCE_FRAME
= 3,
120 enum omap_dss_trans_key_type
{
121 OMAP_DSS_COLOR_KEY_GFX_DST
= 0,
122 OMAP_DSS_COLOR_KEY_VID_SRC
= 1,
125 enum omap_rfbi_te_mode
{
126 OMAP_DSS_RFBI_TE_MODE_1
= 1,
127 OMAP_DSS_RFBI_TE_MODE_2
= 2,
130 enum omap_dss_signal_level
{
131 OMAPDSS_SIG_ACTIVE_HIGH
= 0,
132 OMAPDSS_SIG_ACTIVE_LOW
= 1,
135 enum omap_dss_signal_edge
{
136 OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES
,
137 OMAPDSS_DRIVE_SIG_RISING_EDGE
,
138 OMAPDSS_DRIVE_SIG_FALLING_EDGE
,
141 enum omap_dss_venc_type
{
142 OMAP_DSS_VENC_TYPE_COMPOSITE
,
143 OMAP_DSS_VENC_TYPE_SVIDEO
,
146 enum omap_dss_dsi_pixel_format
{
147 OMAP_DSS_DSI_FMT_RGB888
,
148 OMAP_DSS_DSI_FMT_RGB666
,
149 OMAP_DSS_DSI_FMT_RGB666_PACKED
,
150 OMAP_DSS_DSI_FMT_RGB565
,
153 enum omap_dss_dsi_mode
{
154 OMAP_DSS_DSI_CMD_MODE
= 0,
155 OMAP_DSS_DSI_VIDEO_MODE
,
158 enum omap_display_caps
{
159 OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE
= 1 << 0,
160 OMAP_DSS_DISPLAY_CAP_TEAR_ELIM
= 1 << 1,
163 enum omap_dss_display_state
{
164 OMAP_DSS_DISPLAY_DISABLED
= 0,
165 OMAP_DSS_DISPLAY_ACTIVE
,
168 enum omap_dss_audio_state
{
169 OMAP_DSS_AUDIO_DISABLED
= 0,
170 OMAP_DSS_AUDIO_ENABLED
,
171 OMAP_DSS_AUDIO_CONFIGURED
,
172 OMAP_DSS_AUDIO_PLAYING
,
175 struct omap_dss_audio
{
176 struct snd_aes_iec958
*iec
;
177 struct snd_cea_861_aud_if
*cea
;
180 enum omap_dss_rotation_type
{
181 OMAP_DSS_ROT_DMA
= 1 << 0,
182 OMAP_DSS_ROT_VRFB
= 1 << 1,
183 OMAP_DSS_ROT_TILER
= 1 << 2,
186 /* clockwise rotation angle */
187 enum omap_dss_rotation_angle
{
190 OMAP_DSS_ROT_180
= 2,
191 OMAP_DSS_ROT_270
= 3,
194 enum omap_overlay_caps
{
195 OMAP_DSS_OVL_CAP_SCALE
= 1 << 0,
196 OMAP_DSS_OVL_CAP_GLOBAL_ALPHA
= 1 << 1,
197 OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA
= 1 << 2,
198 OMAP_DSS_OVL_CAP_ZORDER
= 1 << 3,
199 OMAP_DSS_OVL_CAP_POS
= 1 << 4,
200 OMAP_DSS_OVL_CAP_REPLICATION
= 1 << 5,
203 enum omap_overlay_manager_caps
{
204 OMAP_DSS_DUMMY_VALUE
, /* add a dummy value to prevent compiler error */
207 enum omap_dss_clk_source
{
208 OMAP_DSS_CLK_SRC_FCK
= 0, /* OMAP2/3: DSS1_ALWON_FCLK
210 OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC
, /* OMAP3: DSI1_PLL_FCLK
211 * OMAP4: PLL1_CLK1 */
212 OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI
, /* OMAP3: DSI2_PLL_FCLK
213 * OMAP4: PLL1_CLK2 */
214 OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC
, /* OMAP4: PLL2_CLK1 */
215 OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI
, /* OMAP4: PLL2_CLK2 */
218 enum omap_hdmi_flags
{
219 OMAP_HDMI_SDA_SCL_EXTERNAL_PULLUP
= 1 << 0,
222 enum omap_dss_output_id
{
223 OMAP_DSS_OUTPUT_DPI
= 1 << 0,
224 OMAP_DSS_OUTPUT_DBI
= 1 << 1,
225 OMAP_DSS_OUTPUT_SDI
= 1 << 2,
226 OMAP_DSS_OUTPUT_DSI1
= 1 << 3,
227 OMAP_DSS_OUTPUT_DSI2
= 1 << 4,
228 OMAP_DSS_OUTPUT_VENC
= 1 << 5,
229 OMAP_DSS_OUTPUT_HDMI
= 1 << 6,
234 struct rfbi_timings
{
248 u32 tim
[5]; /* set by rfbi_convert_timings() */
253 void omap_rfbi_write_command(const void *buf
, u32 len
);
254 void omap_rfbi_read_data(void *buf
, u32 len
);
255 void omap_rfbi_write_data(const void *buf
, u32 len
);
256 void omap_rfbi_write_pixels(const void __iomem
*buf
, int scr_width
,
259 int omap_rfbi_enable_te(bool enable
, unsigned line
);
260 int omap_rfbi_setup_te(enum omap_rfbi_te_mode mode
,
261 unsigned hs_pulse_time
, unsigned vs_pulse_time
,
262 int hs_pol_inv
, int vs_pol_inv
, int extif_div
);
263 void rfbi_bus_lock(void);
264 void rfbi_bus_unlock(void);
268 enum omap_dss_dsi_trans_mode
{
269 /* Sync Pulses: both sync start and end packets sent */
270 OMAP_DSS_DSI_PULSE_MODE
,
271 /* Sync Events: only sync start packets sent */
272 OMAP_DSS_DSI_EVENT_MODE
,
273 /* Burst: only sync start packets sent, pixels are time compressed */
274 OMAP_DSS_DSI_BURST_MODE
,
277 struct omap_dss_dsi_videomode_timings
{
288 /* DSI video mode blanking data */
289 /* Unit: byte clock cycles */
295 /* Unit: line clocks */
300 /* DSI blanking modes */
302 int hsa_blanking_mode
;
303 int hbp_blanking_mode
;
304 int hfp_blanking_mode
;
306 enum omap_dss_dsi_trans_mode trans_mode
;
308 bool ddr_clk_always_on
;
312 struct omap_dss_dsi_config
{
313 enum omap_dss_dsi_mode mode
;
314 enum omap_dss_dsi_pixel_format pixel_format
;
315 const struct omap_video_timings
*timings
;
317 unsigned long hs_clk_min
, hs_clk_max
;
318 unsigned long lp_clk_min
, lp_clk_max
;
320 bool ddr_clk_always_on
;
321 enum omap_dss_dsi_trans_mode trans_mode
;
324 void dsi_bus_lock(struct omap_dss_device
*dssdev
);
325 void dsi_bus_unlock(struct omap_dss_device
*dssdev
);
326 int dsi_vc_dcs_write(struct omap_dss_device
*dssdev
, int channel
, u8
*data
,
328 int dsi_vc_generic_write(struct omap_dss_device
*dssdev
, int channel
, u8
*data
,
330 int dsi_vc_dcs_write_0(struct omap_dss_device
*dssdev
, int channel
, u8 dcs_cmd
);
331 int dsi_vc_generic_write_0(struct omap_dss_device
*dssdev
, int channel
);
332 int dsi_vc_dcs_write_1(struct omap_dss_device
*dssdev
, int channel
, u8 dcs_cmd
,
334 int dsi_vc_generic_write_1(struct omap_dss_device
*dssdev
, int channel
,
336 int dsi_vc_generic_write_2(struct omap_dss_device
*dssdev
, int channel
,
337 u8 param1
, u8 param2
);
338 int dsi_vc_dcs_write_nosync(struct omap_dss_device
*dssdev
, int channel
,
340 int dsi_vc_generic_write_nosync(struct omap_dss_device
*dssdev
, int channel
,
342 int dsi_vc_dcs_read(struct omap_dss_device
*dssdev
, int channel
, u8 dcs_cmd
,
343 u8
*buf
, int buflen
);
344 int dsi_vc_generic_read_0(struct omap_dss_device
*dssdev
, int channel
, u8
*buf
,
346 int dsi_vc_generic_read_1(struct omap_dss_device
*dssdev
, int channel
, u8 param
,
347 u8
*buf
, int buflen
);
348 int dsi_vc_generic_read_2(struct omap_dss_device
*dssdev
, int channel
,
349 u8 param1
, u8 param2
, u8
*buf
, int buflen
);
350 int dsi_vc_set_max_rx_packet_size(struct omap_dss_device
*dssdev
, int channel
,
352 int dsi_vc_send_null(struct omap_dss_device
*dssdev
, int channel
);
353 int dsi_vc_send_bta_sync(struct omap_dss_device
*dssdev
, int channel
);
354 int dsi_enable_video_output(struct omap_dss_device
*dssdev
, int channel
);
355 void dsi_disable_video_output(struct omap_dss_device
*dssdev
, int channel
);
357 enum omapdss_version
{
358 OMAPDSS_VER_UNKNOWN
= 0,
359 OMAPDSS_VER_OMAP24xx
,
360 OMAPDSS_VER_OMAP34xx_ES1
, /* OMAP3430 ES1.0, 2.0 */
361 OMAPDSS_VER_OMAP34xx_ES3
, /* OMAP3430 ES3.0+ */
362 OMAPDSS_VER_OMAP3630
,
364 OMAPDSS_VER_OMAP4430_ES1
, /* OMAP4430 ES1.0 */
365 OMAPDSS_VER_OMAP4430_ES2
, /* OMAP4430 ES2.0, 2.1, 2.2 */
366 OMAPDSS_VER_OMAP4
, /* All other OMAP4s */
370 /* Board specific data */
371 struct omap_dss_board_info
{
372 int (*get_context_loss_count
)(struct device
*dev
);
374 struct omap_dss_device
**devices
;
375 struct omap_dss_device
*default_device
;
376 const char *default_display_name
;
377 int (*dsi_enable_pads
)(int dsi_id
, unsigned lane_mask
);
378 void (*dsi_disable_pads
)(int dsi_id
, unsigned lane_mask
);
379 int (*set_min_bus_tput
)(struct device
*dev
, unsigned long r
);
380 enum omapdss_version version
;
383 /* Init with the board info */
384 extern int omap_display_init(struct omap_dss_board_info
*board_data
);
386 extern int omap_hdmi_init(enum omap_hdmi_flags flags
);
388 struct omap_video_timings
{
395 /* Unit: pixel clocks */
396 u16 hsw
; /* Horizontal synchronization pulse width */
397 /* Unit: pixel clocks */
398 u16 hfp
; /* Horizontal front porch */
399 /* Unit: pixel clocks */
400 u16 hbp
; /* Horizontal back porch */
401 /* Unit: line clocks */
402 u16 vsw
; /* Vertical synchronization pulse width */
403 /* Unit: line clocks */
404 u16 vfp
; /* Vertical front porch */
405 /* Unit: line clocks */
406 u16 vbp
; /* Vertical back porch */
408 /* Vsync logic level */
409 enum omap_dss_signal_level vsync_level
;
410 /* Hsync logic level */
411 enum omap_dss_signal_level hsync_level
;
412 /* Interlaced or Progressive timings */
414 /* Pixel clock edge to drive LCD data */
415 enum omap_dss_signal_edge data_pclk_edge
;
416 /* Data enable logic level */
417 enum omap_dss_signal_level de_level
;
418 /* Pixel clock edges to drive HSYNC and VSYNC signals */
419 enum omap_dss_signal_edge sync_pclk_edge
;
422 #ifdef CONFIG_OMAP2_DSS_VENC
423 /* Hardcoded timings for tv modes. Venc only uses these to
424 * identify the mode, and does not actually use the configs
425 * itself. However, the configs should be something that
426 * a normal monitor can also show */
427 extern const struct omap_video_timings omap_dss_pal_timings
;
428 extern const struct omap_video_timings omap_dss_ntsc_timings
;
431 struct omap_dss_cpr_coefs
{
437 struct omap_overlay_info
{
439 u32 p_uv_addr
; /* for NV12 format */
443 enum omap_color_mode color_mode
;
445 enum omap_dss_rotation_type rotation_type
;
450 u16 out_width
; /* if 0, out_width == width */
451 u16 out_height
; /* if 0, out_height == height */
457 struct omap_overlay
{
459 struct list_head list
;
464 enum omap_color_mode supported_modes
;
465 enum omap_overlay_caps caps
;
468 struct omap_overlay_manager
*manager
;
471 * The following functions do not block:
477 * The rest of the functions may block and cannot be called from
481 int (*enable
)(struct omap_overlay
*ovl
);
482 int (*disable
)(struct omap_overlay
*ovl
);
483 bool (*is_enabled
)(struct omap_overlay
*ovl
);
485 int (*set_manager
)(struct omap_overlay
*ovl
,
486 struct omap_overlay_manager
*mgr
);
487 int (*unset_manager
)(struct omap_overlay
*ovl
);
489 int (*set_overlay_info
)(struct omap_overlay
*ovl
,
490 struct omap_overlay_info
*info
);
491 void (*get_overlay_info
)(struct omap_overlay
*ovl
,
492 struct omap_overlay_info
*info
);
494 int (*wait_for_go
)(struct omap_overlay
*ovl
);
496 struct omap_dss_device
*(*get_device
)(struct omap_overlay
*ovl
);
499 struct omap_overlay_manager_info
{
502 enum omap_dss_trans_key_type trans_key_type
;
506 bool partial_alpha_enabled
;
509 struct omap_dss_cpr_coefs cpr_coefs
;
512 struct omap_overlay_manager
{
517 enum omap_channel id
;
518 enum omap_overlay_manager_caps caps
;
519 struct list_head overlays
;
520 enum omap_display_type supported_displays
;
521 enum omap_dss_output_id supported_outputs
;
524 struct omap_dss_device
*output
;
527 * The following functions do not block:
533 * The rest of the functions may block and cannot be called from
537 int (*set_output
)(struct omap_overlay_manager
*mgr
,
538 struct omap_dss_device
*output
);
539 int (*unset_output
)(struct omap_overlay_manager
*mgr
);
541 int (*set_manager_info
)(struct omap_overlay_manager
*mgr
,
542 struct omap_overlay_manager_info
*info
);
543 void (*get_manager_info
)(struct omap_overlay_manager
*mgr
,
544 struct omap_overlay_manager_info
*info
);
546 int (*apply
)(struct omap_overlay_manager
*mgr
);
547 int (*wait_for_go
)(struct omap_overlay_manager
*mgr
);
548 int (*wait_for_vsync
)(struct omap_overlay_manager
*mgr
);
550 struct omap_dss_device
*(*get_device
)(struct omap_overlay_manager
*mgr
);
553 /* 22 pins means 1 clk lane and 10 data lanes */
554 #define OMAP_DSS_MAX_DSI_PINS 22
556 struct omap_dsi_pin_config
{
559 * pin numbers in the following order:
565 int pins
[OMAP_DSS_MAX_DSI_PINS
];
568 struct omap_dss_writeback_info
{
574 enum omap_color_mode color_mode
;
576 enum omap_dss_rotation_type rotation_type
;
581 struct omapdss_dpi_ops
{
582 int (*connect
)(struct omap_dss_device
*dssdev
,
583 struct omap_dss_device
*dst
);
584 void (*disconnect
)(struct omap_dss_device
*dssdev
,
585 struct omap_dss_device
*dst
);
587 int (*enable
)(struct omap_dss_device
*dssdev
);
588 void (*disable
)(struct omap_dss_device
*dssdev
);
590 int (*check_timings
)(struct omap_dss_device
*dssdev
,
591 struct omap_video_timings
*timings
);
592 void (*set_timings
)(struct omap_dss_device
*dssdev
,
593 struct omap_video_timings
*timings
);
594 void (*get_timings
)(struct omap_dss_device
*dssdev
,
595 struct omap_video_timings
*timings
);
597 void (*set_data_lines
)(struct omap_dss_device
*dssdev
, int data_lines
);
600 struct omapdss_sdi_ops
{
601 int (*connect
)(struct omap_dss_device
*dssdev
,
602 struct omap_dss_device
*dst
);
603 void (*disconnect
)(struct omap_dss_device
*dssdev
,
604 struct omap_dss_device
*dst
);
606 int (*enable
)(struct omap_dss_device
*dssdev
);
607 void (*disable
)(struct omap_dss_device
*dssdev
);
609 int (*check_timings
)(struct omap_dss_device
*dssdev
,
610 struct omap_video_timings
*timings
);
611 void (*set_timings
)(struct omap_dss_device
*dssdev
,
612 struct omap_video_timings
*timings
);
613 void (*get_timings
)(struct omap_dss_device
*dssdev
,
614 struct omap_video_timings
*timings
);
616 void (*set_datapairs
)(struct omap_dss_device
*dssdev
, int datapairs
);
619 struct omapdss_dvi_ops
{
620 int (*connect
)(struct omap_dss_device
*dssdev
,
621 struct omap_dss_device
*dst
);
622 void (*disconnect
)(struct omap_dss_device
*dssdev
,
623 struct omap_dss_device
*dst
);
625 int (*enable
)(struct omap_dss_device
*dssdev
);
626 void (*disable
)(struct omap_dss_device
*dssdev
);
628 int (*check_timings
)(struct omap_dss_device
*dssdev
,
629 struct omap_video_timings
*timings
);
630 void (*set_timings
)(struct omap_dss_device
*dssdev
,
631 struct omap_video_timings
*timings
);
632 void (*get_timings
)(struct omap_dss_device
*dssdev
,
633 struct omap_video_timings
*timings
);
636 struct omapdss_atv_ops
{
637 int (*connect
)(struct omap_dss_device
*dssdev
,
638 struct omap_dss_device
*dst
);
639 void (*disconnect
)(struct omap_dss_device
*dssdev
,
640 struct omap_dss_device
*dst
);
642 int (*enable
)(struct omap_dss_device
*dssdev
);
643 void (*disable
)(struct omap_dss_device
*dssdev
);
645 int (*check_timings
)(struct omap_dss_device
*dssdev
,
646 struct omap_video_timings
*timings
);
647 void (*set_timings
)(struct omap_dss_device
*dssdev
,
648 struct omap_video_timings
*timings
);
649 void (*get_timings
)(struct omap_dss_device
*dssdev
,
650 struct omap_video_timings
*timings
);
652 void (*set_type
)(struct omap_dss_device
*dssdev
,
653 enum omap_dss_venc_type type
);
654 void (*invert_vid_out_polarity
)(struct omap_dss_device
*dssdev
,
655 bool invert_polarity
);
657 int (*set_wss
)(struct omap_dss_device
*dssdev
, u32 wss
);
658 u32 (*get_wss
)(struct omap_dss_device
*dssdev
);
661 struct omapdss_hdmi_ops
{
662 int (*connect
)(struct omap_dss_device
*dssdev
,
663 struct omap_dss_device
*dst
);
664 void (*disconnect
)(struct omap_dss_device
*dssdev
,
665 struct omap_dss_device
*dst
);
667 int (*enable
)(struct omap_dss_device
*dssdev
);
668 void (*disable
)(struct omap_dss_device
*dssdev
);
670 int (*check_timings
)(struct omap_dss_device
*dssdev
,
671 struct omap_video_timings
*timings
);
672 void (*set_timings
)(struct omap_dss_device
*dssdev
,
673 struct omap_video_timings
*timings
);
674 void (*get_timings
)(struct omap_dss_device
*dssdev
,
675 struct omap_video_timings
*timings
);
677 int (*read_edid
)(struct omap_dss_device
*dssdev
, u8
*buf
, int len
);
678 bool (*detect
)(struct omap_dss_device
*dssdev
);
681 * Note: These functions might sleep. Do not call while
682 * holding a spinlock/readlock.
684 int (*audio_enable
)(struct omap_dss_device
*dssdev
);
685 void (*audio_disable
)(struct omap_dss_device
*dssdev
);
686 bool (*audio_supported
)(struct omap_dss_device
*dssdev
);
687 int (*audio_config
)(struct omap_dss_device
*dssdev
,
688 struct omap_dss_audio
*audio
);
689 /* Note: These functions may not sleep */
690 int (*audio_start
)(struct omap_dss_device
*dssdev
);
691 void (*audio_stop
)(struct omap_dss_device
*dssdev
);
694 struct omapdss_dsi_ops
{
695 int (*connect
)(struct omap_dss_device
*dssdev
,
696 struct omap_dss_device
*dst
);
697 void (*disconnect
)(struct omap_dss_device
*dssdev
,
698 struct omap_dss_device
*dst
);
700 int (*enable
)(struct omap_dss_device
*dssdev
);
701 void (*disable
)(struct omap_dss_device
*dssdev
, bool disconnect_lanes
,
704 /* bus configuration */
705 int (*set_config
)(struct omap_dss_device
*dssdev
,
706 const struct omap_dss_dsi_config
*cfg
);
707 int (*configure_pins
)(struct omap_dss_device
*dssdev
,
708 const struct omap_dsi_pin_config
*pin_cfg
);
710 void (*enable_hs
)(struct omap_dss_device
*dssdev
, int channel
,
712 int (*enable_te
)(struct omap_dss_device
*dssdev
, bool enable
);
714 int (*update
)(struct omap_dss_device
*dssdev
, int channel
,
715 void (*callback
)(int, void *), void *data
);
717 void (*bus_lock
)(struct omap_dss_device
*dssdev
);
718 void (*bus_unlock
)(struct omap_dss_device
*dssdev
);
720 int (*enable_video_output
)(struct omap_dss_device
*dssdev
, int channel
);
721 void (*disable_video_output
)(struct omap_dss_device
*dssdev
,
724 int (*request_vc
)(struct omap_dss_device
*dssdev
, int *channel
);
725 int (*set_vc_id
)(struct omap_dss_device
*dssdev
, int channel
,
727 void (*release_vc
)(struct omap_dss_device
*dssdev
, int channel
);
730 int (*dcs_write
)(struct omap_dss_device
*dssdev
, int channel
,
732 int (*dcs_write_nosync
)(struct omap_dss_device
*dssdev
, int channel
,
734 int (*dcs_read
)(struct omap_dss_device
*dssdev
, int channel
, u8 dcs_cmd
,
737 int (*gen_write
)(struct omap_dss_device
*dssdev
, int channel
,
739 int (*gen_write_nosync
)(struct omap_dss_device
*dssdev
, int channel
,
741 int (*gen_read
)(struct omap_dss_device
*dssdev
, int channel
,
742 u8
*reqdata
, int reqlen
,
745 int (*bta_sync
)(struct omap_dss_device
*dssdev
, int channel
);
747 int (*set_max_rx_packet_size
)(struct omap_dss_device
*dssdev
,
748 int channel
, u16 plen
);
751 struct omap_dss_device
{
752 /* old device, to be removed */
753 struct device old_dev
;
755 /* new device, pointer to panel device */
758 struct module
*owner
;
760 struct list_head panel_list
;
762 /* alias in the form of "display%d" */
765 enum omap_display_type type
;
766 enum omap_display_type output_type
;
787 enum omap_dss_venc_type type
;
788 bool invert_polarity
;
793 struct omap_video_timings timings
;
795 enum omap_dss_dsi_pixel_format dsi_pix_fmt
;
796 enum omap_dss_dsi_mode dsi_mode
;
801 struct rfbi_timings rfbi_timings
;
806 /* used to match device to driver */
807 const char *driver_name
;
811 struct omap_dss_driver
*driver
;
814 const struct omapdss_dpi_ops
*dpi
;
815 const struct omapdss_sdi_ops
*sdi
;
816 const struct omapdss_dvi_ops
*dvi
;
817 const struct omapdss_hdmi_ops
*hdmi
;
818 const struct omapdss_atv_ops
*atv
;
819 const struct omapdss_dsi_ops
*dsi
;
822 /* helper variable for driver suspend/resume */
823 bool activate_after_resume
;
825 enum omap_display_caps caps
;
827 struct omap_dss_device
*output
;
829 enum omap_dss_display_state state
;
831 enum omap_dss_audio_state audio_state
;
833 /* OMAP DSS output specific fields */
835 struct list_head list
;
837 /* DISPC channel for this output */
838 enum omap_channel dispc_channel
;
840 /* output instance */
841 enum omap_dss_output_id id
;
844 struct omap_overlay_manager
*manager
;
846 struct omap_dss_device
*device
;
849 struct omap_dss_hdmi_data
856 struct omap_dss_driver
{
857 struct device_driver driver
;
859 int (*probe
)(struct omap_dss_device
*);
860 void (*remove
)(struct omap_dss_device
*);
862 int (*connect
)(struct omap_dss_device
*dssdev
);
863 void (*disconnect
)(struct omap_dss_device
*dssdev
);
865 int (*enable
)(struct omap_dss_device
*display
);
866 void (*disable
)(struct omap_dss_device
*display
);
867 int (*run_test
)(struct omap_dss_device
*display
, int test
);
869 int (*update
)(struct omap_dss_device
*dssdev
,
870 u16 x
, u16 y
, u16 w
, u16 h
);
871 int (*sync
)(struct omap_dss_device
*dssdev
);
873 int (*enable_te
)(struct omap_dss_device
*dssdev
, bool enable
);
874 int (*get_te
)(struct omap_dss_device
*dssdev
);
876 u8 (*get_rotate
)(struct omap_dss_device
*dssdev
);
877 int (*set_rotate
)(struct omap_dss_device
*dssdev
, u8 rotate
);
879 bool (*get_mirror
)(struct omap_dss_device
*dssdev
);
880 int (*set_mirror
)(struct omap_dss_device
*dssdev
, bool enable
);
882 int (*memory_read
)(struct omap_dss_device
*dssdev
,
883 void *buf
, size_t size
,
884 u16 x
, u16 y
, u16 w
, u16 h
);
886 void (*get_resolution
)(struct omap_dss_device
*dssdev
,
887 u16
*xres
, u16
*yres
);
888 void (*get_dimensions
)(struct omap_dss_device
*dssdev
,
889 u32
*width
, u32
*height
);
890 int (*get_recommended_bpp
)(struct omap_dss_device
*dssdev
);
892 int (*check_timings
)(struct omap_dss_device
*dssdev
,
893 struct omap_video_timings
*timings
);
894 void (*set_timings
)(struct omap_dss_device
*dssdev
,
895 struct omap_video_timings
*timings
);
896 void (*get_timings
)(struct omap_dss_device
*dssdev
,
897 struct omap_video_timings
*timings
);
899 int (*set_wss
)(struct omap_dss_device
*dssdev
, u32 wss
);
900 u32 (*get_wss
)(struct omap_dss_device
*dssdev
);
902 int (*read_edid
)(struct omap_dss_device
*dssdev
, u8
*buf
, int len
);
903 bool (*detect
)(struct omap_dss_device
*dssdev
);
906 * For display drivers that support audio. This encompasses
907 * HDMI and DisplayPort at the moment.
910 * Note: These functions might sleep. Do not call while
911 * holding a spinlock/readlock.
913 int (*audio_enable
)(struct omap_dss_device
*dssdev
);
914 void (*audio_disable
)(struct omap_dss_device
*dssdev
);
915 bool (*audio_supported
)(struct omap_dss_device
*dssdev
);
916 int (*audio_config
)(struct omap_dss_device
*dssdev
,
917 struct omap_dss_audio
*audio
);
918 /* Note: These functions may not sleep */
919 int (*audio_start
)(struct omap_dss_device
*dssdev
);
920 void (*audio_stop
)(struct omap_dss_device
*dssdev
);
924 enum omapdss_version
omapdss_get_version(void);
925 bool omapdss_is_initialized(void);
927 int omap_dss_register_driver(struct omap_dss_driver
*);
928 void omap_dss_unregister_driver(struct omap_dss_driver
*);
930 int omapdss_register_display(struct omap_dss_device
*dssdev
);
931 void omapdss_unregister_display(struct omap_dss_device
*dssdev
);
933 struct omap_dss_device
*omap_dss_get_device(struct omap_dss_device
*dssdev
);
934 void omap_dss_put_device(struct omap_dss_device
*dssdev
);
935 #define for_each_dss_dev(d) while ((d = omap_dss_get_next_device(d)) != NULL)
936 struct omap_dss_device
*omap_dss_get_next_device(struct omap_dss_device
*from
);
937 struct omap_dss_device
*omap_dss_find_device(void *data
,
938 int (*match
)(struct omap_dss_device
*dssdev
, void *data
));
939 const char *omapdss_get_default_display_name(void);
941 void videomode_to_omap_video_timings(const struct videomode
*vm
,
942 struct omap_video_timings
*ovt
);
943 void omap_video_timings_to_videomode(const struct omap_video_timings
*ovt
,
944 struct videomode
*vm
);
946 int dss_feat_get_num_mgrs(void);
947 int dss_feat_get_num_ovls(void);
948 enum omap_display_type
dss_feat_get_supported_displays(enum omap_channel channel
);
949 enum omap_dss_output_id
dss_feat_get_supported_outputs(enum omap_channel channel
);
950 enum omap_color_mode
dss_feat_get_supported_color_modes(enum omap_plane plane
);
954 int omap_dss_get_num_overlay_managers(void);
955 struct omap_overlay_manager
*omap_dss_get_overlay_manager(int num
);
957 int omap_dss_get_num_overlays(void);
958 struct omap_overlay
*omap_dss_get_overlay(int num
);
960 int omapdss_register_output(struct omap_dss_device
*output
);
961 void omapdss_unregister_output(struct omap_dss_device
*output
);
962 struct omap_dss_device
*omap_dss_get_output(enum omap_dss_output_id id
);
963 struct omap_dss_device
*omap_dss_find_output(const char *name
);
964 struct omap_dss_device
*omap_dss_find_output_by_node(struct device_node
*node
);
965 int omapdss_output_set_device(struct omap_dss_device
*out
,
966 struct omap_dss_device
*dssdev
);
967 int omapdss_output_unset_device(struct omap_dss_device
*out
);
969 struct omap_dss_device
*omapdss_find_output_from_display(struct omap_dss_device
*dssdev
);
970 struct omap_overlay_manager
*omapdss_find_mgr_from_display(struct omap_dss_device
*dssdev
);
972 void omapdss_default_get_resolution(struct omap_dss_device
*dssdev
,
973 u16
*xres
, u16
*yres
);
974 int omapdss_default_get_recommended_bpp(struct omap_dss_device
*dssdev
);
975 void omapdss_default_get_timings(struct omap_dss_device
*dssdev
,
976 struct omap_video_timings
*timings
);
978 typedef void (*omap_dispc_isr_t
) (void *arg
, u32 mask
);
979 int omap_dispc_register_isr(omap_dispc_isr_t isr
, void *arg
, u32 mask
);
980 int omap_dispc_unregister_isr(omap_dispc_isr_t isr
, void *arg
, u32 mask
);
982 u32
dispc_read_irqstatus(void);
983 void dispc_clear_irqstatus(u32 mask
);
984 u32
dispc_read_irqenable(void);
985 void dispc_write_irqenable(u32 mask
);
987 int dispc_request_irq(irq_handler_t handler
, void *dev_id
);
988 void dispc_free_irq(void *dev_id
);
990 int dispc_runtime_get(void);
991 void dispc_runtime_put(void);
993 void dispc_mgr_enable(enum omap_channel channel
, bool enable
);
994 bool dispc_mgr_is_enabled(enum omap_channel channel
);
995 u32
dispc_mgr_get_vsync_irq(enum omap_channel channel
);
996 u32
dispc_mgr_get_framedone_irq(enum omap_channel channel
);
997 u32
dispc_mgr_get_sync_lost_irq(enum omap_channel channel
);
998 bool dispc_mgr_go_busy(enum omap_channel channel
);
999 void dispc_mgr_go(enum omap_channel channel
);
1000 void dispc_mgr_set_lcd_config(enum omap_channel channel
,
1001 const struct dss_lcd_mgr_config
*config
);
1002 void dispc_mgr_set_timings(enum omap_channel channel
,
1003 const struct omap_video_timings
*timings
);
1004 void dispc_mgr_setup(enum omap_channel channel
,
1005 const struct omap_overlay_manager_info
*info
);
1007 int dispc_ovl_check(enum omap_plane plane
, enum omap_channel channel
,
1008 const struct omap_overlay_info
*oi
,
1009 const struct omap_video_timings
*timings
,
1010 int *x_predecim
, int *y_predecim
);
1012 int dispc_ovl_enable(enum omap_plane plane
, bool enable
);
1013 bool dispc_ovl_enabled(enum omap_plane plane
);
1014 void dispc_ovl_set_channel_out(enum omap_plane plane
,
1015 enum omap_channel channel
);
1016 int dispc_ovl_setup(enum omap_plane plane
, const struct omap_overlay_info
*oi
,
1017 bool replication
, const struct omap_video_timings
*mgr_timings
,
1020 #define to_dss_driver(x) container_of((x), struct omap_dss_driver, driver)
1021 #define to_dss_device(x) container_of((x), struct omap_dss_device, old_dev)
1023 void omapdss_dsi_vc_enable_hs(struct omap_dss_device
*dssdev
, int channel
,
1025 int omapdss_dsi_enable_te(struct omap_dss_device
*dssdev
, bool enable
);
1026 int omapdss_dsi_set_config(struct omap_dss_device
*dssdev
,
1027 const struct omap_dss_dsi_config
*config
);
1029 int omap_dsi_update(struct omap_dss_device
*dssdev
, int channel
,
1030 void (*callback
)(int, void *), void *data
);
1031 int omap_dsi_request_vc(struct omap_dss_device
*dssdev
, int *channel
);
1032 int omap_dsi_set_vc_id(struct omap_dss_device
*dssdev
, int channel
, int vc_id
);
1033 void omap_dsi_release_vc(struct omap_dss_device
*dssdev
, int channel
);
1034 int omapdss_dsi_configure_pins(struct omap_dss_device
*dssdev
,
1035 const struct omap_dsi_pin_config
*pin_cfg
);
1037 int omapdss_dsi_display_enable(struct omap_dss_device
*dssdev
);
1038 void omapdss_dsi_display_disable(struct omap_dss_device
*dssdev
,
1039 bool disconnect_lanes
, bool enter_ulps
);
1041 int omapdss_sdi_display_enable(struct omap_dss_device
*dssdev
);
1042 void omapdss_sdi_display_disable(struct omap_dss_device
*dssdev
);
1043 void omapdss_sdi_set_timings(struct omap_dss_device
*dssdev
,
1044 struct omap_video_timings
*timings
);
1045 void omapdss_sdi_set_datapairs(struct omap_dss_device
*dssdev
, int datapairs
);
1047 int omapdss_rfbi_display_enable(struct omap_dss_device
*dssdev
);
1048 void omapdss_rfbi_display_disable(struct omap_dss_device
*dssdev
);
1049 int omap_rfbi_update(struct omap_dss_device
*dssdev
, void (*callback
)(void *),
1051 int omap_rfbi_configure(struct omap_dss_device
*dssdev
);
1052 void omapdss_rfbi_set_size(struct omap_dss_device
*dssdev
, u16 w
, u16 h
);
1053 void omapdss_rfbi_set_pixel_size(struct omap_dss_device
*dssdev
,
1055 void omapdss_rfbi_set_data_lines(struct omap_dss_device
*dssdev
,
1057 void omapdss_rfbi_set_interface_timings(struct omap_dss_device
*dssdev
,
1058 struct rfbi_timings
*timings
);
1060 int omapdss_compat_init(void);
1061 void omapdss_compat_uninit(void);
1063 struct dss_mgr_ops
{
1064 int (*connect
)(struct omap_overlay_manager
*mgr
,
1065 struct omap_dss_device
*dst
);
1066 void (*disconnect
)(struct omap_overlay_manager
*mgr
,
1067 struct omap_dss_device
*dst
);
1069 void (*start_update
)(struct omap_overlay_manager
*mgr
);
1070 int (*enable
)(struct omap_overlay_manager
*mgr
);
1071 void (*disable
)(struct omap_overlay_manager
*mgr
);
1072 void (*set_timings
)(struct omap_overlay_manager
*mgr
,
1073 const struct omap_video_timings
*timings
);
1074 void (*set_lcd_config
)(struct omap_overlay_manager
*mgr
,
1075 const struct dss_lcd_mgr_config
*config
);
1076 int (*register_framedone_handler
)(struct omap_overlay_manager
*mgr
,
1077 void (*handler
)(void *), void *data
);
1078 void (*unregister_framedone_handler
)(struct omap_overlay_manager
*mgr
,
1079 void (*handler
)(void *), void *data
);
1082 int dss_install_mgr_ops(const struct dss_mgr_ops
*mgr_ops
);
1083 void dss_uninstall_mgr_ops(void);
1085 int dss_mgr_connect(struct omap_overlay_manager
*mgr
,
1086 struct omap_dss_device
*dst
);
1087 void dss_mgr_disconnect(struct omap_overlay_manager
*mgr
,
1088 struct omap_dss_device
*dst
);
1089 void dss_mgr_set_timings(struct omap_overlay_manager
*mgr
,
1090 const struct omap_video_timings
*timings
);
1091 void dss_mgr_set_lcd_config(struct omap_overlay_manager
*mgr
,
1092 const struct dss_lcd_mgr_config
*config
);
1093 int dss_mgr_enable(struct omap_overlay_manager
*mgr
);
1094 void dss_mgr_disable(struct omap_overlay_manager
*mgr
);
1095 void dss_mgr_start_update(struct omap_overlay_manager
*mgr
);
1096 int dss_mgr_register_framedone_handler(struct omap_overlay_manager
*mgr
,
1097 void (*handler
)(void *), void *data
);
1098 void dss_mgr_unregister_framedone_handler(struct omap_overlay_manager
*mgr
,
1099 void (*handler
)(void *), void *data
);
1101 static inline bool omapdss_device_is_connected(struct omap_dss_device
*dssdev
)
1103 return dssdev
->output
;
1106 static inline bool omapdss_device_is_enabled(struct omap_dss_device
*dssdev
)
1108 return dssdev
->state
== OMAP_DSS_DISPLAY_ACTIVE
;