kernel/dma/mapping.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * arch-independent dma-mapping routines
   4  *
   5  * Copyright (c) 2006  SUSE Linux Products GmbH
   6  * Copyright (c) 2006  Tejun Heo <teheo@suse.de>
   7  */
   8 #include <linux/memblock.h> /* for max_pfn */
   9 #include <linux/acpi.h>
  10 #include <linux/dma-map-ops.h>
  11 #include <linux/export.h>
  12 #include <linux/gfp.h>
  13 #include <linux/of_device.h>
  14 #include <linux/slab.h>
  15 #include <linux/vmalloc.h>
  16 #include "debug.h"
  17 #include "direct.h"
  18
  19 /*
  20  * Managed DMA API
  21  */
  22 struct dma_devres {
  23         size_t          size;
  24         void            *vaddr;
  25         dma_addr_t      dma_handle;
  26         unsigned long   attrs;
  27 };
  28
  29 static void dmam_release(struct device *dev, void *res)
  30 {
  31         struct dma_devres *this = res;
  32
  33         dma_free_attrs(dev, this->size, this->vaddr, this->dma_handle,
  34                         this->attrs);
  35 }
  36
  37 static int dmam_match(struct device *dev, void *res, void *match_data)
  38 {
  39         struct dma_devres *this = res, *match = match_data;
  40
  41         if (this->vaddr == match->vaddr) {
  42                 WARN_ON(this->size != match->size ||
  43                         this->dma_handle != match->dma_handle);
  44                 return 1;
  45         }
  46         return 0;
  47 }
  48
  49 /**
  50  * dmam_free_coherent - Managed dma_free_coherent()
  51  * @dev: Device to free coherent memory for
  52  * @size: Size of allocation
  53  * @vaddr: Virtual address of the memory to free
  54  * @dma_handle: DMA handle of the memory to free
  55  *
  56  * Managed dma_free_coherent().
  57  */
  58 void dmam_free_coherent(struct device *dev, size_t size, void *vaddr,
  59                         dma_addr_t dma_handle)
  60 {
  61         struct dma_devres match_data = { size, vaddr, dma_handle };
  62
  63         dma_free_coherent(dev, size, vaddr, dma_handle);
  64         WARN_ON(devres_destroy(dev, dmam_release, dmam_match, &match_data));
  65 }
  66 EXPORT_SYMBOL(dmam_free_coherent);
  67
  68 /**
  69  * dmam_alloc_attrs - Managed dma_alloc_attrs()
  70  * @dev: Device to allocate non_coherent memory for
  71  * @size: Size of allocation
  72  * @dma_handle: Out argument for allocated DMA handle
  73  * @gfp: Allocation flags
  74  * @attrs: Flags in the DMA_ATTR_* namespace.
  75  *
  76  * Managed dma_alloc_attrs().  Memory allocated using this function will be
  77  * automatically released on driver detach.
  78  *
  79  * RETURNS:
  80  * Pointer to allocated memory on success, NULL on failure.
  81  */
  82 void *dmam_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle,
  83                 gfp_t gfp, unsigned long attrs)
  84 {
  85         struct dma_devres *dr;
  86         void *vaddr;
  87
  88         dr = devres_alloc(dmam_release, sizeof(*dr), gfp);
  89         if (!dr)
  90                 return NULL;
  91
  92         vaddr = dma_alloc_attrs(dev, size, dma_handle, gfp, attrs);
  93         if (!vaddr) {
  94                 devres_free(dr);
  95                 return NULL;
  96         }
  97
  98         dr->vaddr = vaddr;
  99         dr->dma_handle = *dma_handle;
 100         dr->size = size;
 101         dr->attrs = attrs;
 102
 103         devres_add(dev, dr);
 104
 105         return vaddr;
 106 }
 107 EXPORT_SYMBOL(dmam_alloc_attrs);
 108
 109 static bool dma_go_direct(struct device *dev, dma_addr_t mask,
 110                 const struct dma_map_ops *ops)
 111 {
 112         if (likely(!ops))
 113                 return true;
 114 #ifdef CONFIG_DMA_OPS_BYPASS
 115         if (dev->dma_ops_bypass)
 116                 return min_not_zero(mask, dev->bus_dma_limit) >=
 117                             dma_direct_get_required_mask(dev);
 118 #endif
 119         return false;
 120 }
 121
 122
 123 /*
 124  * Check if the devices uses a direct mapping for streaming DMA operations.
 125  * This allows IOMMU drivers to set a bypass mode if the DMA mask is large
 126  * enough.
 127  */
 128 static inline bool dma_alloc_direct(struct device *dev,
 129                 const struct dma_map_ops *ops)
 130 {
 131         return dma_go_direct(dev, dev->coherent_dma_mask, ops);
 132 }
 133
 134 static inline bool dma_map_direct(struct device *dev,
 135                 const struct dma_map_ops *ops)
 136 {
 137         return dma_go_direct(dev, *dev->dma_mask, ops);
 138 }
 139
 140 dma_addr_t dma_map_page_attrs(struct device *dev, struct page *page,
 141                 size_t offset, size_t size, enum dma_data_direction dir,
 142                 unsigned long attrs)
 143 {
 144         const struct dma_map_ops *ops = get_dma_ops(dev);
 145         dma_addr_t addr;
 146
 147         BUG_ON(!valid_dma_direction(dir));
 148
 149         if (WARN_ON_ONCE(!dev->dma_mask))
 150                 return DMA_MAPPING_ERROR;
 151
 152         if (dma_map_direct(dev, ops) ||
 153             arch_dma_map_page_direct(dev, page_to_phys(page) + offset + size))
 154                 addr = dma_direct_map_page(dev, page, offset, size, dir, attrs);
 155         else
 156                 addr = ops->map_page(dev, page, offset, size, dir, attrs);
 157         debug_dma_map_page(dev, page, offset, size, dir, addr);
 158
 159         return addr;
 160 }
 161 EXPORT_SYMBOL(dma_map_page_attrs);
 162
 163 void dma_unmap_page_attrs(struct device *dev, dma_addr_t addr, size_t size,
 164                 enum dma_data_direction dir, unsigned long attrs)
 165 {
 166         const struct dma_map_ops *ops = get_dma_ops(dev);
 167
 168         BUG_ON(!valid_dma_direction(dir));
 169         if (dma_map_direct(dev, ops) ||
 170             arch_dma_unmap_page_direct(dev, addr + size))
 171                 dma_direct_unmap_page(dev, addr, size, dir, attrs);
 172         else if (ops->unmap_page)
 173                 ops->unmap_page(dev, addr, size, dir, attrs);
 174         debug_dma_unmap_page(dev, addr, size, dir);
 175 }
 176 EXPORT_SYMBOL(dma_unmap_page_attrs);
 177
 178 /*
 179  * dma_maps_sg_attrs returns 0 on error and > 0 on success.
 180  * It should never return a value < 0.
 181  */
 182 int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg, int nents,
 183                 enum dma_data_direction dir, unsigned long attrs)
 184 {
 185         const struct dma_map_ops *ops = get_dma_ops(dev);
 186         int ents;
 187
 188         BUG_ON(!valid_dma_direction(dir));
 189
 190         if (WARN_ON_ONCE(!dev->dma_mask))
 191                 return 0;
 192
 193         if (dma_map_direct(dev, ops) ||
 194             arch_dma_map_sg_direct(dev, sg, nents))
 195                 ents = dma_direct_map_sg(dev, sg, nents, dir, attrs);
 196         else
 197                 ents = ops->map_sg(dev, sg, nents, dir, attrs);
 198         BUG_ON(ents < 0);
 199         debug_dma_map_sg(dev, sg, nents, ents, dir);
 200
 201         return ents;
 202 }
 203 EXPORT_SYMBOL(dma_map_sg_attrs);
 204
 205 void dma_unmap_sg_attrs(struct device *dev, struct scatterlist *sg,
 206                                       int nents, enum dma_data_direction dir,
 207                                       unsigned long attrs)
 208 {
 209         const struct dma_map_ops *ops = get_dma_ops(dev);
 210
 211         BUG_ON(!valid_dma_direction(dir));
 212         debug_dma_unmap_sg(dev, sg, nents, dir);
 213         if (dma_map_direct(dev, ops) ||
 214             arch_dma_unmap_sg_direct(dev, sg, nents))
 215                 dma_direct_unmap_sg(dev, sg, nents, dir, attrs);
 216         else if (ops->unmap_sg)
 217                 ops->unmap_sg(dev, sg, nents, dir, attrs);
 218 }
 219 EXPORT_SYMBOL(dma_unmap_sg_attrs);
 220
 221 dma_addr_t dma_map_resource(struct device *dev, phys_addr_t phys_addr,
 222                 size_t size, enum dma_data_direction dir, unsigned long attrs)
 223 {
 224         const struct dma_map_ops *ops = get_dma_ops(dev);
 225         dma_addr_t addr = DMA_MAPPING_ERROR;
 226
 227         BUG_ON(!valid_dma_direction(dir));
 228
 229         if (WARN_ON_ONCE(!dev->dma_mask))
 230                 return DMA_MAPPING_ERROR;
 231
 232         /* Don't allow RAM to be mapped */
 233         if (WARN_ON_ONCE(pfn_valid(PHYS_PFN(phys_addr))))
 234                 return DMA_MAPPING_ERROR;
 235
 236         if (dma_map_direct(dev, ops))
 237                 addr = dma_direct_map_resource(dev, phys_addr, size, dir, attrs);
 238         else if (ops->map_resource)
 239                 addr = ops->map_resource(dev, phys_addr, size, dir, attrs);
 240
 241         debug_dma_map_resource(dev, phys_addr, size, dir, addr);
 242         return addr;
 243 }
 244 EXPORT_SYMBOL(dma_map_resource);
 245
 246 void dma_unmap_resource(struct device *dev, dma_addr_t addr, size_t size,
 247                 enum dma_data_direction dir, unsigned long attrs)
 248 {
 249         const struct dma_map_ops *ops = get_dma_ops(dev);
 250
 251         BUG_ON(!valid_dma_direction(dir));
 252         if (!dma_map_direct(dev, ops) && ops->unmap_resource)
 253                 ops->unmap_resource(dev, addr, size, dir, attrs);
 254         debug_dma_unmap_resource(dev, addr, size, dir);
 255 }
 256 EXPORT_SYMBOL(dma_unmap_resource);
 257
 258 void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr, size_t size,
 259                 enum dma_data_direction dir)
 260 {
 261         const struct dma_map_ops *ops = get_dma_ops(dev);
 262
 263         BUG_ON(!valid_dma_direction(dir));
 264         if (dma_map_direct(dev, ops))
 265                 dma_direct_sync_single_for_cpu(dev, addr, size, dir);
 266         else if (ops->sync_single_for_cpu)
 267                 ops->sync_single_for_cpu(dev, addr, size, dir);
 268         debug_dma_sync_single_for_cpu(dev, addr, size, dir);
 269 }
 270 EXPORT_SYMBOL(dma_sync_single_for_cpu);
 271
 272 void dma_sync_single_for_device(struct device *dev, dma_addr_t addr,
 273                 size_t size, enum dma_data_direction dir)
 274 {
 275         const struct dma_map_ops *ops = get_dma_ops(dev);
 276
 277         BUG_ON(!valid_dma_direction(dir));
 278         if (dma_map_direct(dev, ops))
 279                 dma_direct_sync_single_for_device(dev, addr, size, dir);
 280         else if (ops->sync_single_for_device)
 281                 ops->sync_single_for_device(dev, addr, size, dir);
 282         debug_dma_sync_single_for_device(dev, addr, size, dir);
 283 }
 284 EXPORT_SYMBOL(dma_sync_single_for_device);
 285
 286 void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
 287                     int nelems, enum dma_data_direction dir)
 288 {
 289         const struct dma_map_ops *ops = get_dma_ops(dev);
 290
 291         BUG_ON(!valid_dma_direction(dir));
 292         if (dma_map_direct(dev, ops))
 293                 dma_direct_sync_sg_for_cpu(dev, sg, nelems, dir);
 294         else if (ops->sync_sg_for_cpu)
 295                 ops->sync_sg_for_cpu(dev, sg, nelems, dir);
 296         debug_dma_sync_sg_for_cpu(dev, sg, nelems, dir);
 297 }
 298 EXPORT_SYMBOL(dma_sync_sg_for_cpu);
 299
 300 void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
 301                        int nelems, enum dma_data_direction dir)
 302 {
 303         const struct dma_map_ops *ops = get_dma_ops(dev);
 304
 305         BUG_ON(!valid_dma_direction(dir));
 306         if (dma_map_direct(dev, ops))
 307                 dma_direct_sync_sg_for_device(dev, sg, nelems, dir);
 308         else if (ops->sync_sg_for_device)
 309                 ops->sync_sg_for_device(dev, sg, nelems, dir);
 310         debug_dma_sync_sg_for_device(dev, sg, nelems, dir);
 311 }
 312 EXPORT_SYMBOL(dma_sync_sg_for_device);
 313
 314 /*
 315  * The whole dma_get_sgtable() idea is fundamentally unsafe - it seems
 316  * that the intention is to allow exporting memory allocated via the
 317  * coherent DMA APIs through the dma_buf API, which only accepts a
 318  * scattertable.  This presents a couple of problems:
 319  * 1. Not all memory allocated via the coherent DMA APIs is backed by
 320  *    a struct page
 321  * 2. Passing coherent DMA memory into the streaming APIs is not allowed
 322  *    as we will try to flush the memory through a different alias to that
 323  *    actually being used (and the flushes are redundant.)
 324  */
 325 int dma_get_sgtable_attrs(struct device *dev, struct sg_table *sgt,
 326                 void *cpu_addr, dma_addr_t dma_addr, size_t size,
 327                 unsigned long attrs)
 328 {
 329         const struct dma_map_ops *ops = get_dma_ops(dev);
 330
 331         if (dma_alloc_direct(dev, ops))
 332                 return dma_direct_get_sgtable(dev, sgt, cpu_addr, dma_addr,
 333                                 size, attrs);
 334         if (!ops->get_sgtable)
 335                 return -ENXIO;
 336         return ops->get_sgtable(dev, sgt, cpu_addr, dma_addr, size, attrs);
 337 }
 338 EXPORT_SYMBOL(dma_get_sgtable_attrs);
 339
 340 #ifdef CONFIG_MMU
 341 /*
 342  * Return the page attributes used for mapping dma_alloc_* memory, either in
 343  * kernel space if remapping is needed, or to userspace through dma_mmap_*.
 344  */
 345 pgprot_t dma_pgprot(struct device *dev, pgprot_t prot, unsigned long attrs)
 346 {
 347         if (force_dma_unencrypted(dev))
 348                 prot = pgprot_decrypted(prot);
 349         if (dev_is_dma_coherent(dev))
 350                 return prot;
 351 #ifdef CONFIG_ARCH_HAS_DMA_WRITE_COMBINE
 352         if (attrs & DMA_ATTR_WRITE_COMBINE)
 353                 return pgprot_writecombine(prot);
 354 #endif
 355         return pgprot_dmacoherent(prot);
 356 }
 357 #endif /* CONFIG_MMU */
 358
 359 /**
 360  * dma_can_mmap - check if a given device supports dma_mmap_*
 361  * @dev: device to check
 362  *
 363  * Returns %true if @dev supports dma_mmap_coherent() and dma_mmap_attrs() to
 364  * map DMA allocations to userspace.
 365  */
 366 bool dma_can_mmap(struct device *dev)
 367 {
 368         const struct dma_map_ops *ops = get_dma_ops(dev);
 369
 370         if (dma_alloc_direct(dev, ops))
 371                 return dma_direct_can_mmap(dev);
 372         return ops->mmap != NULL;
 373 }
 374 EXPORT_SYMBOL_GPL(dma_can_mmap);
 375
 376 /**
 377  * dma_mmap_attrs - map a coherent DMA allocation into user space
 378  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
 379  * @vma: vm_area_struct describing requested user mapping
 380  * @cpu_addr: kernel CPU-view address returned from dma_alloc_attrs
 381  * @dma_addr: device-view address returned from dma_alloc_attrs
 382  * @size: size of memory originally requested in dma_alloc_attrs
 383  * @attrs: attributes of mapping properties requested in dma_alloc_attrs
 384  *
 385  * Map a coherent DMA buffer previously allocated by dma_alloc_attrs into user
 386  * space.  The coherent DMA buffer must not be freed by the driver until the
 387  * user space mapping has been released.
 388  */
 389 int dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
 390                 void *cpu_addr, dma_addr_t dma_addr, size_t size,
 391                 unsigned long attrs)
 392 {
 393         const struct dma_map_ops *ops = get_dma_ops(dev);
 394
 395         if (dma_alloc_direct(dev, ops))
 396                 return dma_direct_mmap(dev, vma, cpu_addr, dma_addr, size,
 397                                 attrs);
 398         if (!ops->mmap)
 399                 return -ENXIO;
 400         return ops->mmap(dev, vma, cpu_addr, dma_addr, size, attrs);
 401 }
 402 EXPORT_SYMBOL(dma_mmap_attrs);
 403
 404 u64 dma_get_required_mask(struct device *dev)
 405 {
 406         const struct dma_map_ops *ops = get_dma_ops(dev);
 407
 408         if (dma_alloc_direct(dev, ops))
 409                 return dma_direct_get_required_mask(dev);
 410         if (ops->get_required_mask)
 411                 return ops->get_required_mask(dev);
 412
 413         /*
 414          * We require every DMA ops implementation to at least support a 32-bit
 415          * DMA mask (and use bounce buffering if that isn't supported in
 416          * hardware).  As the direct mapping code has its own routine to
 417          * actually report an optimal mask we default to 32-bit here as that
 418          * is the right thing for most IOMMUs, and at least not actively
 419          * harmful in general.
 420          */
 421         return DMA_BIT_MASK(32);
 422 }
 423 EXPORT_SYMBOL_GPL(dma_get_required_mask);
 424
 425 void *dma_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle,
 426                 gfp_t flag, unsigned long attrs)
 427 {
 428         const struct dma_map_ops *ops = get_dma_ops(dev);
 429         void *cpu_addr;
 430
 431         WARN_ON_ONCE(!dev->coherent_dma_mask);
 432
 433         if (dma_alloc_from_dev_coherent(dev, size, dma_handle, &cpu_addr))
 434                 return cpu_addr;
 435
 436         /* let the implementation decide on the zone to allocate from: */
 437         flag &= ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM);
 438
 439         if (dma_alloc_direct(dev, ops))
 440                 cpu_addr = dma_direct_alloc(dev, size, dma_handle, flag, attrs);
 441         else if (ops->alloc)
 442                 cpu_addr = ops->alloc(dev, size, dma_handle, flag, attrs);
 443         else
 444                 return NULL;
 445
 446         debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr);
 447         return cpu_addr;
 448 }
 449 EXPORT_SYMBOL(dma_alloc_attrs);
 450
 451 void dma_free_attrs(struct device *dev, size_t size, void *cpu_addr,
 452                 dma_addr_t dma_handle, unsigned long attrs)
 453 {
 454         const struct dma_map_ops *ops = get_dma_ops(dev);
 455
 456         if (dma_release_from_dev_coherent(dev, get_order(size), cpu_addr))
 457                 return;
 458         /*
 459          * On non-coherent platforms which implement DMA-coherent buffers via
 460          * non-cacheable remaps, ops->free() may call vunmap(). Thus getting
 461          * this far in IRQ context is a) at risk of a BUG_ON() or trying to
 462          * sleep on some machines, and b) an indication that the driver is
 463          * probably misusing the coherent API anyway.
 464          */
 465         WARN_ON(irqs_disabled());
 466
 467         if (!cpu_addr)
 468                 return;
 469
 470         debug_dma_free_coherent(dev, size, cpu_addr, dma_handle);
 471         if (dma_alloc_direct(dev, ops))
 472                 dma_direct_free(dev, size, cpu_addr, dma_handle, attrs);
 473         else if (ops->free)
 474                 ops->free(dev, size, cpu_addr, dma_handle, attrs);
 475 }
 476 EXPORT_SYMBOL(dma_free_attrs);
 477
 478 struct page *dma_alloc_pages(struct device *dev, size_t size,
 479                 dma_addr_t *dma_handle, enum dma_data_direction dir, gfp_t gfp)
 480 {
 481         const struct dma_map_ops *ops = get_dma_ops(dev);
 482         struct page *page;
 483
 484         if (WARN_ON_ONCE(!dev->coherent_dma_mask))
 485                 return NULL;
 486         if (WARN_ON_ONCE(gfp & (__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM)))
 487                 return NULL;
 488
 489         size = PAGE_ALIGN(size);
 490         if (dma_alloc_direct(dev, ops))
 491                 page = dma_direct_alloc_pages(dev, size, dma_handle, dir, gfp);
 492         else if (ops->alloc_pages)
 493                 page = ops->alloc_pages(dev, size, dma_handle, dir, gfp);
 494         else
 495                 return NULL;
 496
 497         debug_dma_map_page(dev, page, 0, size, dir, *dma_handle);
 498
 499         return page;
 500 }
 501 EXPORT_SYMBOL_GPL(dma_alloc_pages);
 502
 503 void dma_free_pages(struct device *dev, size_t size, struct page *page,
 504                 dma_addr_t dma_handle, enum dma_data_direction dir)
 505 {
 506         const struct dma_map_ops *ops = get_dma_ops(dev);
 507
 508         size = PAGE_ALIGN(size);
 509         debug_dma_unmap_page(dev, dma_handle, size, dir);
 510
 511         if (dma_alloc_direct(dev, ops))
 512                 dma_direct_free_pages(dev, size, page, dma_handle, dir);
 513         else if (ops->free_pages)
 514                 ops->free_pages(dev, size, page, dma_handle, dir);
 515 }
 516 EXPORT_SYMBOL_GPL(dma_free_pages);
 517
 518 int dma_supported(struct device *dev, u64 mask)
 519 {
 520         const struct dma_map_ops *ops = get_dma_ops(dev);
 521
 522         /*
 523          * ->dma_supported sets the bypass flag, so we must always call
 524          * into the method here unless the device is truly direct mapped.
 525          */
 526         if (!ops)
 527                 return dma_direct_supported(dev, mask);
 528         if (!ops->dma_supported)
 529                 return 1;
 530         return ops->dma_supported(dev, mask);
 531 }
 532 EXPORT_SYMBOL(dma_supported);
 533
 534 #ifdef CONFIG_ARCH_HAS_DMA_SET_MASK
 535 void arch_dma_set_mask(struct device *dev, u64 mask);
 536 #else
 537 #define arch_dma_set_mask(dev, mask)    do { } while (0)
 538 #endif
 539
 540 int dma_set_mask(struct device *dev, u64 mask)
 541 {
 542         /*
 543          * Truncate the mask to the actually supported dma_addr_t width to
 544          * avoid generating unsupportable addresses.
 545          */
 546         mask = (dma_addr_t)mask;
 547
 548         if (!dev->dma_mask || !dma_supported(dev, mask))
 549                 return -EIO;
 550
 551         arch_dma_set_mask(dev, mask);
 552         *dev->dma_mask = mask;
 553         return 0;
 554 }
 555 EXPORT_SYMBOL(dma_set_mask);
 556
 557 #ifndef CONFIG_ARCH_HAS_DMA_SET_COHERENT_MASK
 558 int dma_set_coherent_mask(struct device *dev, u64 mask)
 559 {
 560         /*
 561          * Truncate the mask to the actually supported dma_addr_t width to
 562          * avoid generating unsupportable addresses.
 563          */
 564         mask = (dma_addr_t)mask;
 565
 566         if (!dma_supported(dev, mask))
 567                 return -EIO;
 568
 569         dev->coherent_dma_mask = mask;
 570         return 0;
 571 }
 572 EXPORT_SYMBOL(dma_set_coherent_mask);
 573 #endif
 574
 575 size_t dma_max_mapping_size(struct device *dev)
 576 {
 577         const struct dma_map_ops *ops = get_dma_ops(dev);
 578         size_t size = SIZE_MAX;
 579
 580         if (dma_map_direct(dev, ops))
 581                 size = dma_direct_max_mapping_size(dev);
 582         else if (ops && ops->max_mapping_size)
 583                 size = ops->max_mapping_size(dev);
 584
 585         return size;
 586 }
 587 EXPORT_SYMBOL_GPL(dma_max_mapping_size);
 588
 589 bool dma_need_sync(struct device *dev, dma_addr_t dma_addr)
 590 {
 591         const struct dma_map_ops *ops = get_dma_ops(dev);
 592
 593         if (dma_map_direct(dev, ops))
 594                 return dma_direct_need_sync(dev, dma_addr);
 595         return ops->sync_single_for_cpu || ops->sync_single_for_device;
 596 }
 597 EXPORT_SYMBOL_GPL(dma_need_sync);
 598
 599 unsigned long dma_get_merge_boundary(struct device *dev)
 600 {
 601         const struct dma_map_ops *ops = get_dma_ops(dev);
 602
 603         if (!ops || !ops->get_merge_boundary)
 604                 return 0;       /* can't merge */
 605
 606         return ops->get_merge_boundary(dev);
 607 }
 608 EXPORT_SYMBOL_GPL(dma_get_merge_boundary);