kernel/irq/msi.c

   1 /*
   2  * linux/kernel/irq/msi.c
   3  *
   4  * Copyright (C) 2014 Intel Corp.
   5  * Author: Jiang Liu <jiang.liu@linux.intel.com>
   6  *
   7  * This file is licensed under GPLv2.
   8  *
   9  * This file contains common code to support Message Signalled Interrupt for
  10  * PCI compatible and non PCI compatible devices.
  11  */
  12 #include <linux/types.h>
  13 #include <linux/device.h>
  14 #include <linux/irq.h>
  15 #include <linux/irqdomain.h>
  16 #include <linux/msi.h>
  17 #include <linux/slab.h>
  18
  19 #include "internals.h"
  20
  21 /**
  22  * alloc_msi_entry - Allocate an initialize msi_entry
  23  * @dev:        Pointer to the device for which this is allocated
  24  * @nvec:       The number of vectors used in this entry
  25  * @affinity:   Optional pointer to an affinity mask array size of @nvec
  26  *
  27  * If @affinity is not NULL then a an affinity array[@nvec] is allocated
  28  * and the affinity masks from @affinity are copied.
  29  */
  30 struct msi_desc *
  31 alloc_msi_entry(struct device *dev, int nvec, const struct cpumask *affinity)
  32 {
  33         struct msi_desc *desc;
  34
  35         desc = kzalloc(sizeof(*desc), GFP_KERNEL);
  36         if (!desc)
  37                 return NULL;
  38
  39         INIT_LIST_HEAD(&desc->list);
  40         desc->dev = dev;
  41         desc->nvec_used = nvec;
  42         if (affinity) {
  43                 desc->affinity = kmemdup(affinity,
  44                         nvec * sizeof(*desc->affinity), GFP_KERNEL);
  45                 if (!desc->affinity) {
  46                         kfree(desc);
  47                         return NULL;
  48                 }
  49         }
  50
  51         return desc;
  52 }
  53
  54 void free_msi_entry(struct msi_desc *entry)
  55 {
  56         kfree(entry->affinity);
  57         kfree(entry);
  58 }
  59
  60 void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
  61 {
  62         *msg = entry->msg;
  63 }
  64
  65 void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg)
  66 {
  67         struct msi_desc *entry = irq_get_msi_desc(irq);
  68
  69         __get_cached_msi_msg(entry, msg);
  70 }
  71 EXPORT_SYMBOL_GPL(get_cached_msi_msg);
  72
  73 #ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
  74 static inline void irq_chip_write_msi_msg(struct irq_data *data,
  75                                           struct msi_msg *msg)
  76 {
  77         data->chip->irq_write_msi_msg(data, msg);
  78 }
  79
  80 /**
  81  * msi_domain_set_affinity - Generic affinity setter function for MSI domains
  82  * @irq_data:   The irq data associated to the interrupt
  83  * @mask:       The affinity mask to set
  84  * @force:      Flag to enforce setting (disable online checks)
  85  *
  86  * Intended to be used by MSI interrupt controllers which are
  87  * implemented with hierarchical domains.
  88  */
  89 int msi_domain_set_affinity(struct irq_data *irq_data,
  90                             const struct cpumask *mask, bool force)
  91 {
  92         struct irq_data *parent = irq_data->parent_data;
  93         struct msi_msg msg;
  94         int ret;
  95
  96         ret = parent->chip->irq_set_affinity(parent, mask, force);
  97         if (ret >= 0 && ret != IRQ_SET_MASK_OK_DONE) {
  98                 BUG_ON(irq_chip_compose_msi_msg(irq_data, &msg));
  99                 irq_chip_write_msi_msg(irq_data, &msg);
 100         }
 101
 102         return ret;
 103 }
 104
 105 static int msi_domain_activate(struct irq_domain *domain,
 106                                struct irq_data *irq_data, bool early)
 107 {
 108         struct msi_msg msg;
 109
 110         BUG_ON(irq_chip_compose_msi_msg(irq_data, &msg));
 111         irq_chip_write_msi_msg(irq_data, &msg);
 112         return 0;
 113 }
 114
 115 static void msi_domain_deactivate(struct irq_domain *domain,
 116                                   struct irq_data *irq_data)
 117 {
 118         struct msi_msg msg;
 119
 120         memset(&msg, 0, sizeof(msg));
 121         irq_chip_write_msi_msg(irq_data, &msg);
 122 }
 123
 124 static int msi_domain_alloc(struct irq_domain *domain, unsigned int virq,
 125                             unsigned int nr_irqs, void *arg)
 126 {
 127         struct msi_domain_info *info = domain->host_data;
 128         struct msi_domain_ops *ops = info->ops;
 129         irq_hw_number_t hwirq = ops->get_hwirq(info, arg);
 130         int i, ret;
 131
 132         if (irq_find_mapping(domain, hwirq) > 0)
 133                 return -EEXIST;
 134
 135         if (domain->parent) {
 136                 ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, arg);
 137                 if (ret < 0)
 138                         return ret;
 139         }
 140
 141         for (i = 0; i < nr_irqs; i++) {
 142                 ret = ops->msi_init(domain, info, virq + i, hwirq + i, arg);
 143                 if (ret < 0) {
 144                         if (ops->msi_free) {
 145                                 for (i--; i > 0; i--)
 146                                         ops->msi_free(domain, info, virq + i);
 147                         }
 148                         irq_domain_free_irqs_top(domain, virq, nr_irqs);
 149                         return ret;
 150                 }
 151         }
 152
 153         return 0;
 154 }
 155
 156 static void msi_domain_free(struct irq_domain *domain, unsigned int virq,
 157                             unsigned int nr_irqs)
 158 {
 159         struct msi_domain_info *info = domain->host_data;
 160         int i;
 161
 162         if (info->ops->msi_free) {
 163                 for (i = 0; i < nr_irqs; i++)
 164                         info->ops->msi_free(domain, info, virq + i);
 165         }
 166         irq_domain_free_irqs_top(domain, virq, nr_irqs);
 167 }
 168
 169 static const struct irq_domain_ops msi_domain_ops = {
 170         .alloc          = msi_domain_alloc,
 171         .free           = msi_domain_free,
 172         .activate       = msi_domain_activate,
 173         .deactivate     = msi_domain_deactivate,
 174 };
 175
 176 #ifdef GENERIC_MSI_DOMAIN_OPS
 177 static irq_hw_number_t msi_domain_ops_get_hwirq(struct msi_domain_info *info,
 178                                                 msi_alloc_info_t *arg)
 179 {
 180         return arg->hwirq;
 181 }
 182
 183 static int msi_domain_ops_prepare(struct irq_domain *domain, struct device *dev,
 184                                   int nvec, msi_alloc_info_t *arg)
 185 {
 186         memset(arg, 0, sizeof(*arg));
 187         return 0;
 188 }
 189
 190 static void msi_domain_ops_set_desc(msi_alloc_info_t *arg,
 191                                     struct msi_desc *desc)
 192 {
 193         arg->desc = desc;
 194 }
 195 #else
 196 #define msi_domain_ops_get_hwirq        NULL
 197 #define msi_domain_ops_prepare          NULL
 198 #define msi_domain_ops_set_desc         NULL
 199 #endif /* !GENERIC_MSI_DOMAIN_OPS */
 200
 201 static int msi_domain_ops_init(struct irq_domain *domain,
 202                                struct msi_domain_info *info,
 203                                unsigned int virq, irq_hw_number_t hwirq,
 204                                msi_alloc_info_t *arg)
 205 {
 206         irq_domain_set_hwirq_and_chip(domain, virq, hwirq, info->chip,
 207                                       info->chip_data);
 208         if (info->handler && info->handler_name) {
 209                 __irq_set_handler(virq, info->handler, 0, info->handler_name);
 210                 if (info->handler_data)
 211                         irq_set_handler_data(virq, info->handler_data);
 212         }
 213         return 0;
 214 }
 215
 216 static int msi_domain_ops_check(struct irq_domain *domain,
 217                                 struct msi_domain_info *info,
 218                                 struct device *dev)
 219 {
 220         return 0;
 221 }
 222
 223 static struct msi_domain_ops msi_domain_ops_default = {
 224         .get_hwirq      = msi_domain_ops_get_hwirq,
 225         .msi_init       = msi_domain_ops_init,
 226         .msi_check      = msi_domain_ops_check,
 227         .msi_prepare    = msi_domain_ops_prepare,
 228         .set_desc       = msi_domain_ops_set_desc,
 229 };
 230
 231 static void msi_domain_update_dom_ops(struct msi_domain_info *info)
 232 {
 233         struct msi_domain_ops *ops = info->ops;
 234
 235         if (ops == NULL) {
 236                 info->ops = &msi_domain_ops_default;
 237                 return;
 238         }
 239
 240         if (ops->get_hwirq == NULL)
 241                 ops->get_hwirq = msi_domain_ops_default.get_hwirq;
 242         if (ops->msi_init == NULL)
 243                 ops->msi_init = msi_domain_ops_default.msi_init;
 244         if (ops->msi_check == NULL)
 245                 ops->msi_check = msi_domain_ops_default.msi_check;
 246         if (ops->msi_prepare == NULL)
 247                 ops->msi_prepare = msi_domain_ops_default.msi_prepare;
 248         if (ops->set_desc == NULL)
 249                 ops->set_desc = msi_domain_ops_default.set_desc;
 250 }
 251
 252 static void msi_domain_update_chip_ops(struct msi_domain_info *info)
 253 {
 254         struct irq_chip *chip = info->chip;
 255
 256         BUG_ON(!chip || !chip->irq_mask || !chip->irq_unmask);
 257         if (!chip->irq_set_affinity)
 258                 chip->irq_set_affinity = msi_domain_set_affinity;
 259 }
 260
 261 /**
 262  * msi_create_irq_domain - Create a MSI interrupt domain
 263  * @fwnode:     Optional fwnode of the interrupt controller
 264  * @info:       MSI domain info
 265  * @parent:     Parent irq domain
 266  */
 267 struct irq_domain *msi_create_irq_domain(struct fwnode_handle *fwnode,
 268                                          struct msi_domain_info *info,
 269                                          struct irq_domain *parent)
 270 {
 271         struct irq_domain *domain;
 272
 273         if (info->flags & MSI_FLAG_USE_DEF_DOM_OPS)
 274                 msi_domain_update_dom_ops(info);
 275         if (info->flags & MSI_FLAG_USE_DEF_CHIP_OPS)
 276                 msi_domain_update_chip_ops(info);
 277
 278         domain = irq_domain_create_hierarchy(parent, IRQ_DOMAIN_FLAG_MSI, 0,
 279                                              fwnode, &msi_domain_ops, info);
 280
 281         if (domain && !domain->name && info->chip)
 282                 domain->name = info->chip->name;
 283
 284         return domain;
 285 }
 286
 287 int msi_domain_prepare_irqs(struct irq_domain *domain, struct device *dev,
 288                             int nvec, msi_alloc_info_t *arg)
 289 {
 290         struct msi_domain_info *info = domain->host_data;
 291         struct msi_domain_ops *ops = info->ops;
 292         int ret;
 293
 294         ret = ops->msi_check(domain, info, dev);
 295         if (ret == 0)
 296                 ret = ops->msi_prepare(domain, dev, nvec, arg);
 297
 298         return ret;
 299 }
 300
 301 int msi_domain_populate_irqs(struct irq_domain *domain, struct device *dev,
 302                              int virq, int nvec, msi_alloc_info_t *arg)
 303 {
 304         struct msi_domain_info *info = domain->host_data;
 305         struct msi_domain_ops *ops = info->ops;
 306         struct msi_desc *desc;
 307         int ret = 0;
 308
 309         for_each_msi_entry(desc, dev) {
 310                 /* Don't even try the multi-MSI brain damage. */
 311                 if (WARN_ON(!desc->irq || desc->nvec_used != 1)) {
 312                         ret = -EINVAL;
 313                         break;
 314                 }
 315
 316                 if (!(desc->irq >= virq && desc->irq < (virq + nvec)))
 317                         continue;
 318
 319                 ops->set_desc(arg, desc);
 320                 /* Assumes the domain mutex is held! */
 321                 ret = irq_domain_alloc_irqs_hierarchy(domain, desc->irq, 1,
 322                                                       arg);
 323                 if (ret)
 324                         break;
 325
 326                 irq_set_msi_desc_off(desc->irq, 0, desc);
 327         }
 328
 329         if (ret) {
 330                 /* Mop up the damage */
 331                 for_each_msi_entry(desc, dev) {
 332                         if (!(desc->irq >= virq && desc->irq < (virq + nvec)))
 333                                 continue;
 334
 335                         irq_domain_free_irqs_common(domain, desc->irq, 1);
 336                 }
 337         }
 338
 339         return ret;
 340 }
 341
 342 /*
 343  * Carefully check whether the device can use reservation mode. If
 344  * reservation mode is enabled then the early activation will assign a
 345  * dummy vector to the device. If the PCI/MSI device does not support
 346  * masking of the entry then this can result in spurious interrupts when
 347  * the device driver is not absolutely careful. But even then a malfunction
 348  * of the hardware could result in a spurious interrupt on the dummy vector
 349  * and render the device unusable. If the entry can be masked then the core
 350  * logic will prevent the spurious interrupt and reservation mode can be
 351  * used. For now reservation mode is restricted to PCI/MSI.
 352  */
 353 static bool msi_check_reservation_mode(struct irq_domain *domain,
 354                                        struct msi_domain_info *info,
 355                                        struct device *dev)
 356 {
 357         struct msi_desc *desc;
 358
 359         if (domain->bus_token != DOMAIN_BUS_PCI_MSI)
 360                 return false;
 361
 362         if (!(info->flags & MSI_FLAG_MUST_REACTIVATE))
 363                 return false;
 364
 365         if (IS_ENABLED(CONFIG_PCI_MSI) && pci_msi_ignore_mask)
 366                 return false;
 367
 368         /*
 369          * Checking the first MSI descriptor is sufficient. MSIX supports
 370          * masking and MSI does so when the maskbit is set.
 371          */
 372         desc = first_msi_entry(dev);
 373         return desc->msi_attrib.is_msix || desc->msi_attrib.maskbit;
 374 }
 375
 376 /**
 377  * msi_domain_alloc_irqs - Allocate interrupts from a MSI interrupt domain
 378  * @domain:     The domain to allocate from
 379  * @dev:        Pointer to device struct of the device for which the interrupts
 380  *              are allocated
 381  * @nvec:       The number of interrupts to allocate
 382  *
 383  * Returns 0 on success or an error code.
 384  */
 385 int msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev,
 386                           int nvec)
 387 {
 388         struct msi_domain_info *info = domain->host_data;
 389         struct msi_domain_ops *ops = info->ops;
 390         struct irq_data *irq_data;
 391         struct msi_desc *desc;
 392         msi_alloc_info_t arg;
 393         int i, ret, virq;
 394         bool can_reserve;
 395
 396         ret = msi_domain_prepare_irqs(domain, dev, nvec, &arg);
 397         if (ret)
 398                 return ret;
 399
 400         for_each_msi_entry(desc, dev) {
 401                 ops->set_desc(&arg, desc);
 402
 403                 virq = __irq_domain_alloc_irqs(domain, -1, desc->nvec_used,
 404                                                dev_to_node(dev), &arg, false,
 405                                                desc->affinity);
 406                 if (virq < 0) {
 407                         ret = -ENOSPC;
 408                         if (ops->handle_error)
 409                                 ret = ops->handle_error(domain, desc, ret);
 410                         if (ops->msi_finish)
 411                                 ops->msi_finish(&arg, ret);
 412                         return ret;
 413                 }
 414
 415                 for (i = 0; i < desc->nvec_used; i++) {
 416                         irq_set_msi_desc_off(virq, i, desc);
 417                         irq_debugfs_copy_devname(virq + i, dev);
 418                 }
 419         }
 420
 421         if (ops->msi_finish)
 422                 ops->msi_finish(&arg, 0);
 423
 424         can_reserve = msi_check_reservation_mode(domain, info, dev);
 425
 426         for_each_msi_entry(desc, dev) {
 427                 virq = desc->irq;
 428                 if (desc->nvec_used == 1)
 429                         dev_dbg(dev, "irq %d for MSI\n", virq);
 430                 else
 431                         dev_dbg(dev, "irq [%d-%d] for MSI\n",
 432                                 virq, virq + desc->nvec_used - 1);
 433                 /*
 434                  * This flag is set by the PCI layer as we need to activate
 435                  * the MSI entries before the PCI layer enables MSI in the
 436                  * card. Otherwise the card latches a random msi message.
 437                  */
 438                 if (!(info->flags & MSI_FLAG_ACTIVATE_EARLY))
 439                         continue;
 440
 441                 irq_data = irq_domain_get_irq_data(domain, desc->irq);
 442                 if (!can_reserve)
 443                         irqd_clr_can_reserve(irq_data);
 444                 ret = irq_domain_activate_irq(irq_data, can_reserve);
 445                 if (ret)
 446                         goto cleanup;
 447         }
 448
 449         /*
 450          * If these interrupts use reservation mode, clear the activated bit
 451          * so request_irq() will assign the final vector.
 452          */
 453         if (can_reserve) {
 454                 for_each_msi_entry(desc, dev) {
 455                         irq_data = irq_domain_get_irq_data(domain, desc->irq);
 456                         irqd_clr_activated(irq_data);
 457                 }
 458         }
 459         return 0;
 460
 461 cleanup:
 462         for_each_msi_entry(desc, dev) {
 463                 struct irq_data *irqd;
 464
 465                 if (desc->irq == virq)
 466                         break;
 467
 468                 irqd = irq_domain_get_irq_data(domain, desc->irq);
 469                 if (irqd_is_activated(irqd))
 470                         irq_domain_deactivate_irq(irqd);
 471         }
 472         msi_domain_free_irqs(domain, dev);
 473         return ret;
 474 }
 475
 476 /**
 477  * msi_domain_free_irqs - Free interrupts from a MSI interrupt @domain associated tp @dev
 478  * @domain:     The domain to managing the interrupts
 479  * @dev:        Pointer to device struct of the device for which the interrupts
 480  *              are free
 481  */
 482 void msi_domain_free_irqs(struct irq_domain *domain, struct device *dev)
 483 {
 484         struct msi_desc *desc;
 485
 486         for_each_msi_entry(desc, dev) {
 487                 /*
 488                  * We might have failed to allocate an MSI early
 489                  * enough that there is no IRQ associated to this
 490                  * entry. If that's the case, don't do anything.
 491                  */
 492                 if (desc->irq) {
 493                         irq_domain_free_irqs(desc->irq, desc->nvec_used);
 494                         desc->irq = 0;
 495                 }
 496         }
 497 }
 498
 499 /**
 500  * msi_get_domain_info - Get the MSI interrupt domain info for @domain
 501  * @domain:     The interrupt domain to retrieve data from
 502  *
 503  * Returns the pointer to the msi_domain_info stored in
 504  * @domain->host_data.
 505  */
 506 struct msi_domain_info *msi_get_domain_info(struct irq_domain *domain)
 507 {
 508         return (struct msi_domain_info *)domain->host_data;
 509 }
 510
 511 #endif /* CONFIG_GENERIC_MSI_IRQ_DOMAIN */